From: Dave Martin <Dave.Martin@arm.com> To: kvmarm@lists.cs.columbia.edu Cc: Okamoto Takayuki <tokamoto@jp.fujitsu.com>, Christoffer Dall <cdall@kernel.org>, Ard Biesheuvel <ard.biesheuvel@linaro.org>, Marc Zyngier <marc.zyngier@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Zhang Lei <zhang.lei@jp.fujitsu.com>, Julien Grall <julien.grall@arm.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 13/27] KVM: arm64/sve: Context switch the SVE registers Date: Fri, 29 Mar 2019 13:00:38 +0000 [thread overview] Message-ID: <1553864452-15080-14-git-send-email-Dave.Martin@arm.com> (raw) In-Reply-To: <1553864452-15080-1-git-send-email-Dave.Martin@arm.com> In order to give each vcpu its own view of the SVE registers, this patch adds context storage via a new sve_state pointer in struct vcpu_arch. An additional member sve_max_vl is also added for each vcpu, to determine the maximum vector length visible to the guest and thus the value to be configured in ZCR_EL2.LEN while the vcpu is active. This also determines the layout and size of the storage in sve_state, which is read and written by the same backend functions that are used for context-switching the SVE state for host tasks. On SVE-enabled vcpus, SVE access traps are now handled by switching in the vcpu's SVE context and disabling the trap before returning to the guest. On other vcpus, the trap is not handled and an exit back to the host occurs, where the handle_sve() fallback path reflects an undefined instruction exception back to the guest, consistently with the behaviour of non-SVE-capable hardware (as was done unconditionally prior to this patch). No SVE handling is added on non-VHE-only paths, since VHE is an architectural and Kconfig prerequisite of SVE. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Julien Thierry <julien.thierry@arm.com> Tested-by: zhang.lei <zhang.lei@jp.fujitsu.com> --- Changes since v5: * [Julien Thierry, Julien Grall] Commit message typo fixes * [Mark Rutland] Rename trap_class to hsr_ec, for consistency with existing code. * [Mark Rutland] Simplify condition for refusing to handle an FPSIMD/SVE trap, using multiple if () statements for clarity. The previous condition was a bit tortuous, and how that the static_key checks have been hoisted out, it makes little difference to the compiler how we express the condition here. --- arch/arm64/include/asm/kvm_host.h | 6 ++++ arch/arm64/kvm/fpsimd.c | 5 +-- arch/arm64/kvm/hyp/switch.c | 75 +++++++++++++++++++++++++++++---------- 3 files changed, 66 insertions(+), 20 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 22cf484..4fabfd2 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -228,6 +228,8 @@ struct vcpu_reset_state { struct kvm_vcpu_arch { struct kvm_cpu_context ctxt; + void *sve_state; + unsigned int sve_max_vl; /* HYP configuration */ u64 hcr_el2; @@ -323,6 +325,10 @@ struct kvm_vcpu_arch { bool sysregs_loaded_on_cpu; }; +/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ +#define vcpu_sve_pffr(vcpu) ((void *)((char *)((vcpu)->arch.sve_state) + \ + sve_ffr_offset((vcpu)->arch.sve_max_vl))) + /* vcpu_arch flags field values: */ #define KVM_ARM64_DEBUG_DIRTY (1 << 0) #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */ diff --git a/arch/arm64/kvm/fpsimd.c b/arch/arm64/kvm/fpsimd.c index 7053bf4..6e3c9c8 100644 --- a/arch/arm64/kvm/fpsimd.c +++ b/arch/arm64/kvm/fpsimd.c @@ -87,10 +87,11 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) { fpsimd_bind_state_to_cpu(&vcpu->arch.ctxt.gp_regs.fp_regs, - NULL, SVE_VL_MIN); + vcpu->arch.sve_state, + vcpu->arch.sve_max_vl); clear_thread_flag(TIF_FOREIGN_FPSTATE); - clear_thread_flag(TIF_SVE); + update_thread_flag(TIF_SVE, vcpu_has_sve(vcpu)); } } diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 9d46066..5444b9c 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -100,7 +100,10 @@ static void activate_traps_vhe(struct kvm_vcpu *vcpu) val = read_sysreg(cpacr_el1); val |= CPACR_EL1_TTA; val &= ~CPACR_EL1_ZEN; - if (!update_fp_enabled(vcpu)) { + if (update_fp_enabled(vcpu)) { + if (vcpu_has_sve(vcpu)) + val |= CPACR_EL1_ZEN; + } else { val &= ~CPACR_EL1_FPEN; __activate_traps_fpsimd32(vcpu); } @@ -317,16 +320,48 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu) return true; } -static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu) +/* Check for an FPSIMD/SVE trap and handle as appropriate */ +static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) { - struct user_fpsimd_state *host_fpsimd = vcpu->arch.host_fpsimd_state; + bool vhe, sve_guest, sve_host; + u8 hsr_ec; - if (has_vhe()) - write_sysreg(read_sysreg(cpacr_el1) | CPACR_EL1_FPEN, - cpacr_el1); - else + if (!system_supports_fpsimd()) + return false; + + if (system_supports_sve()) { + sve_guest = vcpu_has_sve(vcpu); + sve_host = vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE; + vhe = true; + } else { + sve_guest = false; + sve_host = false; + vhe = has_vhe(); + } + + hsr_ec = kvm_vcpu_trap_get_class(vcpu); + if (hsr_ec != ESR_ELx_EC_FP_ASIMD && + hsr_ec != ESR_ELx_EC_SVE) + return false; + + /* Don't handle SVE traps for non-SVE vcpus here: */ + if (!sve_guest) + if (hsr_ec != ESR_ELx_EC_FP_ASIMD) + return false; + + /* Valid trap. Switch the context: */ + + if (vhe) { + u64 reg = read_sysreg(cpacr_el1) | CPACR_EL1_FPEN; + + if (sve_guest) + reg |= CPACR_EL1_ZEN; + + write_sysreg(reg, cpacr_el1); + } else { write_sysreg(read_sysreg(cptr_el2) & ~(u64)CPTR_EL2_TFP, cptr_el2); + } isb(); @@ -335,24 +370,28 @@ static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu) * In the SVE case, VHE is assumed: it is enforced by * Kconfig and kvm_arch_init(). */ - if (system_supports_sve() && - (vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE)) { + if (sve_host) { struct thread_struct *thread = container_of( - host_fpsimd, + vcpu->arch.host_fpsimd_state, struct thread_struct, uw.fpsimd_state); - sve_save_state(sve_pffr(thread), &host_fpsimd->fpsr); + sve_save_state(sve_pffr(thread), + &vcpu->arch.host_fpsimd_state->fpsr); } else { - __fpsimd_save_state(host_fpsimd); + __fpsimd_save_state(vcpu->arch.host_fpsimd_state); } vcpu->arch.flags &= ~KVM_ARM64_FP_HOST; } - __fpsimd_restore_state(&vcpu->arch.ctxt.gp_regs.fp_regs); - - if (vcpu_has_sve(vcpu)) + if (sve_guest) { + sve_load_state(vcpu_sve_pffr(vcpu), + &vcpu->arch.ctxt.gp_regs.fp_regs.fpsr, + sve_vq_from_vl(vcpu->arch.sve_max_vl) - 1); write_sysreg_s(vcpu->arch.ctxt.sys_regs[ZCR_EL1], SYS_ZCR_EL12); + } else { + __fpsimd_restore_state(&vcpu->arch.ctxt.gp_regs.fp_regs); + } /* Skip restoring fpexc32 for AArch64 guests */ if (!(read_sysreg(hcr_el2) & HCR_RW)) @@ -388,10 +427,10 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code) * and restore the guest context lazily. * If FP/SIMD is not implemented, handle the trap and inject an * undefined instruction exception to the guest. + * Similarly for trapped SVE accesses. */ - if (system_supports_fpsimd() && - kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_FP_ASIMD) - return __hyp_switch_fpsimd(vcpu); + if (__hyp_handle_fpsimd(vcpu)) + return true; if (!__populate_fault_info(vcpu)) return true; -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: Dave Martin <Dave.Martin@arm.com> To: kvmarm@lists.cs.columbia.edu Cc: "Peter Maydell" <peter.maydell@linaro.org>, "Okamoto Takayuki" <tokamoto@jp.fujitsu.com>, "Christoffer Dall" <cdall@kernel.org>, "Ard Biesheuvel" <ard.biesheuvel@linaro.org>, "Marc Zyngier" <marc.zyngier@arm.com>, "Catalin Marinas" <catalin.marinas@arm.com>, "Will Deacon" <will.deacon@arm.com>, "Zhang Lei" <zhang.lei@jp.fujitsu.com>, "Julien Grall" <julien.grall@arm.com>, "Alex Bennée" <alex.bennee@linaro.org>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 13/27] KVM: arm64/sve: Context switch the SVE registers Date: Fri, 29 Mar 2019 13:00:38 +0000 [thread overview] Message-ID: <1553864452-15080-14-git-send-email-Dave.Martin@arm.com> (raw) In-Reply-To: <1553864452-15080-1-git-send-email-Dave.Martin@arm.com> In order to give each vcpu its own view of the SVE registers, this patch adds context storage via a new sve_state pointer in struct vcpu_arch. An additional member sve_max_vl is also added for each vcpu, to determine the maximum vector length visible to the guest and thus the value to be configured in ZCR_EL2.LEN while the vcpu is active. This also determines the layout and size of the storage in sve_state, which is read and written by the same backend functions that are used for context-switching the SVE state for host tasks. On SVE-enabled vcpus, SVE access traps are now handled by switching in the vcpu's SVE context and disabling the trap before returning to the guest. On other vcpus, the trap is not handled and an exit back to the host occurs, where the handle_sve() fallback path reflects an undefined instruction exception back to the guest, consistently with the behaviour of non-SVE-capable hardware (as was done unconditionally prior to this patch). No SVE handling is added on non-VHE-only paths, since VHE is an architectural and Kconfig prerequisite of SVE. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Julien Thierry <julien.thierry@arm.com> Tested-by: zhang.lei <zhang.lei@jp.fujitsu.com> --- Changes since v5: * [Julien Thierry, Julien Grall] Commit message typo fixes * [Mark Rutland] Rename trap_class to hsr_ec, for consistency with existing code. * [Mark Rutland] Simplify condition for refusing to handle an FPSIMD/SVE trap, using multiple if () statements for clarity. The previous condition was a bit tortuous, and how that the static_key checks have been hoisted out, it makes little difference to the compiler how we express the condition here. --- arch/arm64/include/asm/kvm_host.h | 6 ++++ arch/arm64/kvm/fpsimd.c | 5 +-- arch/arm64/kvm/hyp/switch.c | 75 +++++++++++++++++++++++++++++---------- 3 files changed, 66 insertions(+), 20 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 22cf484..4fabfd2 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -228,6 +228,8 @@ struct vcpu_reset_state { struct kvm_vcpu_arch { struct kvm_cpu_context ctxt; + void *sve_state; + unsigned int sve_max_vl; /* HYP configuration */ u64 hcr_el2; @@ -323,6 +325,10 @@ struct kvm_vcpu_arch { bool sysregs_loaded_on_cpu; }; +/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ +#define vcpu_sve_pffr(vcpu) ((void *)((char *)((vcpu)->arch.sve_state) + \ + sve_ffr_offset((vcpu)->arch.sve_max_vl))) + /* vcpu_arch flags field values: */ #define KVM_ARM64_DEBUG_DIRTY (1 << 0) #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */ diff --git a/arch/arm64/kvm/fpsimd.c b/arch/arm64/kvm/fpsimd.c index 7053bf4..6e3c9c8 100644 --- a/arch/arm64/kvm/fpsimd.c +++ b/arch/arm64/kvm/fpsimd.c @@ -87,10 +87,11 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) { fpsimd_bind_state_to_cpu(&vcpu->arch.ctxt.gp_regs.fp_regs, - NULL, SVE_VL_MIN); + vcpu->arch.sve_state, + vcpu->arch.sve_max_vl); clear_thread_flag(TIF_FOREIGN_FPSTATE); - clear_thread_flag(TIF_SVE); + update_thread_flag(TIF_SVE, vcpu_has_sve(vcpu)); } } diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 9d46066..5444b9c 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -100,7 +100,10 @@ static void activate_traps_vhe(struct kvm_vcpu *vcpu) val = read_sysreg(cpacr_el1); val |= CPACR_EL1_TTA; val &= ~CPACR_EL1_ZEN; - if (!update_fp_enabled(vcpu)) { + if (update_fp_enabled(vcpu)) { + if (vcpu_has_sve(vcpu)) + val |= CPACR_EL1_ZEN; + } else { val &= ~CPACR_EL1_FPEN; __activate_traps_fpsimd32(vcpu); } @@ -317,16 +320,48 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu) return true; } -static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu) +/* Check for an FPSIMD/SVE trap and handle as appropriate */ +static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) { - struct user_fpsimd_state *host_fpsimd = vcpu->arch.host_fpsimd_state; + bool vhe, sve_guest, sve_host; + u8 hsr_ec; - if (has_vhe()) - write_sysreg(read_sysreg(cpacr_el1) | CPACR_EL1_FPEN, - cpacr_el1); - else + if (!system_supports_fpsimd()) + return false; + + if (system_supports_sve()) { + sve_guest = vcpu_has_sve(vcpu); + sve_host = vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE; + vhe = true; + } else { + sve_guest = false; + sve_host = false; + vhe = has_vhe(); + } + + hsr_ec = kvm_vcpu_trap_get_class(vcpu); + if (hsr_ec != ESR_ELx_EC_FP_ASIMD && + hsr_ec != ESR_ELx_EC_SVE) + return false; + + /* Don't handle SVE traps for non-SVE vcpus here: */ + if (!sve_guest) + if (hsr_ec != ESR_ELx_EC_FP_ASIMD) + return false; + + /* Valid trap. Switch the context: */ + + if (vhe) { + u64 reg = read_sysreg(cpacr_el1) | CPACR_EL1_FPEN; + + if (sve_guest) + reg |= CPACR_EL1_ZEN; + + write_sysreg(reg, cpacr_el1); + } else { write_sysreg(read_sysreg(cptr_el2) & ~(u64)CPTR_EL2_TFP, cptr_el2); + } isb(); @@ -335,24 +370,28 @@ static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu) * In the SVE case, VHE is assumed: it is enforced by * Kconfig and kvm_arch_init(). */ - if (system_supports_sve() && - (vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE)) { + if (sve_host) { struct thread_struct *thread = container_of( - host_fpsimd, + vcpu->arch.host_fpsimd_state, struct thread_struct, uw.fpsimd_state); - sve_save_state(sve_pffr(thread), &host_fpsimd->fpsr); + sve_save_state(sve_pffr(thread), + &vcpu->arch.host_fpsimd_state->fpsr); } else { - __fpsimd_save_state(host_fpsimd); + __fpsimd_save_state(vcpu->arch.host_fpsimd_state); } vcpu->arch.flags &= ~KVM_ARM64_FP_HOST; } - __fpsimd_restore_state(&vcpu->arch.ctxt.gp_regs.fp_regs); - - if (vcpu_has_sve(vcpu)) + if (sve_guest) { + sve_load_state(vcpu_sve_pffr(vcpu), + &vcpu->arch.ctxt.gp_regs.fp_regs.fpsr, + sve_vq_from_vl(vcpu->arch.sve_max_vl) - 1); write_sysreg_s(vcpu->arch.ctxt.sys_regs[ZCR_EL1], SYS_ZCR_EL12); + } else { + __fpsimd_restore_state(&vcpu->arch.ctxt.gp_regs.fp_regs); + } /* Skip restoring fpexc32 for AArch64 guests */ if (!(read_sysreg(hcr_el2) & HCR_RW)) @@ -388,10 +427,10 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code) * and restore the guest context lazily. * If FP/SIMD is not implemented, handle the trap and inject an * undefined instruction exception to the guest. + * Similarly for trapped SVE accesses. */ - if (system_supports_fpsimd() && - kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_FP_ASIMD) - return __hyp_switch_fpsimd(vcpu); + if (__hyp_handle_fpsimd(vcpu)) + return true; if (!__populate_fault_info(vcpu)) return true; -- 2.1.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-03-29 13:02 UTC|newest] Thread overview: 224+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-03-29 13:00 [PATCH v7 00/27] KVM: arm64: SVE guest support Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 01/27] KVM: Documentation: Document arm64 core registers in detail Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-24 9:25 ` Alex Bennée 2019-04-24 9:25 ` Alex Bennée 2019-03-29 13:00 ` [PATCH v7 02/27] arm64: fpsimd: Always set TIF_FOREIGN_FPSTATE on task state flush Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 03/27] KVM: arm64: Delete orphaned declaration for __fpsimd_enabled() Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 04/27] KVM: arm64: Refactor kvm_arm_num_regs() for easier maintenance Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 05/27] KVM: arm64: Add missing #includes to kvm_host.h Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 06/27] arm64/sve: Clarify role of the VQ map maintenance functions Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 21:21 ` Andrew Jones 2019-04-04 21:21 ` Andrew Jones 2019-03-29 13:00 ` [PATCH v7 07/27] arm64/sve: Check SVE virtualisability Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 21:21 ` Andrew Jones 2019-04-04 21:21 ` Andrew Jones 2019-04-05 9:35 ` Dave Martin 2019-04-05 9:35 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 08/27] arm64/sve: Enable SVE state tracking for non-task contexts Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 09/27] KVM: arm64: Add a vcpu flag to control SVE visibility for the guest Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-03 19:14 ` Andrew Jones 2019-04-03 19:14 ` Andrew Jones 2019-04-04 3:17 ` Marc Zyngier 2019-04-04 3:17 ` Marc Zyngier 2019-04-04 7:53 ` Dave Martin 2019-04-04 7:53 ` Dave Martin 2019-04-04 21:15 ` Andrew Jones 2019-04-04 21:15 ` Andrew Jones 2019-03-29 13:00 ` [PATCH v7 10/27] KVM: arm64: Propagate vcpu into read_id_reg() Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 21:15 ` Andrew Jones 2019-04-04 21:15 ` Andrew Jones 2019-03-29 13:00 ` [PATCH v7 11/27] KVM: arm64: Support runtime sysreg visibility filtering Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-03 19:17 ` Andrew Jones 2019-04-03 19:17 ` Andrew Jones 2019-04-24 9:39 ` Alex Bennée 2019-04-24 9:39 ` Alex Bennée 2019-04-24 13:47 ` Dave Martin 2019-04-24 13:47 ` Dave Martin 2019-04-24 13:47 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 12/27] KVM: arm64/sve: System register context switch and access support Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-03 19:39 ` Andrew Jones 2019-04-03 19:39 ` Andrew Jones 2019-04-04 8:06 ` Dave Martin 2019-04-04 8:06 ` Dave Martin 2019-04-04 8:32 ` Andrew Jones 2019-04-04 8:32 ` Andrew Jones 2019-04-04 8:47 ` Dave Martin 2019-04-04 8:47 ` Dave Martin 2019-04-04 8:59 ` Andrew Jones 2019-04-04 8:59 ` Andrew Jones 2019-04-24 15:21 ` Alex Bennée 2019-04-24 15:21 ` Alex Bennée 2019-04-25 13:28 ` Dave Martin 2019-04-25 13:28 ` Dave Martin 2019-04-25 13:28 ` Dave Martin 2019-03-29 13:00 ` Dave Martin [this message] 2019-03-29 13:00 ` [PATCH v7 13/27] KVM: arm64/sve: Context switch the SVE registers Dave Martin 2019-04-03 20:01 ` Andrew Jones 2019-04-03 20:01 ` Andrew Jones 2019-04-04 8:10 ` Dave Martin 2019-04-04 8:10 ` Dave Martin 2019-04-04 8:35 ` Andrew Jones 2019-04-04 8:35 ` Andrew Jones 2019-04-04 8:36 ` Dave Martin 2019-04-04 8:36 ` Dave Martin 2019-04-24 14:51 ` Alex Bennée 2019-04-24 14:51 ` Alex Bennée 2019-04-25 13:35 ` Dave Martin 2019-04-25 13:35 ` Dave Martin 2019-04-25 13:35 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 14/27] KVM: Allow 2048-bit register access via ioctl interface Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 21:11 ` Andrew Jones 2019-04-04 21:11 ` Andrew Jones 2019-03-29 13:00 ` [PATCH v7 15/27] KVM: arm64: Add missing #include of <linux/string.h> in guest.c Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 16/27] KVM: arm64: Factor out core register ID enumeration Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-02 2:41 ` Marc Zyngier 2019-04-02 2:41 ` Marc Zyngier 2019-04-02 8:59 ` Dave Martin 2019-04-02 8:59 ` Dave Martin 2019-04-02 9:32 ` Marc Zyngier 2019-04-02 9:32 ` Marc Zyngier 2019-04-02 9:54 ` Dave P Martin 2019-04-02 9:54 ` Dave P Martin 2019-03-29 13:00 ` [PATCH v7 17/27] KVM: arm64: Reject ioctl access to FPSIMD V-regs on SVE vcpus Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-03 20:15 ` Andrew Jones 2019-04-03 20:15 ` Andrew Jones 2019-04-24 13:45 ` Alex Bennée 2019-04-24 13:45 ` Alex Bennée 2019-03-29 13:00 ` [PATCH v7 18/27] KVM: arm64/sve: Add SVE support to register access ioctl interface Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 13:57 ` Andrew Jones 2019-04-04 13:57 ` Andrew Jones 2019-04-04 14:50 ` Dave Martin 2019-04-04 14:50 ` Dave Martin 2019-04-04 16:25 ` Andrew Jones 2019-04-04 16:25 ` Andrew Jones 2019-04-04 16:56 ` Dave Martin 2019-04-04 16:56 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 19/27] KVM: arm64: Enumerate SVE register indices for KVM_GET_REG_LIST Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 14:08 ` Andrew Jones 2019-04-04 14:08 ` Andrew Jones 2019-04-05 9:35 ` Dave Martin 2019-04-05 9:35 ` Dave Martin 2019-04-05 9:45 ` Andrew Jones 2019-04-05 9:45 ` Andrew Jones 2019-04-05 11:11 ` Dave Martin 2019-04-05 11:11 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 20/27] arm64/sve: In-kernel vector length availability query interface Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 14:20 ` Andrew Jones 2019-04-04 14:20 ` Andrew Jones 2019-04-05 9:35 ` Dave Martin 2019-04-05 9:35 ` Dave Martin 2019-04-05 9:54 ` Andrew Jones 2019-04-05 9:54 ` Andrew Jones 2019-04-05 11:13 ` Dave Martin 2019-04-05 11:13 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 21/27] KVM: arm/arm64: Add hook for arch-specific KVM initialisation Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 14:25 ` Andrew Jones 2019-04-04 14:25 ` Andrew Jones 2019-04-04 14:53 ` Dave Martin 2019-04-04 14:53 ` Dave Martin 2019-04-04 16:33 ` Andrew Jones 2019-04-04 16:33 ` Andrew Jones 2019-04-05 9:36 ` Dave Martin 2019-04-05 9:36 ` Dave Martin 2019-04-05 10:40 ` Andrew Jones 2019-04-05 10:40 ` Andrew Jones 2019-04-05 11:14 ` Dave Martin 2019-04-05 11:14 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 22/27] KVM: arm/arm64: Add KVM_ARM_VCPU_FINALIZE ioctl Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 15:07 ` Andrew Jones 2019-04-04 15:07 ` Andrew Jones 2019-04-04 16:47 ` Dave Martin 2019-04-04 16:47 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 23/27] KVM: arm64/sve: Add pseudo-register for the guest's vector lengths Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 20:18 ` Andrew Jones 2019-04-04 20:18 ` Andrew Jones 2019-04-05 9:36 ` Dave Martin 2019-04-05 9:36 ` Dave Martin 2019-04-05 10:14 ` Andrew Jones 2019-04-05 10:14 ` Andrew Jones 2019-04-05 12:54 ` Dave Martin 2019-04-05 12:54 ` Dave Martin 2019-04-05 15:33 ` Andrew Jones 2019-04-05 15:33 ` Andrew Jones 2019-04-10 12:42 ` Dave Martin 2019-04-10 12:42 ` Dave Martin 2019-04-10 12:42 ` Dave Martin 2019-04-04 20:31 ` Andrew Jones 2019-04-04 20:31 ` Andrew Jones 2019-04-05 9:36 ` Dave Martin 2019-04-05 9:36 ` Dave Martin 2019-04-05 10:22 ` Andrew Jones 2019-04-05 10:22 ` Andrew Jones 2019-04-05 14:06 ` Dave Martin 2019-04-05 14:06 ` Dave Martin 2019-04-05 15:41 ` Andrew Jones 2019-04-05 15:41 ` Andrew Jones 2019-04-10 12:35 ` Dave Martin 2019-04-10 12:35 ` Dave Martin 2019-04-10 12:35 ` Dave Martin 2019-03-29 13:00 ` [PATCH v7 24/27] KVM: arm64/sve: Allow userspace to enable SVE for vcpus Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 20:36 ` Andrew Jones 2019-04-04 20:36 ` Andrew Jones 2019-03-29 13:00 ` [PATCH v7 25/27] KVM: arm64: Add a capability to advertise SVE support Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 20:39 ` Andrew Jones 2019-04-04 20:39 ` Andrew Jones 2019-03-29 13:00 ` [PATCH v7 26/27] KVM: Document errors for KVM_GET_ONE_REG and KVM_SET_ONE_REG Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-03 20:27 ` Andrew Jones 2019-04-03 20:27 ` Andrew Jones 2019-04-04 8:35 ` Dave Martin 2019-04-04 8:35 ` Dave Martin 2019-04-04 9:34 ` Andrew Jones 2019-04-04 9:34 ` Andrew Jones 2019-04-04 9:38 ` Dave P Martin 2019-04-04 9:38 ` Dave P Martin 2019-04-04 9:45 ` Andrew Jones 2019-04-04 9:45 ` Andrew Jones 2019-03-29 13:00 ` [PATCH v7 27/27] KVM: arm64/sve: Document KVM API extensions for SVE Dave Martin 2019-03-29 13:00 ` Dave Martin 2019-04-04 21:09 ` Andrew Jones 2019-04-04 21:09 ` Andrew Jones 2019-04-05 9:36 ` Dave Martin 2019-04-05 9:36 ` Dave Martin 2019-04-05 10:39 ` Andrew Jones 2019-04-05 10:39 ` Andrew Jones 2019-04-05 13:00 ` Dave Martin 2019-04-05 13:00 ` Dave Martin 2019-04-05 15:38 ` Andrew Jones 2019-04-05 15:38 ` Andrew Jones 2019-04-10 12:34 ` Dave Martin 2019-04-10 12:34 ` Dave Martin 2019-04-10 12:34 ` Dave Martin 2019-03-29 14:56 ` [PATCH v7 00/27] KVM: arm64: SVE guest support Marc Zyngier 2019-03-29 14:56 ` Marc Zyngier 2019-03-29 15:06 ` Dave Martin 2019-03-29 15:06 ` Dave Martin 2019-04-05 16:41 ` Dave Martin 2019-04-05 16:41 ` Dave Martin 2019-04-25 10:33 ` Alex Bennée 2019-04-25 10:33 ` Alex Bennée
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1553864452-15080-14-git-send-email-Dave.Martin@arm.com \ --to=dave.martin@arm.com \ --cc=ard.biesheuvel@linaro.org \ --cc=catalin.marinas@arm.com \ --cc=cdall@kernel.org \ --cc=julien.grall@arm.com \ --cc=kvmarm@lists.cs.columbia.edu \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=marc.zyngier@arm.com \ --cc=tokamoto@jp.fujitsu.com \ --cc=will.deacon@arm.com \ --cc=zhang.lei@jp.fujitsu.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.