From: Chris Wilson <chris@chris-wilson.co.uk>
To: Patchwork <patchwork@emeril.freedesktop.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev3)
Date: Tue, 24 Sep 2019 14:58:56 +0100 [thread overview]
Message-ID: <156933353618.4979.4136352881079885443@skylake-alporthouse-com> (raw)
In-Reply-To: <20190924134850.19568.14479@emeril.freedesktop.org>
Quoting Patchwork (2019-09-24 14:48:50)
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev3)
> URL : https://patchwork.freedesktop.org/series/67135/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6948 -> Patchwork_14514
> ====================================================
>
> Summary
> -------
>
> **SUCCESS**
>
> No regressions found.
>
> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14514/
That time fi-tgl-u was happy. I've stolen its heart.
-Chris
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next prev parent reply other threads:[~2019-09-24 13:58 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-23 23:02 [PATCH 1/2] drm/i915/selftests: Verify the LRC register layout between init and HW Chris Wilson
2019-09-23 23:02 ` [PATCH 2/2] drm/i915/tgl: Swap engines for rps (gpu reclocking) Chris Wilson
2019-09-24 7:09 ` [PATCH] drm/i915/tgl: Swap engines for no rc6/rps (gpu powersave and reclocking) Chris Wilson
2019-09-23 23:08 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW Patchwork
2019-09-23 23:31 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-24 7:17 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev2) Patchwork
2019-09-24 7:43 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-24 7:59 ` Chris Wilson
2019-09-24 10:21 ` [PATCH 1/2] drm/i915/selftests: Verify the LRC register layout between init and HW Mika Kuoppala
2019-09-24 10:43 ` Chris Wilson
2019-09-24 15:07 ` Mika Kuoppala
2019-09-24 11:00 ` Chris Wilson
2019-09-24 11:58 ` Mika Kuoppala
2019-09-24 13:23 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev3) Patchwork
2019-09-24 13:48 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-24 13:58 ` Chris Wilson [this message]
2019-09-24 14:59 ` [PATCH v2] drm/i915/selftests: Verify the LRC register layout between init and HW Chris Wilson
2019-09-24 15:04 ` Chris Wilson
2019-09-24 15:57 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev5) Patchwork
2019-09-24 16:25 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-25 6:56 ` ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2019-09-20 19:55 [PATCH 1/2] drm/i915/selftests: Verify the LRC register layout between init and HW Chris Wilson
2019-09-23 9:48 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev3) Patchwork
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