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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/selftests: Verify the LRC register layout between init and HW
Date: Tue, 24 Sep 2019 16:04:54 +0100	[thread overview]
Message-ID: <156933749494.4979.7750282800400668626@skylake-alporthouse-com> (raw)
In-Reply-To: <20190924145950.3011-1-chris@chris-wilson.co.uk>

Quoting Chris Wilson (2019-09-24 15:59:50)
> Before we submit the first context to HW, we need to construct a valid
> image of the register state. This layout is defined by the HW and should
> match the layout generated by HW when it saves the context image.
> Asserting that this should be equivalent should help avoid any undefined
> behaviour and verify that we haven't missed anything important!
> 
> Of course, having insisted that the initial register state within the
> LRC should match that returned by HW, we need to ensure that it does.
> 
> v2: Drop the RELATIVE_MMIO flag from gen11, we ignore it for
> constructing the lrc image.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Chatting with Mika, he was happy enough to give an r-b without the gen11
chunk. To REG16 or not to REG16 is a decision for later, it was not a
critical issue.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Chris
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  reply	other threads:[~2019-09-24 15:05 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-23 23:02 [PATCH 1/2] drm/i915/selftests: Verify the LRC register layout between init and HW Chris Wilson
2019-09-23 23:02 ` [PATCH 2/2] drm/i915/tgl: Swap engines for rps (gpu reclocking) Chris Wilson
2019-09-24  7:09   ` [PATCH] drm/i915/tgl: Swap engines for no rc6/rps (gpu powersave and reclocking) Chris Wilson
2019-09-23 23:08 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW Patchwork
2019-09-23 23:31 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-24  7:17 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev2) Patchwork
2019-09-24  7:43 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-24  7:59   ` Chris Wilson
2019-09-24 10:21 ` [PATCH 1/2] drm/i915/selftests: Verify the LRC register layout between init and HW Mika Kuoppala
2019-09-24 10:43   ` Chris Wilson
2019-09-24 15:07     ` Mika Kuoppala
2019-09-24 11:00   ` Chris Wilson
2019-09-24 11:58     ` Mika Kuoppala
2019-09-24 13:23 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev3) Patchwork
2019-09-24 13:48 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-24 13:58   ` Chris Wilson
2019-09-24 14:59 ` [PATCH v2] drm/i915/selftests: Verify the LRC register layout between init and HW Chris Wilson
2019-09-24 15:04   ` Chris Wilson [this message]
2019-09-24 15:57 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev5) Patchwork
2019-09-24 16:25 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-25  6:56 ` ✓ Fi.CI.IGT: " Patchwork

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