[PATCH] drm/i915/tgl: Swap engines for no rc6/rps (gpu powersave and reclocking)

[Chris Wilson <chris@chris-wilson.co.uk>]

If we disable rps, it appears the Tigerlake is stable enough to run
multiple engines simultaneously in CI. As disabling rps should only
cause the execution being slow, whereas many features depend on the
different engines, we would prefer to have the engines enabled while the
hangs are being debugged.

RPS was almost enough for CI, through in a bonus no RC6 as well!

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111714
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c2faa679658c..a180acb2e83b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -798,7 +798,8 @@ static const struct intel_device_info intel_tigerlake_12_info = {
 	.display.has_modular_fia = 1,
 	.engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
-	.engine_mask = BIT(RCS0), /* XXX reduced for debugging */
+	.has_rc6 = false, /* XXX disabled for debugging */
+	.has_rps = false, /* XXX disabled for debugging */
 };
 
 #undef GEN
-- 
2.23.0

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