✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev5)

From: Patchwork <patchwork@emeril.freedesktop.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev5)
Date: Tue, 24 Sep 2019 15:57:11 -0000	[thread overview]
Message-ID: <20190924155711.19570.22332@emeril.freedesktop.org> (raw)
In-Reply-To: <20190923230209.16480-1-chris@chris-wilson.co.uk>

== Series Details ==

Series: series starting with [v2] drm/i915/selftests: Verify the LRC register layout between init and HW (rev5)
URL   : https://patchwork.freedesktop.org/series/67135/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
48cb8fb0a186 drm/i915/selftests: Verify the LRC register layout between init and HW
-:65: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'x' - possible side-effects?
#65: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:481:
+#define REG(x) (((x) >> 2) | BUILD_BUG_ON_ZERO(x >= 0x200))

-:66: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#66: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:482:
+#define REG16(x) \
+	(((x) >> 9) | BIT(7) | BUILD_BUG_ON_ZERO(x >= 0x10000)), \
+	(((x) >> 2) & 0x7f)

-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'x' - possible side-effects?
#66: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:482:
+#define REG16(x) \
+	(((x) >> 9) | BIT(7) | BUILD_BUG_ON_ZERO(x >= 0x10000)), \
+	(((x) >> 2) & 0x7f)

total: 1 errors, 0 warnings, 2 checks, 1117 lines checked
87a5399333b9 drm/i915/tgl: Swap engines for no rc6/rps (gpu powersave and reclocking)

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx