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* [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
@ 2020-01-28 23:52 José Roberto de Souza
  2020-01-28 23:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers José Roberto de Souza
                   ` (5 more replies)
  0 siblings, 6 replies; 12+ messages in thread
From: José Roberto de Souza @ 2020-01-28 23:52 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter, Dhinakaran Pandiyan

dGFX have local memory so it do not have aperture and do not support
CPU fences but even for iGFX it have a small number of fences.

As replacement for fences to track frontbuffer modifications by CPU
we have a software tracking that is already in used by FBC and PSR.
PSR don't support fences so it shows that this tracking is reliable.

So lets make fences a nice-to-have to activate FBC for GEN9+(as we
only have a good CI coverage for GEN9+), this will allow us to enable
FBC for dGFXs and iGFXs even when there is no available fence.

intel_fbc_hw_tracking_covers_screen() maybe can also have the same
treatment as fences but BSpec is not clear if the size limitation is
for hardware tracking or general use of FBC and I don't have a 5K
display to test it, so keeping as is for safety.

Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 2a3f1333c8ff..1f0d24a1dec1 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -717,11 +717,15 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 		return false;
 	}
 
-	/* The use of a CPU fence is mandatory in order to detect writes
-	 * by the CPU to the scanout and trigger updates to the FBC.
+	/* The use of a CPU fence is one of two ways to detect writes by the
+	 * CPU to the scanout and trigger updates to the FBC.
+	 *
+	 * The other method is by software tracking(see
+	 * intel_fbc_invalidate/flush()), it will manually notify FBC and nuke
+	 * the current compressed buffer and recompress it.
 	 *
 	 * Note that is possible for a tiled surface to be unmappable (and
-	 * so have no fence associated with it) due to aperture constaints
+	 * so have no fence associated with it) due to aperture constraints
 	 * at the time of pinning.
 	 *
 	 * FIXME with 90/270 degree rotation we should use the fence on
@@ -730,7 +734,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 	 * For now this will effecively disable FBC with 90/270 degree
 	 * rotation.
 	 */
-	if (cache->fence_id < 0) {
+	if (cache->fence_id < 0 && INTEL_GEN(dev_priv) < 9) {
 		fbc->no_fbc_reason = "framebuffer not tiled or fenced";
 		return false;
 	}
-- 
2.25.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers
  2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
@ 2020-01-28 23:52 ` José Roberto de Souza
  2020-01-29 11:42   ` Ville Syrjälä
  2020-01-29  3:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ Patchwork
                   ` (4 subsequent siblings)
  5 siblings, 1 reply; 12+ messages in thread
From: José Roberto de Souza @ 2020-01-28 23:52 UTC (permalink / raw)
  To: intel-gfx; +Cc: Lucas De Marchi, Dhinakaran Pandiyan

From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>

dgfx platforms do not support CPU fence and FBC host tracking so
lets avoid write to removed registers.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 1f0d24a1dec1..12900b8ce28e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -314,7 +314,12 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
 		break;
 	}
 
-	if (params->fence_id >= 0) {
+	if (IS_DGFX(dev_priv)) {
+		/*
+		 * dGFX GPUs don't have apperture or fences and only rely on FBC
+		 * render nuke to track frontbuffer modifications
+		 */
+	} else if (params->fence_id >= 0) {
 		dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN;
 		intel_de_write(dev_priv, SNB_DPFC_CTL_SA,
 			       SNB_CPU_FENCE_ENABLE | params->fence_id);
-- 
2.25.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
  2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
  2020-01-28 23:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers José Roberto de Souza
@ 2020-01-29  3:19 ` Patchwork
  2020-01-29 11:44 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-01-29  3:19 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
URL   : https://patchwork.freedesktop.org/series/72698/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7833 -> Patchwork_16309
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16309 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16309, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16309:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_parallel@contexts:
    - fi-hsw-peppy:       NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-hsw-peppy/igt@gem_exec_parallel@contexts.html

  
Known issues
------------

  Here are the changes found in Patchwork_16309 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_backlight@basic-brightness:
    - fi-whl-u:           [PASS][2] -> [DMESG-WARN][3] ([i915#95]) +1 similar issue
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-whl-u/igt@i915_pm_backlight@basic-brightness.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-whl-u/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_selftest@live_blt:
    - fi-ivb-3770:        [PASS][4] -> [DMESG-FAIL][5] ([i915#770])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-ivb-3770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gtt:
    - fi-bdw-5557u:       [PASS][6] -> [TIMEOUT][7] ([fdo#112271])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-bdw-5557u/igt@i915_selftest@live_gtt.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-bdw-5557u/igt@i915_selftest@live_gtt.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [INCOMPLETE][8] ([i915#45]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-byt-j1900/igt@gem_close_race@basic-threads.html

  * igt@gem_exec_parallel@contexts:
    - fi-byt-n2820:       [TIMEOUT][10] ([fdo#112271]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-byt-n2820/igt@gem_exec_parallel@contexts.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-icl-u2:          [FAIL][12] ([fdo#103375]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-icl-u2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-icl-u2:          [FAIL][14] ([fdo#111550]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [DMESG-FAIL][16] ([i915#563]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-icl-guc:         [INCOMPLETE][18] ([i915#140]) -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-guc/igt@i915_selftest@live_gem_contexts.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-icl-guc/igt@i915_selftest@live_gem_contexts.html

  
#### Warnings ####

  * igt@gem_close_race@basic-threads:
    - fi-hsw-peppy:       [INCOMPLETE][20] ([i915#816]) -> [TIMEOUT][21] ([fdo#112271])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-hsw-peppy/igt@gem_close_race@basic-threads.html

  * igt@i915_pm_rpm@basic-rte:
    - fi-kbl-guc:         [FAIL][22] ([i915#579]) -> [SKIP][23] ([fdo#109271])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770:        [DMESG-FAIL][24] ([i915#725]) -> [DMESG-FAIL][25] ([i915#563])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-icl-u2:          [FAIL][26] ([fdo#103375]) -> [DMESG-WARN][27] ([IGT#4] / [i915#263])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7833/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html

  
  [IGT#4]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/4
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111550]: https://bugs.freedesktop.org/show_bug.cgi?id=111550
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#263]: https://gitlab.freedesktop.org/drm/intel/issues/263
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (50 -> 43)
------------------------------

  Additional (1): fi-snb-2520m 
  Missing    (8): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-ctg-p8600 fi-kbl-7560u fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7833 -> Patchwork_16309

  CI-20190529: 20190529
  CI_DRM_7833: 8210f0f999e2d396a8611e0cabc2f6c6a52468de @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5394: 991fd07bcd7add7a5beca2c95b72a994e62fbb75 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16309: 711facbac8e60cc5995d5d5eb64d969679aedba0 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

711facbac8e6 drm/i915/dgfx: Do not write in removed FBC fence registers
13e7bfd6489c drm/i915/display/fbc: Make fences a nice-to-have for GEN9+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16309/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers
  2020-01-28 23:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers José Roberto de Souza
@ 2020-01-29 11:42   ` Ville Syrjälä
  2020-02-04  2:06     ` Souza, Jose
  0 siblings, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2020-01-29 11:42 UTC (permalink / raw)
  To: José Roberto de Souza
  Cc: intel-gfx, Lucas De Marchi, Dhinakaran Pandiyan

On Tue, Jan 28, 2020 at 03:52:41PM -0800, José Roberto de Souza wrote:
> From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> 
> dgfx platforms do not support CPU fence and FBC host tracking so
> lets avoid write to removed registers.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 1f0d24a1dec1..12900b8ce28e 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -314,7 +314,12 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
>  		break;
>  	}
>  
> -	if (params->fence_id >= 0) {
> +	if (IS_DGFX(dev_priv)) {
> +		/*
> +		 * dGFX GPUs don't have apperture or fences and only rely on FBC
> +		 * render nuke to track frontbuffer modifications
> +		 */
> +	} else if (params->fence_id >= 0) {
>  		dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN;
>  		intel_de_write(dev_priv, SNB_DPFC_CTL_SA,
>  			       SNB_CPU_FENCE_ENABLE | params->fence_id);

if (fence) {
	do stuff
} else if (num_fences) {
	do other stuff
}

> -- 
> 2.25.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
  2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
  2020-01-28 23:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers José Roberto de Souza
  2020-01-29  3:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ Patchwork
@ 2020-01-29 11:44 ` Ville Syrjälä
  2020-01-29 11:58   ` Ville Syrjälä
  2020-01-30  2:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev2) Patchwork
                   ` (2 subsequent siblings)
  5 siblings, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2020-01-29 11:44 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: Daniel Vetter, intel-gfx, Dhinakaran Pandiyan

On Tue, Jan 28, 2020 at 03:52:40PM -0800, José Roberto de Souza wrote:
> dGFX have local memory so it do not have aperture and do not support
> CPU fences but even for iGFX it have a small number of fences.
> 
> As replacement for fences to track frontbuffer modifications by CPU
> we have a software tracking that is already in used by FBC and PSR.
> PSR don't support fences so it shows that this tracking is reliable.
> 
> So lets make fences a nice-to-have to activate FBC for GEN9+(as we
> only have a good CI coverage for GEN9+), this will allow us to enable
> FBC for dGFXs and iGFXs even when there is no available fence.
> 
> intel_fbc_hw_tracking_covers_screen() maybe can also have the same
> treatment as fences but BSpec is not clear if the size limitation is
> for hardware tracking or general use of FBC and I don't have a 5K
> display to test it, so keeping as is for safety.
> 
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 2a3f1333c8ff..1f0d24a1dec1 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -717,11 +717,15 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
>  		return false;
>  	}
>  
> -	/* The use of a CPU fence is mandatory in order to detect writes
> -	 * by the CPU to the scanout and trigger updates to the FBC.
> +	/* The use of a CPU fence is one of two ways to detect writes by the
> +	 * CPU to the scanout and trigger updates to the FBC.
> +	 *
> +	 * The other method is by software tracking(see
> +	 * intel_fbc_invalidate/flush()), it will manually notify FBC and nuke
> +	 * the current compressed buffer and recompress it.
>  	 *
>  	 * Note that is possible for a tiled surface to be unmappable (and
> -	 * so have no fence associated with it) due to aperture constaints
> +	 * so have no fence associated with it) due to aperture constraints
>  	 * at the time of pinning.
>  	 *
>  	 * FIXME with 90/270 degree rotation we should use the fence on
> @@ -730,7 +734,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
>  	 * For now this will effecively disable FBC with 90/270 degree
>  	 * rotation.
>  	 */
> -	if (cache->fence_id < 0) {
> +	if (cache->fence_id < 0 && INTEL_GEN(dev_priv) < 9) {

Not enough. We need to check that the tiling format is actually supported.
Also the tracking stuff is busted in intel ddx so need to get
https://patchwork.freedesktop.org/series/70636/ merged somehow.

>  		fbc->no_fbc_reason = "framebuffer not tiled or fenced";
>  		return false;
>  	}
> -- 
> 2.25.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
  2020-01-29 11:44 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
@ 2020-01-29 11:58   ` Ville Syrjälä
  2020-02-04  1:42     ` Souza, Jose
  0 siblings, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2020-01-29 11:58 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: Daniel Vetter, intel-gfx, Dhinakaran Pandiyan

On Wed, Jan 29, 2020 at 01:44:49PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 28, 2020 at 03:52:40PM -0800, José Roberto de Souza wrote:
> > dGFX have local memory so it do not have aperture and do not support
> > CPU fences but even for iGFX it have a small number of fences.
> > 
> > As replacement for fences to track frontbuffer modifications by CPU
> > we have a software tracking that is already in used by FBC and PSR.
> > PSR don't support fences so it shows that this tracking is reliable.
> > 
> > So lets make fences a nice-to-have to activate FBC for GEN9+(as we
> > only have a good CI coverage for GEN9+), this will allow us to enable
> > FBC for dGFXs and iGFXs even when there is no available fence.
> > 
> > intel_fbc_hw_tracking_covers_screen() maybe can also have the same
> > treatment as fences but BSpec is not clear if the size limitation is
> > for hardware tracking or general use of FBC and I don't have a 5K
> > display to test it, so keeping as is for safety.
> > 
> > Cc: Daniel Vetter <daniel.vetter@intel.com>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_fbc.c | 12 ++++++++----
> >  1 file changed, 8 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 2a3f1333c8ff..1f0d24a1dec1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -717,11 +717,15 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
> >  		return false;
> >  	}
> >  
> > -	/* The use of a CPU fence is mandatory in order to detect writes
> > -	 * by the CPU to the scanout and trigger updates to the FBC.
> > +	/* The use of a CPU fence is one of two ways to detect writes by the
> > +	 * CPU to the scanout and trigger updates to the FBC.
> > +	 *
> > +	 * The other method is by software tracking(see
> > +	 * intel_fbc_invalidate/flush()), it will manually notify FBC and nuke
> > +	 * the current compressed buffer and recompress it.
> >  	 *
> >  	 * Note that is possible for a tiled surface to be unmappable (and
> > -	 * so have no fence associated with it) due to aperture constaints
> > +	 * so have no fence associated with it) due to aperture constraints
> >  	 * at the time of pinning.
> >  	 *
> >  	 * FIXME with 90/270 degree rotation we should use the fence on
> > @@ -730,7 +734,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
> >  	 * For now this will effecively disable FBC with 90/270 degree
> >  	 * rotation.
> >  	 */
> > -	if (cache->fence_id < 0) {
> > +	if (cache->fence_id < 0 && INTEL_GEN(dev_priv) < 9) {
> 
> Not enough. We need to check that the tiling format is actually supported.

Actually not sure if all of them are or not. IIRC some docs just said
X/Y tile is supported (and in some other place linear was also listed).

> Also the tracking stuff is busted in intel ddx so need to get
> https://patchwork.freedesktop.org/series/70636/ merged somehow.
> 
> >  		fbc->no_fbc_reason = "framebuffer not tiled or fenced";
> >  		return false;
> >  	}
> > -- 
> > 2.25.0
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev2)
  2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
                   ` (2 preceding siblings ...)
  2020-01-29 11:44 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
@ 2020-01-30  2:44 ` Patchwork
  2020-02-04 20:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3) Patchwork
  2020-02-06 20:29 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  5 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-01-30  2:44 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev2)
URL   : https://patchwork.freedesktop.org/series/72698/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7839 -> Patchwork_16320
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16320 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16320, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16320:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - fi-bsw-kefka:       NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-bsw-kefka/igt@runner@aborted.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-cml-s:           [FAIL][2] ([fdo#103375]) -> [TIMEOUT][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-cml-s/igt@gem_exec_suspend@basic-s3.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-cml-s/igt@gem_exec_suspend@basic-s3.html

  
Known issues
------------

  Here are the changes found in Patchwork_16320 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_parallel@fds:
    - fi-byt-j1900:       [PASS][4] -> [FAIL][5] ([i915#694])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-byt-j1900/igt@gem_exec_parallel@fds.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-byt-j1900/igt@gem_exec_parallel@fds.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-whl-u:           [PASS][6] -> [DMESG-WARN][7] ([i915#95])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-whl-u/igt@i915_pm_backlight@basic-brightness.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-whl-u/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [PASS][8] -> [FAIL][9] ([i915#178])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-ivb-3770:        [PASS][10] -> [DMESG-FAIL][11] ([i915#725])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-ivb-3770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_execlists:
    - fi-icl-y:           [PASS][12] -> [DMESG-FAIL][13] ([fdo#108569])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-icl-y/igt@i915_selftest@live_execlists.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-icl-y/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-byt-j1900:       [PASS][14] -> [DMESG-FAIL][15] ([i915#722])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
    - fi-cfl-8700k:       [PASS][16] -> [INCOMPLETE][17] ([CI#80] / [i915#424])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-icl-u2:          [PASS][18] -> [FAIL][19] ([fdo#109635] / [i915#217])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-cml-s:           [FAIL][20] ([fdo#103375]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-cml-s/igt@gem_exec_suspend@basic-s0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-cml-s/igt@gem_exec_suspend@basic-s0.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][22] ([fdo#111407]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Warnings ####

  * igt@gem_exec_parallel@contexts:
    - fi-byt-n2820:       [TIMEOUT][24] ([fdo#112271]) -> [FAIL][25] ([i915#694])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7839/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/fi-byt-n2820/igt@gem_exec_parallel@contexts.html

  
  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (47 -> 46)
------------------------------

  Additional (3): fi-hsw-peppy fi-bsw-kefka fi-kbl-r 
  Missing    (4): fi-byt-squawks fi-bsw-cyan fi-bdw-samus fi-hsw-4200u 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7839 -> Patchwork_16320

  CI-20190529: 20190529
  CI_DRM_7839: 41a9319a45aaf77e220c8101d6ce76ec66036ffc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5406: 786c79af483a9f6e4688811f74116030c734ca1f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16320: 8d9305ecdde04643cbe63b66d40553c6dd072f1d @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

8d9305ecdde0 drm/i915/dgfx: Do not write in removed FBC fence registers
0abbba70e1a9 drm/i915/display/fbc: Make fences a nice-to-have for GEN9+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16320/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
  2020-01-29 11:58   ` Ville Syrjälä
@ 2020-02-04  1:42     ` Souza, Jose
  0 siblings, 0 replies; 12+ messages in thread
From: Souza, Jose @ 2020-02-04  1:42 UTC (permalink / raw)
  To: ville.syrjala; +Cc: Vetter, Daniel, intel-gfx, Pandiyan, Dhinakaran

On Wed, 2020-01-29 at 13:58 +0200, Ville Syrjälä wrote:
> On Wed, Jan 29, 2020 at 01:44:49PM +0200, Ville Syrjälä wrote:
> > On Tue, Jan 28, 2020 at 03:52:40PM -0800, José Roberto de Souza
> > wrote:
> > > dGFX have local memory so it do not have aperture and do not
> > > support
> > > CPU fences but even for iGFX it have a small number of fences.
> > > 
> > > As replacement for fences to track frontbuffer modifications by
> > > CPU
> > > we have a software tracking that is already in used by FBC and
> > > PSR.
> > > PSR don't support fences so it shows that this tracking is
> > > reliable.
> > > 
> > > So lets make fences a nice-to-have to activate FBC for GEN9+(as
> > > we
> > > only have a good CI coverage for GEN9+), this will allow us to
> > > enable
> > > FBC for dGFXs and iGFXs even when there is no available fence.
> > > 
> > > intel_fbc_hw_tracking_covers_screen() maybe can also have the
> > > same
> > > treatment as fences but BSpec is not clear if the size limitation
> > > is
> > > for hardware tracking or general use of FBC and I don't have a 5K
> > > display to test it, so keeping as is for safety.
> > > 
> > > Cc: Daniel Vetter <daniel.vetter@intel.com>
> > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_fbc.c | 12 ++++++++----
> > >  1 file changed, 8 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 2a3f1333c8ff..1f0d24a1dec1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -717,11 +717,15 @@ static bool intel_fbc_can_activate(struct
> > > intel_crtc *crtc)
> > >  		return false;
> > >  	}
> > >  
> > > -	/* The use of a CPU fence is mandatory in order to detect
> > > writes
> > > -	 * by the CPU to the scanout and trigger updates to the FBC.
> > > +	/* The use of a CPU fence is one of two ways to detect writes
> > > by the
> > > +	 * CPU to the scanout and trigger updates to the FBC.
> > > +	 *
> > > +	 * The other method is by software tracking(see
> > > +	 * intel_fbc_invalidate/flush()), it will manually notify FBC
> > > and nuke
> > > +	 * the current compressed buffer and recompress it.
> > >  	 *
> > >  	 * Note that is possible for a tiled surface to be unmappable
> > > (and
> > > -	 * so have no fence associated with it) due to aperture
> > > constaints
> > > +	 * so have no fence associated with it) due to aperture
> > > constraints
> > >  	 * at the time of pinning.
> > >  	 *
> > >  	 * FIXME with 90/270 degree rotation we should use the fence on
> > > @@ -730,7 +734,7 @@ static bool intel_fbc_can_activate(struct
> > > intel_crtc *crtc)
> > >  	 * For now this will effecively disable FBC with 90/270 degree
> > >  	 * rotation.
> > >  	 */
> > > -	if (cache->fence_id < 0) {
> > > +	if (cache->fence_id < 0 && INTEL_GEN(dev_priv) < 9) {
> > 
> > Not enough. We need to check that the tiling format is actually
> > supported.
> 
> Actually not sure if all of them are or not. IIRC some docs just said
> X/Y tile is supported (and in some other place linear was also
> listed).

Did some testing with kms_frontbuffer_tracking and linear works at
least in GEN12 with fences complete disabled, will do some testing in
GEN9 and GEN11 too and with the other types of tiling.

Any tips to find this documents? It was relevant for GEN9+?
Only thing that BSpec says is that FBC is not supported in RGB 16bpp
with planes rotated by 90 or 270.	

> 
> > Also the tracking stuff is busted in intel ddx so need to get
> > https://patchwork.freedesktop.org/series/70636/ merged somehow.

Ouch, hopefully no one using Intel DDX have PSR panels otherwise we
would have bug reports.

Well maybe until that is figure out, the check above could be
INTEL_GEN(dev_priv) < 11, if I remember correctly ICL is the first
platform not supported by DDX.

> > 
> > >  		fbc->no_fbc_reason = "framebuffer not tiled or fenced";
> > >  		return false;
> > >  	}
> > > -- 
> > > 2.25.0
> > > 
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > 
> > -- 
> > Ville Syrjälä
> > Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers
  2020-01-29 11:42   ` Ville Syrjälä
@ 2020-02-04  2:06     ` Souza, Jose
  2020-02-04 13:47       ` Ville Syrjälä
  0 siblings, 1 reply; 12+ messages in thread
From: Souza, Jose @ 2020-02-04  2:06 UTC (permalink / raw)
  To: ville.syrjala; +Cc: intel-gfx, De Marchi, Lucas, Pandiyan, Dhinakaran

On Wed, 2020-01-29 at 13:42 +0200, Ville Syrjälä wrote:
> On Tue, Jan 28, 2020 at 03:52:41PM -0800, José Roberto de Souza
> wrote:
> > From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> > 
> > dgfx platforms do not support CPU fence and FBC host tracking so
> > lets avoid write to removed registers.
> > 
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Matt Roper <matthew.d.roper@intel.com>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com
> > >
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_fbc.c | 7 ++++++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 1f0d24a1dec1..12900b8ce28e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -314,7 +314,12 @@ static void gen7_fbc_activate(struct
> > drm_i915_private *dev_priv)
> >  		break;
> >  	}
> >  
> > -	if (params->fence_id >= 0) {
> > +	if (IS_DGFX(dev_priv)) {
> > +		/*
> > +		 * dGFX GPUs don't have apperture or fences and only
> > rely on FBC
> > +		 * render nuke to track frontbuffer modifications
> > +		 */
> > +	} else if (params->fence_id >= 0) {
> >  		dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN;
> >  		intel_de_write(dev_priv, SNB_DPFC_CTL_SA,
> >  			       SNB_CPU_FENCE_ENABLE | params-
> > >fence_id);
> 
> if (fence) {
> 	do stuff
> } else if (num_fences) {
> 	do other stuff
> }

Did not get what you want here.
It is covering all cases:
- DGFX that don't have the registers
- Setting the registers when fence_id >= 0
- Clearing the register when fences_id == -1

> 
> > -- 
> > 2.25.0
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers
  2020-02-04  2:06     ` Souza, Jose
@ 2020-02-04 13:47       ` Ville Syrjälä
  0 siblings, 0 replies; 12+ messages in thread
From: Ville Syrjälä @ 2020-02-04 13:47 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx, De Marchi, Lucas, Pandiyan, Dhinakaran

On Tue, Feb 04, 2020 at 02:06:23AM +0000, Souza, Jose wrote:
> On Wed, 2020-01-29 at 13:42 +0200, Ville Syrjälä wrote:
> > On Tue, Jan 28, 2020 at 03:52:41PM -0800, José Roberto de Souza
> > wrote:
> > > From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> > > 
> > > dgfx platforms do not support CPU fence and FBC host tracking so
> > > lets avoid write to removed registers.
> > > 
> > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > Cc: Matt Roper <matthew.d.roper@intel.com>
> > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com
> > > >
> > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_fbc.c | 7 ++++++-
> > >  1 file changed, 6 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 1f0d24a1dec1..12900b8ce28e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -314,7 +314,12 @@ static void gen7_fbc_activate(struct
> > > drm_i915_private *dev_priv)
> > >  		break;
> > >  	}
> > >  
> > > -	if (params->fence_id >= 0) {
> > > +	if (IS_DGFX(dev_priv)) {
> > > +		/*
> > > +		 * dGFX GPUs don't have apperture or fences and only
> > > rely on FBC
> > > +		 * render nuke to track frontbuffer modifications
> > > +		 */
> > > +	} else if (params->fence_id >= 0) {
> > >  		dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN;
> > >  		intel_de_write(dev_priv, SNB_DPFC_CTL_SA,
> > >  			       SNB_CPU_FENCE_ENABLE | params-
> > > >fence_id);
> > 
> > if (fence) {
> > 	do stuff
> > } else if (num_fences) {
> > 	do other stuff
> > }
> 
> Did not get what you want here.

Don't add a silly looking empty if block.

And don't make the assumption that dgfx is the only thing that
has no fences, instead actually check if we have fences or not.

> It is covering all cases:
> - DGFX that don't have the registers
> - Setting the registers when fence_id >= 0
> - Clearing the register when fences_id == -1
> 
> > 
> > > -- 
> > > 2.25.0
> > > 
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3)
  2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
                   ` (3 preceding siblings ...)
  2020-01-30  2:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev2) Patchwork
@ 2020-02-04 20:58 ` Patchwork
  2020-02-06 20:29 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  5 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-02-04 20:58 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3)
URL   : https://patchwork.freedesktop.org/series/72698/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16405
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/index.html

Known issues
------------

  Here are the changes found in Patchwork_16405 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-n2820:       [PASS][1] -> [INCOMPLETE][2] ([i915#45])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-n2820/igt@gem_close_race@basic-threads.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-byt-n2820/igt@gem_close_race@basic-threads.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-whl-u:           [PASS][3] -> [DMESG-WARN][4] ([i915#95]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-whl-u/igt@i915_pm_backlight@basic-brightness.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-whl-u/igt@i915_pm_backlight@basic-brightness.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][5] -> [DMESG-WARN][6] ([i915#44])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_parallel@fds:
    - fi-byt-j1900:       [FAIL][7] ([i915#694]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-j1900/igt@gem_exec_parallel@fds.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-byt-j1900/igt@gem_exec_parallel@fds.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [FAIL][9] ([i915#178]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770:        [DMESG-FAIL][11] ([i915#725]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_execlists:
    - fi-icl-y:           [DMESG-FAIL][13] ([fdo#108569]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-icl-y/igt@i915_selftest@live_execlists.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-icl-y/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-byt-j1900:       [DMESG-FAIL][15] ([i915#1052]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html

  * igt@i915_selftest@live_gtt:
    - fi-skl-6600u:       [TIMEOUT][17] ([fdo#111732] / [fdo#112271]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-skl-6600u/igt@i915_selftest@live_gtt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-skl-6600u/igt@i915_selftest@live_gtt.html

  * igt@i915_selftest@live_perf:
    - fi-apl-guc:         [INCOMPLETE][19] ([fdo#103927]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-apl-guc/igt@i915_selftest@live_perf.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-apl-guc/igt@i915_selftest@live_perf.html

  
#### Warnings ####

  * igt@gem_exec_parallel@contexts:
    - fi-byt-j1900:       [TIMEOUT][21] ([fdo#112271] / [i915#1084]) -> [TIMEOUT][22] ([fdo#112271])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-byt-j1900/igt@gem_exec_parallel@contexts.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-byt-j1900/igt@gem_exec_parallel@contexts.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-kbl-guc:         [SKIP][23] ([fdo#109271]) -> [FAIL][24] ([i915#704])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html

  
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1052]: https://gitlab.freedesktop.org/drm/intel/issues/1052
  [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
  [i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
  [i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#704]: https://gitlab.freedesktop.org/drm/intel/issues/704
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (50 -> 44)
------------------------------

  Additional (3): fi-skl-lmem fi-glk-dsi fi-snb-2520m 
  Missing    (9): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-byt-squawks fi-ctg-p8600 fi-bsw-kefka fi-tgl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7864 -> Patchwork_16405

  CI-20190529: 20190529
  CI_DRM_7864: 5a140e2fc771e4c8b10d14e2db7bfb4996ee9d8a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5417: 33cc93c8ba5daa0b7498f297a4f626844d895d06 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16405: 3adc6e19d4d5a9ebcbd6f79c44e07e280f93e20b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

3adc6e19d4d5 drm/i915/dgfx: Do not write in removed FBC fence registers
be1a38bca1e8 drm/i915/display/fbc: Make fences a nice-to-have for GEN9+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3)
  2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
                   ` (4 preceding siblings ...)
  2020-02-04 20:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3) Patchwork
@ 2020-02-06 20:29 ` Patchwork
  5 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-02-06 20:29 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3)
URL   : https://patchwork.freedesktop.org/series/72698/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7864_full -> Patchwork_16405_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16405_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16405_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16405_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_big_fb@linear-16bpp-rotate-0:
    - shard-glk:          [PASS][1] -> [FAIL][2] +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk7/igt@kms_big_fb@linear-16bpp-rotate-0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk4/igt@kms_big_fb@linear-16bpp-rotate-0.html

  * igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary:
    - shard-iclb:         [PASS][3] -> [INCOMPLETE][4] +11 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html

  
Known issues
------------

  Here are the changes found in Patchwork_16405_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vecs0-s3:
    - shard-skl:          [PASS][5] -> [INCOMPLETE][6] ([i915#69])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-skl10/igt@gem_ctx_isolation@vecs0-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-skl6/igt@gem_ctx_isolation@vecs0-s3.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#110841])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb8/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-hsw:          [PASS][9] -> [INCOMPLETE][10] ([CI#80] / [i915#61])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-hsw7/igt@gem_eio@in-flight-contexts-1us.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-hsw5/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_exec_schedule@pi-userfault-bsd2:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#109276]) +7 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd2.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb3/igt@gem_exec_schedule@pi-userfault-bsd2.html

  * igt@gem_partial_pwrite_pread@write-display:
    - shard-hsw:          [PASS][13] -> [FAIL][14] ([i915#694]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-hsw7/igt@gem_partial_pwrite_pread@write-display.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-hsw6/igt@gem_partial_pwrite_pread@write-display.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [PASS][15] -> [FAIL][16] ([i915#644])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk1/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk1/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_wait@busy-vcs1:
    - shard-iclb:         [PASS][17] -> [SKIP][18] ([fdo#112080]) +3 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb2/igt@gem_wait@busy-vcs1.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb5/igt@gem_wait@busy-vcs1.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][19] -> [DMESG-WARN][20] ([i915#180])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-apl2/igt@gem_workarounds@suspend-resume-context.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-apl1/igt@gem_workarounds@suspend-resume-context.html

  * igt@kms_atomic_transition@plane-primary-toggle-with-vblank-wait:
    - shard-apl:          [PASS][21] -> [DMESG-WARN][22] ([i915#95]) +71 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-apl7/igt@kms_atomic_transition@plane-primary-toggle-with-vblank-wait.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-apl7/igt@kms_atomic_transition@plane-primary-toggle-with-vblank-wait.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-90:
    - shard-tglb:         [PASS][23] -> [DMESG-FAIL][24] ([i915#402])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-tglb7/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-tglb6/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html
    - shard-iclb:         [PASS][25] -> [DMESG-FAIL][26] ([fdo#107724])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb4/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb2/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html

  * igt@kms_busy@extended-pageflip-hang-oldfb-render-pipe-c:
    - shard-kbl:          [PASS][27] -> [DMESG-WARN][28] ([i915#93] / [i915#95]) +48 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-kbl2/igt@kms_busy@extended-pageflip-hang-oldfb-render-pipe-c.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-kbl2/igt@kms_busy@extended-pageflip-hang-oldfb-render-pipe-c.html

  * igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen:
    - shard-kbl:          [PASS][29] -> [DMESG-FAIL][30] ([i915#54] / [i915#95])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html

  * igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
    - shard-glk:          [PASS][31] -> [FAIL][32] ([i915#177] / [i915#52] / [i915#54])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk9/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html

  * igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled:
    - shard-glk:          [PASS][33] -> [FAIL][34] ([i915#52] / [i915#54]) +3 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk7/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-tglb:         [PASS][35] -> [INCOMPLETE][36] ([i915#460] / [i915#472])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-tglb3/igt@kms_fbcon_fbt@psr-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-tglb7/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-glk:          [PASS][37] -> [FAIL][38] ([i915#79])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-kbl:          [PASS][39] -> [DMESG-WARN][40] ([i915#180]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-skl:          [PASS][41] -> [FAIL][42] ([i915#34])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][43] -> [DMESG-WARN][44] ([i915#180] / [i915#93] / [i915#95])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-iclb:         [PASS][45] -> [INCOMPLETE][46] ([i915#123]) +22 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
    - shard-tglb:         [PASS][47] -> [SKIP][48] ([i915#668])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-tglb3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-farfromfence:
    - shard-tglb:         [PASS][49] -> [INCOMPLETE][50] ([i915#472]) +30 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-tglb1/igt@kms_frontbuffer_tracking@psr-farfromfence.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-tglb3/igt@kms_frontbuffer_tracking@psr-farfromfence.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c-frame-sequence:
    - shard-skl:          [PASS][51] -> [FAIL][52] ([i915#53])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-skl7/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c-frame-sequence.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-skl2/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c-frame-sequence.html

  * igt@kms_plane_cursor@pipe-a-overlay-size-128:
    - shard-kbl:          [PASS][53] -> [DMESG-FAIL][54] ([i915#95])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-kbl2/igt@kms_plane_cursor@pipe-a-overlay-size-128.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-kbl3/igt@kms_plane_cursor@pipe-a-overlay-size-128.html
    - shard-apl:          [PASS][55] -> [DMESG-FAIL][56] ([i915#95]) +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-apl3/igt@kms_plane_cursor@pipe-a-overlay-size-128.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-apl6/igt@kms_plane_cursor@pipe-a-overlay-size-128.html

  * igt@kms_plane_lowres@pipe-a-tiling-yf:
    - shard-glk:          [PASS][57] -> [FAIL][58] ([i915#899]) +1 similar issue
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk7/igt@kms_plane_lowres@pipe-a-tiling-yf.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk5/igt@kms_plane_lowres@pipe-a-tiling-yf.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [PASS][59] -> [SKIP][60] ([fdo#109441])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb5/igt@kms_psr@psr2_sprite_render.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-glk:          [PASS][61] -> [FAIL][62] ([i915#1041]) +2 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk2/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk6/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  * igt@kms_vblank@pipe-b-query-forked-busy-hang:
    - shard-snb:          [PASS][63] -> [INCOMPLETE][64] ([CI#80] / [i915#82])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-snb5/igt@kms_vblank@pipe-b-query-forked-busy-hang.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-snb4/igt@kms_vblank@pipe-b-query-forked-busy-hang.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-iclb:         [SKIP][65] ([fdo#112080]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb8/igt@gem_ctx_isolation@vcs1-s3.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb1/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
    - shard-iclb:         [SKIP][67] ([fdo#109276]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd2.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd2.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][69] ([fdo#112146]) -> [PASS][70] +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb7/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-display:
    - shard-hsw:          [FAIL][71] ([i915#694]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-hsw7/igt@gem_partial_pwrite_pread@writes-after-reads-display.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-hsw5/igt@gem_partial_pwrite_pread@writes-after-reads-display.html

  * igt@gem_workarounds@suspend-resume:
    - shard-apl:          [DMESG-WARN][73] ([i915#180]) -> [PASS][74] +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-apl1/igt@gem_workarounds@suspend-resume.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-apl6/igt@gem_workarounds@suspend-resume.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-skl:          [FAIL][75] ([i915#454]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-skl8/igt@i915_pm_dc@dc6-psr.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-skl7/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-glk:          [FAIL][77] ([i915#79]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][79] ([i915#79]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-kbl:          [DMESG-WARN][81] ([i915#180]) -> [PASS][82] +3 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-glk:          [FAIL][83] ([i915#899]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-glk8/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-glk8/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@prime_mmap_coherency@ioctl-errors:
    - shard-hsw:          [FAIL][85] ([i915#831]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-hsw5/igt@prime_mmap_coherency@ioctl-errors.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-hsw8/igt@prime_mmap_coherency@ioctl-errors.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [SKIP][87] ([fdo#112080]) -> [FAIL][88] ([IGT#28])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-tglb:         [FAIL][89] ([i915#454]) -> [SKIP][90] ([i915#468])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-tglb6/igt@i915_pm_dc@dc6-dpms.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_selftest@live_blt:
    - shard-hsw:          [DMESG-FAIL][91] ([i915#725]) -> [DMESG-FAIL][92] ([i915#553] / [i915#725])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-hsw7/igt@i915_selftest@live_blt.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-hsw1/igt@i915_selftest@live_blt.html

  * igt@kms_content_protection@srm:
    - shard-kbl:          [FAIL][93] ([fdo#110321]) -> [DMESG-FAIL][94] ([fdo#110321] / [i915#95])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-kbl6/igt@kms_content_protection@srm.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-kbl4/igt@kms_content_protection@srm.html
    - shard-apl:          [FAIL][95] ([fdo#110321]) -> [DMESG-FAIL][96] ([fdo#110321] / [i915#95])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7864/shard-apl7/igt@kms_content_protection@srm.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/shard-apl1/igt@kms_content_protection@srm.html

  
  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#1041]: https://gitlab.freedesktop.org/drm/intel/issues/1041
  [i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123
  [i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#460]: https://gitlab.freedesktop.org/drm/intel/issues/460
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
  [i915#53]: https://gitlab.freedesktop.org/drm/intel/issues/53
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831
  [i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899
  [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (10 -> 9)
------------------------------

  Missing    (1): pig-skl-6260u 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7864 -> Patchwork_16405

  CI-20190529: 20190529
  CI_DRM_7864: 5a140e2fc771e4c8b10d14e2db7bfb4996ee9d8a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5417: 33cc93c8ba5daa0b7498f297a4f626844d895d06 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16405: 3adc6e19d4d5a9ebcbd6f79c44e07e280f93e20b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16405/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2020-02-06 20:29 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
2020-01-28 23:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers José Roberto de Souza
2020-01-29 11:42   ` Ville Syrjälä
2020-02-04  2:06     ` Souza, Jose
2020-02-04 13:47       ` Ville Syrjälä
2020-01-29  3:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ Patchwork
2020-01-29 11:44 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
2020-01-29 11:58   ` Ville Syrjälä
2020-02-04  1:42     ` Souza, Jose
2020-01-30  2:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev2) Patchwork
2020-02-04 20:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3) Patchwork
2020-02-06 20:29 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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