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* [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
@ 2020-01-28 23:52 José Roberto de Souza
  2020-01-28 23:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers José Roberto de Souza
                   ` (5 more replies)
  0 siblings, 6 replies; 12+ messages in thread
From: José Roberto de Souza @ 2020-01-28 23:52 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter, Dhinakaran Pandiyan

dGFX have local memory so it do not have aperture and do not support
CPU fences but even for iGFX it have a small number of fences.

As replacement for fences to track frontbuffer modifications by CPU
we have a software tracking that is already in used by FBC and PSR.
PSR don't support fences so it shows that this tracking is reliable.

So lets make fences a nice-to-have to activate FBC for GEN9+(as we
only have a good CI coverage for GEN9+), this will allow us to enable
FBC for dGFXs and iGFXs even when there is no available fence.

intel_fbc_hw_tracking_covers_screen() maybe can also have the same
treatment as fences but BSpec is not clear if the size limitation is
for hardware tracking or general use of FBC and I don't have a 5K
display to test it, so keeping as is for safety.

Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 2a3f1333c8ff..1f0d24a1dec1 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -717,11 +717,15 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 		return false;
 	}
 
-	/* The use of a CPU fence is mandatory in order to detect writes
-	 * by the CPU to the scanout and trigger updates to the FBC.
+	/* The use of a CPU fence is one of two ways to detect writes by the
+	 * CPU to the scanout and trigger updates to the FBC.
+	 *
+	 * The other method is by software tracking(see
+	 * intel_fbc_invalidate/flush()), it will manually notify FBC and nuke
+	 * the current compressed buffer and recompress it.
 	 *
 	 * Note that is possible for a tiled surface to be unmappable (and
-	 * so have no fence associated with it) due to aperture constaints
+	 * so have no fence associated with it) due to aperture constraints
 	 * at the time of pinning.
 	 *
 	 * FIXME with 90/270 degree rotation we should use the fence on
@@ -730,7 +734,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 	 * For now this will effecively disable FBC with 90/270 degree
 	 * rotation.
 	 */
-	if (cache->fence_id < 0) {
+	if (cache->fence_id < 0 && INTEL_GEN(dev_priv) < 9) {
 		fbc->no_fbc_reason = "framebuffer not tiled or fenced";
 		return false;
 	}
-- 
2.25.0

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^ permalink raw reply related	[flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-02-06 20:29 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-28 23:52 [Intel-gfx] [PATCH 1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ José Roberto de Souza
2020-01-28 23:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/dgfx: Do not write in removed FBC fence registers José Roberto de Souza
2020-01-29 11:42   ` Ville Syrjälä
2020-02-04  2:06     ` Souza, Jose
2020-02-04 13:47       ` Ville Syrjälä
2020-01-29  3:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ Patchwork
2020-01-29 11:44 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
2020-01-29 11:58   ` Ville Syrjälä
2020-02-04  1:42     ` Souza, Jose
2020-01-30  2:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev2) Patchwork
2020-02-04 20:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3) Patchwork
2020-02-06 20:29 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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