* [PATCH v2 0/4] arm: dts: renesas: Add reset control properties for display
@ 2020-02-18 13:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc,
linux-arm-kernel, Geert Uytterhoeven
Hi all,
This patch series adds reset control properties to the device nodes for
the Display Units on all supported R-Car Gen2 and Gen3, RZ/G1, and RZ/G2
SoCs.
Changes compared to v1:
- Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
- Drop LVDS reset, as LVDS is now a separate node,
- Extend from R-Car H3 to all supported R-Car Gen2/3, RZ/G1, RZ/G2.
I intend to queue this in renesas-devel for v5.7.
Thanks!
Geert Uytterhoeven (4):
ARM: dts: rcar-gen2: Add reset control properties for display
ARM: dts: rzg1: Add reset control properties for display
arm64: dts: renesas: rcar-gen3: Add reset control properties for
display
arm64: dts: renesas: rzg2: Add reset control properties for display
arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
arch/arm/boot/dts/r8a7745.dtsi | 2 ++
arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
arch/arm/boot/dts/r8a7790.dtsi | 2 ++
arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
arch/arm/boot/dts/r8a7794.dtsi | 2 ++
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
19 files changed, 47 insertions(+), 30 deletions(-)
--
2.17.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v2 0/4] arm: dts: renesas: Add reset control properties for display
@ 2020-02-18 13:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: linux-renesas-soc, Geert Uytterhoeven, Kieran Bingham,
Laurent Pinchart, linux-arm-kernel
Hi all,
This patch series adds reset control properties to the device nodes for
the Display Units on all supported R-Car Gen2 and Gen3, RZ/G1, and RZ/G2
SoCs.
Changes compared to v1:
- Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
- Drop LVDS reset, as LVDS is now a separate node,
- Extend from R-Car H3 to all supported R-Car Gen2/3, RZ/G1, RZ/G2.
I intend to queue this in renesas-devel for v5.7.
Thanks!
Geert Uytterhoeven (4):
ARM: dts: rcar-gen2: Add reset control properties for display
ARM: dts: rzg1: Add reset control properties for display
arm64: dts: renesas: rcar-gen3: Add reset control properties for
display
arm64: dts: renesas: rzg2: Add reset control properties for display
arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
arch/arm/boot/dts/r8a7745.dtsi | 2 ++
arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
arch/arm/boot/dts/r8a7790.dtsi | 2 ++
arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
arch/arm/boot/dts/r8a7794.dtsi | 2 ++
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
19 files changed, 47 insertions(+), 30 deletions(-)
--
2.17.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-18 13:30 ` Geert Uytterhoeven
-1 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc,
linux-arm-kernel, Geert Uytterhoeven
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
only a single reset for all DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- New.
---
arch/arm/boot/dts/r8a7790.dtsi | 2 ++
arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
arch/arm/boot/dts/r8a7794.dtsi | 2 ++
5 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 334ba19769b998ac..e5ef9fd4284ae436 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1719,6 +1719,8 @@
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>;
clock-names = "du.0", "du.1", "du.2";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index baedfab84cb09134..e38a5f01490d70a1 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1682,9 +1682,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 39af16caa2aef501..4627eefa502b7677 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -852,9 +852,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index eef035c4d98341b6..dadbda16161b7457 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -1341,9 +1341,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 05ef79c6ed7f6b61..2c9e7a1ebfec1863 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -1356,6 +1356,8 @@
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
@ 2020-02-18 13:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: linux-renesas-soc, Geert Uytterhoeven, Kieran Bingham,
Laurent Pinchart, linux-arm-kernel
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
only a single reset for all DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- New.
---
arch/arm/boot/dts/r8a7790.dtsi | 2 ++
arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
arch/arm/boot/dts/r8a7794.dtsi | 2 ++
5 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 334ba19769b998ac..e5ef9fd4284ae436 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1719,6 +1719,8 @@
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>;
clock-names = "du.0", "du.1", "du.2";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index baedfab84cb09134..e38a5f01490d70a1 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1682,9 +1682,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 39af16caa2aef501..4627eefa502b7677 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -852,9 +852,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index eef035c4d98341b6..dadbda16161b7457 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -1341,9 +1341,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 05ef79c6ed7f6b61..2c9e7a1ebfec1863 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -1356,6 +1356,8 @@
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 2/4] ARM: dts: rzg1: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-18 13:30 ` Geert Uytterhoeven
-1 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc,
linux-arm-kernel, Geert Uytterhoeven
Add reset control properties to the devices node for the Display Units
on all supported RZ/G1 SoCs. Note that on these SoCs, there is only a
single reset for all DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- New.
---
arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
arch/arm/boot/dts/r8a7745.dtsi | 2 ++
arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
4 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 1cd19a569bd0fb66..e8b340bb99bc3031 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1669,9 +1669,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 1c82dd0abd76c4c9..def840b8b2d3c0c4 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1655,9 +1655,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 3b413658eb8d8fac..7ab58d8bb74010d6 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1510,6 +1510,8 @@
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 6efcef1670e15a95..f5515319227609a4 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -942,9 +942,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 2/4] ARM: dts: rzg1: Add reset control properties for display
@ 2020-02-18 13:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: linux-renesas-soc, Geert Uytterhoeven, Kieran Bingham,
Laurent Pinchart, linux-arm-kernel
Add reset control properties to the devices node for the Display Units
on all supported RZ/G1 SoCs. Note that on these SoCs, there is only a
single reset for all DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- New.
---
arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
arch/arm/boot/dts/r8a7745.dtsi | 2 ++
arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
4 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 1cd19a569bd0fb66..e8b340bb99bc3031 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1669,9 +1669,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 1c82dd0abd76c4c9..def840b8b2d3c0c4 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1655,9 +1655,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 3b413658eb8d8fac..7ab58d8bb74010d6 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1510,6 +1510,8 @@
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 6efcef1670e15a95..f5515319227609a4 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -942,9 +942,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
status = "disabled";
ports {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-18 13:30 ` Geert Uytterhoeven
-1 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc,
linux-arm-kernel, Geert Uytterhoeven
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
only a single reset for each pair of DU channels.
The display nodes on R-Car V3M and V3H already had "resets" properties,
but lacked the corresponding "reset-names" properties.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
- Drop LVDS reset, as LVDS is now a separate node,
- Add other R-Car Gen3 SoCs.
---
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
7 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 27cbe697490c7c78..52229546454c400a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -3177,11 +3177,11 @@
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>,
- <&cpg CPG_MOD 721>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.2", "du.3";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.2";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index ea03b91bdf9d9cbc..31282367d3acd8cf 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2827,10 +2827,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>;
clock-names = "du.0", "du.1", "du.2";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.2";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 1a20ebe9ea5be5da..f7468822e81e41d6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -2503,10 +2503,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.3";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.3";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index dbf1c677dbc6e51f..a009c0ebc8b4f8d0 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -1121,6 +1121,7 @@
clock-names = "du.0";
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
resets = <&cpg 724>;
+ reset-names = "du.0";
renesas,vsps = <&vspd0 0>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 9444347e61eb881d..e01b0508a18fa91a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -1491,6 +1491,7 @@
clock-names = "du.0";
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 724>;
+ reset-names = "du.0";
renesas,vsps = <&vspd0 0>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index c05ee98043b2c7a5..0ad20b78e6eb62fd 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1793,8 +1793,7 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
resets = <&cpg 724>;
reset-names = "du.0";
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 7d3102dccac96e42..e8d2290fe79d761a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -1026,8 +1026,7 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
resets = <&cpg 724>;
reset-names = "du.0";
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
@ 2020-02-18 13:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: linux-renesas-soc, Geert Uytterhoeven, Kieran Bingham,
Laurent Pinchart, linux-arm-kernel
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
only a single reset for each pair of DU channels.
The display nodes on R-Car V3M and V3H already had "resets" properties,
but lacked the corresponding "reset-names" properties.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
- Drop LVDS reset, as LVDS is now a separate node,
- Add other R-Car Gen3 SoCs.
---
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
7 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 27cbe697490c7c78..52229546454c400a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -3177,11 +3177,11 @@
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>,
- <&cpg CPG_MOD 721>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.2", "du.3";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.2";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index ea03b91bdf9d9cbc..31282367d3acd8cf 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2827,10 +2827,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>;
clock-names = "du.0", "du.1", "du.2";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.2";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 1a20ebe9ea5be5da..f7468822e81e41d6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -2503,10 +2503,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.3";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.3";
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index dbf1c677dbc6e51f..a009c0ebc8b4f8d0 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -1121,6 +1121,7 @@
clock-names = "du.0";
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
resets = <&cpg 724>;
+ reset-names = "du.0";
renesas,vsps = <&vspd0 0>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 9444347e61eb881d..e01b0508a18fa91a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -1491,6 +1491,7 @@
clock-names = "du.0";
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 724>;
+ reset-names = "du.0";
renesas,vsps = <&vspd0 0>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index c05ee98043b2c7a5..0ad20b78e6eb62fd 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1793,8 +1793,7 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
resets = <&cpg 724>;
reset-names = "du.0";
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 7d3102dccac96e42..e8d2290fe79d761a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -1026,8 +1026,7 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
resets = <&cpg 724>;
reset-names = "du.0";
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 4/4] arm64: dts: renesas: rzg2: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-18 13:30 ` Geert Uytterhoeven
-1 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc,
linux-arm-kernel, Geert Uytterhoeven
Add reset control properties to the device nodes for the Display Units
on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
single reset for each pair of DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- New.
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 5 +++--
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 507e78ebaab52330..79023433a740b7ca 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -2634,10 +2634,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>;
clock-names = "du.0", "du.1", "du.2";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.2";
status = "disabled";
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index 93dd10b5d6d05712..3137f735974be165 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -2480,10 +2480,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.3";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.3";
status = "disabled";
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index d4eee8fef35da74e..22785cbddff5d08c 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -1810,9 +1810,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
renesas,vsps = <&vspd0 0>, <&vspd1 0>;
status = "disabled";
--
2.17.1
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v2 4/4] arm64: dts: renesas: rzg2: Add reset control properties for display
@ 2020-02-18 13:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-18 13:30 UTC (permalink / raw)
To: Magnus Damm
Cc: linux-renesas-soc, Geert Uytterhoeven, Kieran Bingham,
Laurent Pinchart, linux-arm-kernel
Add reset control properties to the device nodes for the Display Units
on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
single reset for each pair of DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
- New.
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 5 +++--
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 5 +++--
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 507e78ebaab52330..79023433a740b7ca 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -2634,10 +2634,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>;
clock-names = "du.0", "du.1", "du.2";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.2";
status = "disabled";
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index 93dd10b5d6d05712..3137f735974be165 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -2480,10 +2480,11 @@
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.3";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.3";
status = "disabled";
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index d4eee8fef35da74e..22785cbddff5d08c 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -1810,9 +1810,10 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
renesas,vsps = <&vspd0 0>, <&vspd1 0>;
status = "disabled";
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 10:59 ` Ulrich Hecht
-1 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 10:59 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
> only a single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 2 ++
> arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7794.dtsi | 2 ++
> 5 files changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 334ba19769b998ac..e5ef9fd4284ae436 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -1719,6 +1719,8 @@
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index baedfab84cb09134..e38a5f01490d70a1 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -1682,9 +1682,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 39af16caa2aef501..4627eefa502b7677 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -852,9 +852,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index eef035c4d98341b6..dadbda16161b7457 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -1341,9 +1341,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 05ef79c6ed7f6b61..2c9e7a1ebfec1863 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1356,6 +1356,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> --
> 2.17.1
>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
CU
Uli
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
@ 2020-02-19 10:59 ` Ulrich Hecht
0 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 10:59 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: linux-renesas-soc, Kieran Bingham, Laurent Pinchart, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
> only a single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 2 ++
> arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7794.dtsi | 2 ++
> 5 files changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 334ba19769b998ac..e5ef9fd4284ae436 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -1719,6 +1719,8 @@
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index baedfab84cb09134..e38a5f01490d70a1 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -1682,9 +1682,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 39af16caa2aef501..4627eefa502b7677 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -852,9 +852,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index eef035c4d98341b6..dadbda16161b7457 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -1341,9 +1341,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 05ef79c6ed7f6b61..2c9e7a1ebfec1863 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1356,6 +1356,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> --
> 2.17.1
>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
CU
Uli
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] ARM: dts: rzg1: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 10:59 ` Ulrich Hecht
-1 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 10:59 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the devices node for the Display Units
> on all supported RZ/G1 SoCs. Note that on these SoCs, there is only a
> single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7745.dtsi | 2 ++
> arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
> 4 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 1cd19a569bd0fb66..e8b340bb99bc3031 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -1669,9 +1669,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
> index 1c82dd0abd76c4c9..def840b8b2d3c0c4 100644
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@ -1655,9 +1655,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
> index 3b413658eb8d8fac..7ab58d8bb74010d6 100644
> --- a/arch/arm/boot/dts/r8a7745.dtsi
> +++ b/arch/arm/boot/dts/r8a7745.dtsi
> @@ -1510,6 +1510,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 6efcef1670e15a95..f5515319227609a4 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -942,9 +942,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> --
> 2.17.1
>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
CU
Uli
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] ARM: dts: rzg1: Add reset control properties for display
@ 2020-02-19 10:59 ` Ulrich Hecht
0 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 10:59 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: linux-renesas-soc, Kieran Bingham, Laurent Pinchart, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the devices node for the Display Units
> on all supported RZ/G1 SoCs. Note that on these SoCs, there is only a
> single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7745.dtsi | 2 ++
> arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
> 4 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 1cd19a569bd0fb66..e8b340bb99bc3031 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -1669,9 +1669,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
> index 1c82dd0abd76c4c9..def840b8b2d3c0c4 100644
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@ -1655,9 +1655,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
> index 3b413658eb8d8fac..7ab58d8bb74010d6 100644
> --- a/arch/arm/boot/dts/r8a7745.dtsi
> +++ b/arch/arm/boot/dts/r8a7745.dtsi
> @@ -1510,6 +1510,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 6efcef1670e15a95..f5515319227609a4 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -942,9 +942,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> --
> 2.17.1
>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
CU
Uli
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 11:00 ` Ulrich Hecht
-1 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 11:00 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> only a single reset for each pair of DU channels.
>
> The display nodes on R-Car V3M and V3H already had "resets" properties,
> but lacked the corresponding "reset-names" properties.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
> - Drop LVDS reset, as LVDS is now a separate node,
> - Add other R-Car Gen3 SoCs.
> ---
> arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
> arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
> 7 files changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> index 27cbe697490c7c78..52229546454c400a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> @@ -3177,11 +3177,11 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>,
> - <&cpg CPG_MOD 721>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.2", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
> diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> index ea03b91bdf9d9cbc..31282367d3acd8cf 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> @@ -2827,10 +2827,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> index 1a20ebe9ea5be5da..f7468822e81e41d6 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -2503,10 +2503,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.3";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index dbf1c677dbc6e51f..a009c0ebc8b4f8d0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -1121,6 +1121,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> index 9444347e61eb881d..e01b0508a18fa91a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> @@ -1491,6 +1491,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> index c05ee98043b2c7a5..0ad20b78e6eb62fd 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> @@ -1793,8 +1793,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 7d3102dccac96e42..e8d2290fe79d761a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -1026,8 +1026,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
> --
> 2.17.1
>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
CU
Uli
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
@ 2020-02-19 11:00 ` Ulrich Hecht
0 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 11:00 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: linux-renesas-soc, Kieran Bingham, Laurent Pinchart, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> only a single reset for each pair of DU channels.
>
> The display nodes on R-Car V3M and V3H already had "resets" properties,
> but lacked the corresponding "reset-names" properties.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
> - Drop LVDS reset, as LVDS is now a separate node,
> - Add other R-Car Gen3 SoCs.
> ---
> arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
> arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
> 7 files changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> index 27cbe697490c7c78..52229546454c400a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> @@ -3177,11 +3177,11 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>,
> - <&cpg CPG_MOD 721>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.2", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
> diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> index ea03b91bdf9d9cbc..31282367d3acd8cf 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> @@ -2827,10 +2827,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> index 1a20ebe9ea5be5da..f7468822e81e41d6 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -2503,10 +2503,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.3";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index dbf1c677dbc6e51f..a009c0ebc8b4f8d0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -1121,6 +1121,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> index 9444347e61eb881d..e01b0508a18fa91a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> @@ -1491,6 +1491,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> index c05ee98043b2c7a5..0ad20b78e6eb62fd 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> @@ -1793,8 +1793,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 7d3102dccac96e42..e8d2290fe79d761a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -1026,8 +1026,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
> --
> 2.17.1
>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
CU
Uli
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: renesas: rzg2: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 11:01 ` Ulrich Hecht
-1 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 11:01 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: Laurent Pinchart, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the device nodes for the Display Units
> on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
> single reset for each pair of DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
FTR: I can't review this one, I don't have the datasheet.
CU
Uli
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: renesas: rzg2: Add reset control properties for display
@ 2020-02-19 11:01 ` Ulrich Hecht
0 siblings, 0 replies; 32+ messages in thread
From: Ulrich Hecht @ 2020-02-19 11:01 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: linux-renesas-soc, Kieran Bingham, Laurent Pinchart, linux-arm-kernel
> On February 18, 2020 at 2:30 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote:
>
>
> Add reset control properties to the device nodes for the Display Units
> on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
> single reset for each pair of DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
FTR: I can't review this one, I don't have the datasheet.
CU
Uli
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 15:27 ` Laurent Pinchart
-1 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
On Tue, Feb 18, 2020 at 02:30:16PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
> only a single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 2 ++
> arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7794.dtsi | 2 ++
> 5 files changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 334ba19769b998ac..e5ef9fd4284ae436 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -1719,6 +1719,8 @@
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
If there's a single reset for all channels, should it be just named "du"
? Or maybe skip the name completely ?
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index baedfab84cb09134..e38a5f01490d70a1 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -1682,9 +1682,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 39af16caa2aef501..4627eefa502b7677 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -852,9 +852,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index eef035c4d98341b6..dadbda16161b7457 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -1341,9 +1341,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 05ef79c6ed7f6b61..2c9e7a1ebfec1863 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1356,6 +1356,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
@ 2020-02-19 15:27 ` Laurent Pinchart
0 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:27 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Kieran Bingham, Magnus Damm, linux-arm-kernel
On Tue, Feb 18, 2020 at 02:30:16PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
> only a single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7790.dtsi | 2 ++
> arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7794.dtsi | 2 ++
> 5 files changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 334ba19769b998ac..e5ef9fd4284ae436 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -1719,6 +1719,8 @@
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
If there's a single reset for all channels, should it be just named "du"
? Or maybe skip the name completely ?
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index baedfab84cb09134..e38a5f01490d70a1 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -1682,9 +1682,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 39af16caa2aef501..4627eefa502b7677 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -852,9 +852,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index eef035c4d98341b6..dadbda16161b7457 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -1341,9 +1341,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index 05ef79c6ed7f6b61..2c9e7a1ebfec1863 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1356,6 +1356,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
--
Regards,
Laurent Pinchart
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] ARM: dts: rzg1: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 15:28 ` Laurent Pinchart
-1 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:28 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
Hi Geert,
Thank you for the patch.
On Tue, Feb 18, 2020 at 02:30:17PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the devices node for the Display Units
> on all supported RZ/G1 SoCs. Note that on these SoCs, there is only a
> single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7745.dtsi | 2 ++
> arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
> 4 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 1cd19a569bd0fb66..e8b340bb99bc3031 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -1669,9 +1669,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
Same comment as for 1/4.
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
> index 1c82dd0abd76c4c9..def840b8b2d3c0c4 100644
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@ -1655,9 +1655,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
> index 3b413658eb8d8fac..7ab58d8bb74010d6 100644
> --- a/arch/arm/boot/dts/r8a7745.dtsi
> +++ b/arch/arm/boot/dts/r8a7745.dtsi
> @@ -1510,6 +1510,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 6efcef1670e15a95..f5515319227609a4 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -942,9 +942,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 2/4] ARM: dts: rzg1: Add reset control properties for display
@ 2020-02-19 15:28 ` Laurent Pinchart
0 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:28 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Kieran Bingham, Magnus Damm, linux-arm-kernel
Hi Geert,
Thank you for the patch.
On Tue, Feb 18, 2020 at 02:30:17PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the devices node for the Display Units
> on all supported RZ/G1 SoCs. Note that on these SoCs, there is only a
> single reset for all DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm/boot/dts/r8a7743.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7744.dtsi | 5 +++--
> arch/arm/boot/dts/r8a7745.dtsi | 2 ++
> arch/arm/boot/dts/r8a77470.dtsi | 5 +++--
> 4 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 1cd19a569bd0fb66..e8b340bb99bc3031 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -1669,9 +1669,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
Same comment as for 1/4.
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
> index 1c82dd0abd76c4c9..def840b8b2d3c0c4 100644
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@ -1655,9 +1655,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
> index 3b413658eb8d8fac..7ab58d8bb74010d6 100644
> --- a/arch/arm/boot/dts/r8a7745.dtsi
> +++ b/arch/arm/boot/dts/r8a7745.dtsi
> @@ -1510,6 +1510,8 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 6efcef1670e15a95..f5515319227609a4 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -942,9 +942,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> status = "disabled";
>
> ports {
--
Regards,
Laurent Pinchart
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
2020-02-19 15:27 ` Laurent Pinchart
@ 2020-02-19 15:30 ` Geert Uytterhoeven
-1 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-19 15:30 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Geert Uytterhoeven, Magnus Damm, Kieran Bingham, Linux-Renesas,
Linux ARM
Hi Laurent,
On Wed, Feb 19, 2020 at 4:27 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Tue, Feb 18, 2020 at 02:30:16PM +0100, Geert Uytterhoeven wrote:
> > Add reset control properties to the device nodes for the Display Units
> > on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
> > only a single reset for all DU channels.
> >
> > Join the clocks lines while at it, to increase uniformity.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > v2:
> > - New.
> > ---
> > arch/arm/boot/dts/r8a7790.dtsi | 2 ++
> > arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
> > arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
> > arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
> > arch/arm/boot/dts/r8a7794.dtsi | 2 ++
> > 5 files changed, 13 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> > index 334ba19769b998ac..e5ef9fd4284ae436 100644
> > --- a/arch/arm/boot/dts/r8a7790.dtsi
> > +++ b/arch/arm/boot/dts/r8a7790.dtsi
> > @@ -1719,6 +1719,8 @@
> > clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> > <&cpg CPG_MOD 722>;
> > clock-names = "du.0", "du.1", "du.2";
> > + resets = <&cpg 724>;
> > + reset-names = "du.0";
>
> If there's a single reset for all channels, should it be just named "du"
> ? Or maybe skip the name completely ?
Doing so means the bindings should be updated first to reflect that.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 1/4] ARM: dts: rcar-gen2: Add reset control properties for display
@ 2020-02-19 15:30 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-19 15:30 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Linux-Renesas, Kieran Bingham, Magnus Damm, Linux ARM,
Geert Uytterhoeven
Hi Laurent,
On Wed, Feb 19, 2020 at 4:27 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Tue, Feb 18, 2020 at 02:30:16PM +0100, Geert Uytterhoeven wrote:
> > Add reset control properties to the device nodes for the Display Units
> > on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is
> > only a single reset for all DU channels.
> >
> > Join the clocks lines while at it, to increase uniformity.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > v2:
> > - New.
> > ---
> > arch/arm/boot/dts/r8a7790.dtsi | 2 ++
> > arch/arm/boot/dts/r8a7791.dtsi | 5 +++--
> > arch/arm/boot/dts/r8a7792.dtsi | 5 +++--
> > arch/arm/boot/dts/r8a7793.dtsi | 5 +++--
> > arch/arm/boot/dts/r8a7794.dtsi | 2 ++
> > 5 files changed, 13 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> > index 334ba19769b998ac..e5ef9fd4284ae436 100644
> > --- a/arch/arm/boot/dts/r8a7790.dtsi
> > +++ b/arch/arm/boot/dts/r8a7790.dtsi
> > @@ -1719,6 +1719,8 @@
> > clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> > <&cpg CPG_MOD 722>;
> > clock-names = "du.0", "du.1", "du.2";
> > + resets = <&cpg 724>;
> > + reset-names = "du.0";
>
> If there's a single reset for all channels, should it be just named "du"
> ? Or maybe skip the name completely ?
Doing so means the bindings should be updated first to reflect that.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 15:33 ` Laurent Pinchart
-1 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:33 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
Hi Geert,
Thank you for the patch.
On Tue, Feb 18, 2020 at 02:30:18PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> only a single reset for each pair of DU channels.
>
> The display nodes on R-Car V3M and V3H already had "resets" properties,
> but lacked the corresponding "reset-names" properties.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
> - Drop LVDS reset, as LVDS is now a separate node,
> - Add other R-Car Gen3 SoCs.
> ---
> arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
> arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
> 7 files changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> index 27cbe697490c7c78..52229546454c400a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> @@ -3177,11 +3177,11 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>,
> - <&cpg CPG_MOD 721>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.2", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
> diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> index ea03b91bdf9d9cbc..31282367d3acd8cf 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> @@ -2827,10 +2827,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> index 1a20ebe9ea5be5da..f7468822e81e41d6 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -2503,10 +2503,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.3";
I wonder if this should be du.2, especially given that 722 corresponds
to the non-existing DU2 channel. It's a bit of a mess at the hardware
level :-S
Apart from that the patch looks good to me.
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index dbf1c677dbc6e51f..a009c0ebc8b4f8d0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -1121,6 +1121,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> index 9444347e61eb881d..e01b0508a18fa91a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> @@ -1491,6 +1491,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> index c05ee98043b2c7a5..0ad20b78e6eb62fd 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> @@ -1793,8 +1793,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 7d3102dccac96e42..e8d2290fe79d761a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -1026,8 +1026,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
@ 2020-02-19 15:33 ` Laurent Pinchart
0 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:33 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Kieran Bingham, Magnus Damm, linux-arm-kernel
Hi Geert,
Thank you for the patch.
On Tue, Feb 18, 2020 at 02:30:18PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the device nodes for the Display Units
> on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> only a single reset for each pair of DU channels.
>
> The display nodes on R-Car V3M and V3H already had "resets" properties,
> but lacked the corresponding "reset-names" properties.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - Use "du.0" resp. "du.2" instead of "du.0-1" resp. "du.2-3",
> - Drop LVDS reset, as LVDS is now a separate node,
> - Add other R-Car Gen3 SoCs.
> ---
> arch/arm64/boot/dts/renesas/r8a77951.dtsi | 8 ++++----
> arch/arm64/boot/dts/renesas/r8a77960.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 3 +--
> 7 files changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> index 27cbe697490c7c78..52229546454c400a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> @@ -3177,11 +3177,11 @@
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> - <&cpg CPG_MOD 722>,
> - <&cpg CPG_MOD 721>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.2", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
> diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> index ea03b91bdf9d9cbc..31282367d3acd8cf 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> @@ -2827,10 +2827,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> index 1a20ebe9ea5be5da..f7468822e81e41d6 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -2503,10 +2503,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.3";
I wonder if this should be du.2, especially given that 722 corresponds
to the non-existing DU2 channel. It's a bit of a mess at the hardware
level :-S
Apart from that the patch looks good to me.
>
> renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index dbf1c677dbc6e51f..a009c0ebc8b4f8d0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -1121,6 +1121,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> index 9444347e61eb881d..e01b0508a18fa91a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> @@ -1491,6 +1491,7 @@
> clock-names = "du.0";
> power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
> resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>;
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> index c05ee98043b2c7a5..0ad20b78e6eb62fd 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> @@ -1793,8 +1793,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 7d3102dccac96e42..e8d2290fe79d761a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -1026,8 +1026,7 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> resets = <&cpg 724>;
> reset-names = "du.0";
--
Regards,
Laurent Pinchart
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: renesas: rzg2: Add reset control properties for display
2020-02-18 13:30 ` Geert Uytterhoeven
@ 2020-02-19 15:40 ` Laurent Pinchart
-1 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:40 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Kieran Bingham, linux-renesas-soc, linux-arm-kernel
Hi Geert,
Thank you for the patch.
On Tue, Feb 18, 2020 at 02:30:19PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the device nodes for the Display Units
> on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
> single reset for each pair of DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 5 +++--
> 3 files changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> index 507e78ebaab52330..79023433a740b7ca 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> @@ -2634,10 +2634,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
> status = "disabled";
>
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
> index 93dd10b5d6d05712..3137f735974be165 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
> @@ -2480,10 +2480,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.3";
Same as for 3/4, I wonder if this should be "du.2". Otherwise the patch
looks fine.
> status = "disabled";
>
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> index d4eee8fef35da74e..22785cbddff5d08c 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> @@ -1810,9 +1810,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>, <&vspd1 0>;
>
> status = "disabled";
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: renesas: rzg2: Add reset control properties for display
@ 2020-02-19 15:40 ` Laurent Pinchart
0 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 15:40 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Kieran Bingham, Magnus Damm, linux-arm-kernel
Hi Geert,
Thank you for the patch.
On Tue, Feb 18, 2020 at 02:30:19PM +0100, Geert Uytterhoeven wrote:
> Add reset control properties to the device nodes for the Display Units
> on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
> single reset for each pair of DU channels.
>
> Join the clocks lines while at it, to increase uniformity.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2:
> - New.
> ---
> arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 5 +++--
> arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 5 +++--
> 3 files changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> index 507e78ebaab52330..79023433a740b7ca 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
> @@ -2634,10 +2634,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 722>;
> clock-names = "du.0", "du.1", "du.2";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.2";
> status = "disabled";
>
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
> index 93dd10b5d6d05712..3137f735974be165 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
> @@ -2480,10 +2480,11 @@
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>,
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> <&cpg CPG_MOD 721>;
> clock-names = "du.0", "du.1", "du.3";
> + resets = <&cpg 724>, <&cpg 722>;
> + reset-names = "du.0", "du.3";
Same as for 3/4, I wonder if this should be "du.2". Otherwise the patch
looks fine.
> status = "disabled";
>
> renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
> diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> index d4eee8fef35da74e..22785cbddff5d08c 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
> @@ -1810,9 +1810,10 @@
> reg = <0 0xfeb00000 0 0x40000>;
> interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 724>,
> - <&cpg CPG_MOD 723>;
> + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
> clock-names = "du.0", "du.1";
> + resets = <&cpg 724>;
> + reset-names = "du.0";
> renesas,vsps = <&vspd0 0>, <&vspd1 0>;
>
> status = "disabled";
--
Regards,
Laurent Pinchart
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
2020-02-19 15:33 ` Laurent Pinchart
@ 2020-02-19 15:55 ` Geert Uytterhoeven
-1 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-19 15:55 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Geert Uytterhoeven, Magnus Damm, Kieran Bingham, Linux-Renesas,
Linux ARM
Hi Laurent,
On Wed, Feb 19, 2020 at 4:33 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Tue, Feb 18, 2020 at 02:30:18PM +0100, Geert Uytterhoeven wrote:
> > Add reset control properties to the device nodes for the Display Units
> > on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> > only a single reset for each pair of DU channels.
> >
> > The display nodes on R-Car V3M and V3H already had "resets" properties,
> > but lacked the corresponding "reset-names" properties.
> >
> > Join the clocks lines while at it, to increase uniformity.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > @@ -2503,10 +2503,11 @@
> > interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&cpg CPG_MOD 724>,
> > - <&cpg CPG_MOD 723>,
> > + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> > <&cpg CPG_MOD 721>;
> > clock-names = "du.0", "du.1", "du.3";
> > + resets = <&cpg 724>, <&cpg 722>;
> > + reset-names = "du.0", "du.3";
>
> I wonder if this should be du.2, especially given that 722 corresponds
> to the non-existing DU2 channel. It's a bit of a mess at the hardware
Just following the bindings: "du.3" is the lowest channel that is affected
by the reset.
> level :-S
Note that supporting R-Car H3-N will make your^H^H^H^Hthe rcar-du device
driver writer's life even more miserable, as suddenly there is no longer
a DU2, while the single unified Display Unit node prevents the DTS
writer from not setting the DU2's status to "okay" in the board DTS
file. But you might look at the ports submode?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
@ 2020-02-19 15:55 ` Geert Uytterhoeven
0 siblings, 0 replies; 32+ messages in thread
From: Geert Uytterhoeven @ 2020-02-19 15:55 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Linux-Renesas, Kieran Bingham, Magnus Damm, Linux ARM,
Geert Uytterhoeven
Hi Laurent,
On Wed, Feb 19, 2020 at 4:33 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Tue, Feb 18, 2020 at 02:30:18PM +0100, Geert Uytterhoeven wrote:
> > Add reset control properties to the device nodes for the Display Units
> > on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> > only a single reset for each pair of DU channels.
> >
> > The display nodes on R-Car V3M and V3H already had "resets" properties,
> > but lacked the corresponding "reset-names" properties.
> >
> > Join the clocks lines while at it, to increase uniformity.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > @@ -2503,10 +2503,11 @@
> > interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&cpg CPG_MOD 724>,
> > - <&cpg CPG_MOD 723>,
> > + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> > <&cpg CPG_MOD 721>;
> > clock-names = "du.0", "du.1", "du.3";
> > + resets = <&cpg 724>, <&cpg 722>;
> > + reset-names = "du.0", "du.3";
>
> I wonder if this should be du.2, especially given that 722 corresponds
> to the non-existing DU2 channel. It's a bit of a mess at the hardware
Just following the bindings: "du.3" is the lowest channel that is affected
by the reset.
> level :-S
Note that supporting R-Car H3-N will make your^H^H^H^Hthe rcar-du device
driver writer's life even more miserable, as suddenly there is no longer
a DU2, while the single unified Display Unit node prevents the DTS
writer from not setting the DU2's status to "okay" in the board DTS
file. But you might look at the ports submode?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
2020-02-19 15:55 ` Geert Uytterhoeven
@ 2020-02-19 16:06 ` Laurent Pinchart
-1 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 16:06 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Geert Uytterhoeven, Magnus Damm, Kieran Bingham, Linux-Renesas,
Linux ARM
Hi Geert,
On Wed, Feb 19, 2020 at 04:55:52PM +0100, Geert Uytterhoeven wrote:
> On Wed, Feb 19, 2020 at 4:33 PM Laurent Pinchart wrote:
> > On Tue, Feb 18, 2020 at 02:30:18PM +0100, Geert Uytterhoeven wrote:
> > > Add reset control properties to the device nodes for the Display Units
> > > on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> > > only a single reset for each pair of DU channels.
> > >
> > > The display nodes on R-Car V3M and V3H already had "resets" properties,
> > > but lacked the corresponding "reset-names" properties.
> > >
> > > Join the clocks lines while at it, to increase uniformity.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> > > --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > > @@ -2503,10 +2503,11 @@
> > > interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> > > <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> > > <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> > > - clocks = <&cpg CPG_MOD 724>,
> > > - <&cpg CPG_MOD 723>,
> > > + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> > > <&cpg CPG_MOD 721>;
> > > clock-names = "du.0", "du.1", "du.3";
> > > + resets = <&cpg 724>, <&cpg 722>;
> > > + reset-names = "du.0", "du.3";
> >
> > I wonder if this should be du.2, especially given that 722 corresponds
> > to the non-existing DU2 channel. It's a bit of a mess at the hardware
>
> Just following the bindings: "du.3" is the lowest channel that is affected
> by the reset.
Yes I was looking at that, and replied to the DT bindings patch. If the
outcome of the discussion there is to keep the bindings as-is, you can
have my
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
for this whole series.
> > level :-S
>
> Note that supporting R-Car H3-N will make your^H^H^H^Hthe rcar-du device
> driver writer's life even more miserable, as suddenly there is no longer
> a DU2, while the single unified Display Unit node prevents the DTS
> writer from not setting the DU2's status to "okay" in the board DTS
> file. But you might look at the ports submode?
This will require a separate compatible string I'm afraid.
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: Add reset control properties for display
@ 2020-02-19 16:06 ` Laurent Pinchart
0 siblings, 0 replies; 32+ messages in thread
From: Laurent Pinchart @ 2020-02-19 16:06 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux-Renesas, Kieran Bingham, Magnus Damm, Linux ARM,
Geert Uytterhoeven
Hi Geert,
On Wed, Feb 19, 2020 at 04:55:52PM +0100, Geert Uytterhoeven wrote:
> On Wed, Feb 19, 2020 at 4:33 PM Laurent Pinchart wrote:
> > On Tue, Feb 18, 2020 at 02:30:18PM +0100, Geert Uytterhoeven wrote:
> > > Add reset control properties to the device nodes for the Display Units
> > > on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
> > > only a single reset for each pair of DU channels.
> > >
> > > The display nodes on R-Car V3M and V3H already had "resets" properties,
> > > but lacked the corresponding "reset-names" properties.
> > >
> > > Join the clocks lines while at it, to increase uniformity.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> > > --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> > > @@ -2503,10 +2503,11 @@
> > > interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> > > <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> > > <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
> > > - clocks = <&cpg CPG_MOD 724>,
> > > - <&cpg CPG_MOD 723>,
> > > + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
> > > <&cpg CPG_MOD 721>;
> > > clock-names = "du.0", "du.1", "du.3";
> > > + resets = <&cpg 724>, <&cpg 722>;
> > > + reset-names = "du.0", "du.3";
> >
> > I wonder if this should be du.2, especially given that 722 corresponds
> > to the non-existing DU2 channel. It's a bit of a mess at the hardware
>
> Just following the bindings: "du.3" is the lowest channel that is affected
> by the reset.
Yes I was looking at that, and replied to the DT bindings patch. If the
outcome of the discussion there is to keep the bindings as-is, you can
have my
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
for this whole series.
> > level :-S
>
> Note that supporting R-Car H3-N will make your^H^H^H^Hthe rcar-du device
> driver writer's life even more miserable, as suddenly there is no longer
> a DU2, while the single unified Display Unit node prevents the DTS
> writer from not setting the DU2's status to "okay" in the board DTS
> file. But you might look at the ports submode?
This will require a separate compatible string I'm afraid.
--
Regards,
Laurent Pinchart
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 32+ messages in thread
end of thread, other threads:[~2020-02-19 16:07 UTC | newest]
Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-18 13:30 [PATCH v2 0/4] arm: dts: renesas: Add reset control properties for display Geert Uytterhoeven
2020-02-18 13:30 ` Geert Uytterhoeven
2020-02-18 13:30 ` [PATCH v2 1/4] ARM: dts: rcar-gen2: " Geert Uytterhoeven
2020-02-18 13:30 ` Geert Uytterhoeven
2020-02-19 10:59 ` Ulrich Hecht
2020-02-19 10:59 ` Ulrich Hecht
2020-02-19 15:27 ` Laurent Pinchart
2020-02-19 15:27 ` Laurent Pinchart
2020-02-19 15:30 ` Geert Uytterhoeven
2020-02-19 15:30 ` Geert Uytterhoeven
2020-02-18 13:30 ` [PATCH v2 2/4] ARM: dts: rzg1: " Geert Uytterhoeven
2020-02-18 13:30 ` Geert Uytterhoeven
2020-02-19 10:59 ` Ulrich Hecht
2020-02-19 10:59 ` Ulrich Hecht
2020-02-19 15:28 ` Laurent Pinchart
2020-02-19 15:28 ` Laurent Pinchart
2020-02-18 13:30 ` [PATCH v2 3/4] arm64: dts: renesas: rcar-gen3: " Geert Uytterhoeven
2020-02-18 13:30 ` Geert Uytterhoeven
2020-02-19 11:00 ` Ulrich Hecht
2020-02-19 11:00 ` Ulrich Hecht
2020-02-19 15:33 ` Laurent Pinchart
2020-02-19 15:33 ` Laurent Pinchart
2020-02-19 15:55 ` Geert Uytterhoeven
2020-02-19 15:55 ` Geert Uytterhoeven
2020-02-19 16:06 ` Laurent Pinchart
2020-02-19 16:06 ` Laurent Pinchart
2020-02-18 13:30 ` [PATCH v2 4/4] arm64: dts: renesas: rzg2: " Geert Uytterhoeven
2020-02-18 13:30 ` Geert Uytterhoeven
2020-02-19 11:01 ` Ulrich Hecht
2020-02-19 11:01 ` Ulrich Hecht
2020-02-19 15:40 ` Laurent Pinchart
2020-02-19 15:40 ` Laurent Pinchart
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