From: Stephen Boyd <sboyd@kernel.org>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: Weijie Gao <hackpascal@gmail.com>,
STAGING SUBSYSTEM <devel@driverdev.osuosl.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
<devicetree@vger.kernel.org>,
Greg KH <gregkh@linuxfoundation.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
MIPS <linux-mips@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>, John Crispin <john@phrozen.org>,
NeilBrown <neil@brown.name>,
COMMON CLK FRAMEWORK <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation
Date: Thu, 17 Dec 2020 02:07:03 -0800 [thread overview]
Message-ID: <160819962346.1580929.2348154780751858972@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <CAMhs-H_EiDot_V4Qj1Q8noAf5RNi9BOyy0WmawE+70wY7=FxDg@mail.gmail.com>
Quoting Sergio Paracuellos (2020-12-17 02:01:39)
>
> On Thu, Dec 17, 2020 at 9:58 AM Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting Sergio Paracuellos (2020-11-22 01:55:52)
> >
> > > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> > > new file mode 100644
> > > index 000000000000..6aca4c1a4a46
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> >
> > > + compatible = "mediatek,mt7621-sysc", "syscon";
> > > + reg = <0x0 0x100>;
> > > +
> > > + pll {
> >
> > clock-controller? Why can't the parent device be the clk provider and
> > have #clock-cells?
> >
>
> I don't get your point, sorry. Can you please explain this a bit more
> or point to me to an example to understand the real meaning of this?
It looks like this is a made up child node of syscon so that a driver
can probe in the kernel. It would be more DT friendly to create a
platform device from the parent node's driver, or just register the clks
with the framework directly in that driver.
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next prev parent reply other threads:[~2020-12-17 10:07 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-22 9:55 [PATCH v4 0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621 Sergio Paracuellos
2020-11-22 9:55 ` Sergio Paracuellos
2020-11-22 9:55 ` [PATCH v4 1/6] dt-bindings: clock: add dt binding header for mt7621 clocks Sergio Paracuellos
2020-11-22 9:55 ` Sergio Paracuellos
2020-11-22 9:55 ` [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation Sergio Paracuellos
2020-11-22 9:55 ` Sergio Paracuellos
2020-12-17 8:58 ` Stephen Boyd
2020-12-17 8:58 ` Stephen Boyd
2020-12-17 10:01 ` Sergio Paracuellos
2020-12-17 10:01 ` Sergio Paracuellos
2020-12-17 10:07 ` Stephen Boyd [this message]
2020-12-17 10:14 ` Sergio Paracuellos
2020-12-17 10:32 ` Stephen Boyd
2020-12-17 10:38 ` Sergio Paracuellos
2020-12-17 10:50 ` Stephen Boyd
2020-12-17 10:54 ` Sergio Paracuellos
2020-12-17 15:04 ` Rob Herring
2020-12-17 15:04 ` Rob Herring
2020-12-17 15:12 ` Sergio Paracuellos
2020-12-17 15:12 ` Sergio Paracuellos
2020-11-22 9:55 ` [PATCH v4 3/6] clk: ralink: add clock driver for mt7621 SoC Sergio Paracuellos
2020-11-22 9:55 ` Sergio Paracuellos
2020-12-17 9:09 ` Stephen Boyd
2020-12-17 9:09 ` Stephen Boyd
2020-12-17 9:54 ` Sergio Paracuellos
2020-12-17 9:54 ` Sergio Paracuellos
2020-12-17 10:12 ` Stephen Boyd
2020-12-17 10:21 ` Sergio Paracuellos
2020-11-22 9:55 ` [PATCH v4 4/6] staging: mt7621-dts: make use of new 'mt7621-clk' Sergio Paracuellos
2020-11-22 9:55 ` Sergio Paracuellos
2020-11-22 9:55 ` [PATCH v4 5/6] staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk' Sergio Paracuellos
2020-11-22 9:55 ` Sergio Paracuellos
2020-11-22 9:55 ` [PATCH v4 6/6] MAINTAINERS: add MT7621 CLOCK maintainer Sergio Paracuellos
2020-11-22 9:55 ` Sergio Paracuellos
2020-12-10 6:55 ` [PATCH v4 0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621 Sergio Paracuellos
2020-12-10 6:55 ` Sergio Paracuellos
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