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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>, John Crispin <john@phrozen.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Greg KH <gregkh@linuxfoundation.org>,
	Chuanhong Guo <gch981213@gmail.com>,
	Weijie Gao <hackpascal@gmail.com>,
	COMMON CLK FRAMEWORK <linux-clk@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	"open list:MIPS <linux-mips@vger.kernel.org>,
	open list:STAGING SUBSYSTEM <devel@driverdev.osuosl.org>,
	NeilBrown <neil@brown.name>,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>
Subject: Re: [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation
Date: Thu, 17 Dec 2020 11:54:17 +0100	[thread overview]
Message-ID: <CAMhs-H_Zu-yvbcajPYm=AfVo915dM6_3kBf9wpN4rt3LZ6LXpw@mail.gmail.com> (raw)
In-Reply-To: <160820221883.1580929.5758849422177353179@swboyd.mtv.corp.google.com>

On Thu, Dec 17, 2020 at 11:50 AM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Sergio Paracuellos (2020-12-17 02:38:37)
> > On Thu, Dec 17, 2020 at 11:32 AM Stephen Boyd <sboyd@kernel.org> wrote:
> > >
> > > Quoting Sergio Paracuellos (2020-12-17 02:14:10)
> > > > node is to use architecture operations in
> > > > 'arch/mips/include/asm/mach-ralink/ralink_regs.h'
> > > > instead of getting a phandle using the regmap is being currently used...
> > >
> > > Can that be done with
> > >
> > > CLK_OF_DECLARE_DRIVER("mediatek,mt7621-sysc", my_timer_clk_init)
> > >
> > > ? Is the syscon used anywhere besides by the clk driver?
> >
> > Yes, for example all the gates use them to access SYSC_REG_CLKCFG1 in
> > all of their 'mt7621_gate_ops' and also in all 'recalc_rate' functions
> > where SYSC_REG_SYSTEM_CONFIG0, is readed.
>
> That sounds like it's only used by the clk provider/driver? Any other
> code uses the syscon?

The only child node for the syscon for this platform is the clock
driver now, I introduced it in this series, so no other driver is
using this syscon now. All of them use global arch operations in
'arch/mips/include/asm/mach-ralink/ralink_regs.h'.

  reply	other threads:[~2020-12-17 10:55 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-22  9:55 [PATCH v4 0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621 Sergio Paracuellos
2020-11-22  9:55 ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 1/6] dt-bindings: clock: add dt binding header for mt7621 clocks Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-12-17  8:58   ` Stephen Boyd
2020-12-17  8:58     ` Stephen Boyd
2020-12-17 10:01     ` Sergio Paracuellos
2020-12-17 10:01       ` Sergio Paracuellos
2020-12-17 10:07       ` Stephen Boyd
2020-12-17 10:14         ` Sergio Paracuellos
2020-12-17 10:32           ` Stephen Boyd
2020-12-17 10:38             ` Sergio Paracuellos
2020-12-17 10:50               ` Stephen Boyd
2020-12-17 10:54                 ` Sergio Paracuellos [this message]
2020-12-17 15:04     ` Rob Herring
2020-12-17 15:04       ` Rob Herring
2020-12-17 15:12       ` Sergio Paracuellos
2020-12-17 15:12         ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 3/6] clk: ralink: add clock driver for mt7621 SoC Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-12-17  9:09   ` Stephen Boyd
2020-12-17  9:09     ` Stephen Boyd
2020-12-17  9:54     ` Sergio Paracuellos
2020-12-17  9:54       ` Sergio Paracuellos
2020-12-17 10:12       ` Stephen Boyd
2020-12-17 10:21         ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 4/6] staging: mt7621-dts: make use of new 'mt7621-clk' Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 5/6] staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk' Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 6/6] MAINTAINERS: add MT7621 CLOCK maintainer Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-12-10  6:55 ` [PATCH v4 0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621 Sergio Paracuellos
2020-12-10  6:55   ` Sergio Paracuellos

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