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From: Rob Herring <robh+dt@kernel.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com>,
	Michael Turquette <mturquette@baylibre.com>,
	John Crispin <john@phrozen.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Chuanhong Guo <gch981213@gmail.com>,
	Weijie Gao <hackpascal@gmail.com>,
	linux-clk <linux-clk@vger.kernel.org>,
	evicetree@vger.kernel.org,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"open list:MIPS" <linux-mips@vger.kernel.org>,
	"open list:STAGING SUBSYSTEM" <devel@driverdev.osuosl.org>,
	NeilBrown <neil@brown.name>
Subject: Re: [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation
Date: Thu, 17 Dec 2020 09:04:52 -0600	[thread overview]
Message-ID: <CAL_JsqLONxqAXRta2iuYNoJ=8wEFdYsiq_OFqgSW3aMLMhy94Q@mail.gmail.com> (raw)
In-Reply-To: <160819550615.1580929.14234996916739809712@swboyd.mtv.corp.google.com>

On Thu, Dec 17, 2020 at 2:58 AM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Sergio Paracuellos (2020-11-22 01:55:52)
> > Adds device tree binding documentation for clocks in the
> > MT7621 SOC.
> >
> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> > ---
> >  .../bindings/clock/mediatek,mt7621-clk.yaml   | 67 +++++++++++++++++++
> >  1 file changed, 67 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> >
>
> Rob?

Send to the DT list please.

But I agree with Stephen's comment. Either make the syscon complete
(fully describe the h/w, not just what you need ATM) to show the need
for child nodes or get rid of the child nodes.

Rob

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh+dt@kernel.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Weijie Gao <hackpascal@gmail.com>,
	"open list:STAGING SUBSYSTEM" <devel@driverdev.osuosl.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Michael Turquette <mturquette@baylibre.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	evicetree@vger.kernel.org,
	"open list:MIPS" <linux-mips@vger.kernel.org>,
	John Crispin <john@phrozen.org>, NeilBrown <neil@brown.name>,
	linux-clk <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation
Date: Thu, 17 Dec 2020 09:04:52 -0600	[thread overview]
Message-ID: <CAL_JsqLONxqAXRta2iuYNoJ=8wEFdYsiq_OFqgSW3aMLMhy94Q@mail.gmail.com> (raw)
In-Reply-To: <160819550615.1580929.14234996916739809712@swboyd.mtv.corp.google.com>

On Thu, Dec 17, 2020 at 2:58 AM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Sergio Paracuellos (2020-11-22 01:55:52)
> > Adds device tree binding documentation for clocks in the
> > MT7621 SOC.
> >
> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> > ---
> >  .../bindings/clock/mediatek,mt7621-clk.yaml   | 67 +++++++++++++++++++
> >  1 file changed, 67 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> >
>
> Rob?

Send to the DT list please.

But I agree with Stephen's comment. Either make the syscon complete
(fully describe the h/w, not just what you need ATM) to show the need
for child nodes or get rid of the child nodes.

Rob
_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

  parent reply	other threads:[~2020-12-17 15:05 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-22  9:55 [PATCH v4 0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621 Sergio Paracuellos
2020-11-22  9:55 ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 1/6] dt-bindings: clock: add dt binding header for mt7621 clocks Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-12-17  8:58   ` Stephen Boyd
2020-12-17  8:58     ` Stephen Boyd
2020-12-17 10:01     ` Sergio Paracuellos
2020-12-17 10:01       ` Sergio Paracuellos
2020-12-17 10:07       ` Stephen Boyd
2020-12-17 10:14         ` Sergio Paracuellos
2020-12-17 10:32           ` Stephen Boyd
2020-12-17 10:38             ` Sergio Paracuellos
2020-12-17 10:50               ` Stephen Boyd
2020-12-17 10:54                 ` Sergio Paracuellos
2020-12-17 15:04     ` Rob Herring [this message]
2020-12-17 15:04       ` Rob Herring
2020-12-17 15:12       ` Sergio Paracuellos
2020-12-17 15:12         ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 3/6] clk: ralink: add clock driver for mt7621 SoC Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-12-17  9:09   ` Stephen Boyd
2020-12-17  9:09     ` Stephen Boyd
2020-12-17  9:54     ` Sergio Paracuellos
2020-12-17  9:54       ` Sergio Paracuellos
2020-12-17 10:12       ` Stephen Boyd
2020-12-17 10:21         ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 4/6] staging: mt7621-dts: make use of new 'mt7621-clk' Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 5/6] staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk' Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-11-22  9:55 ` [PATCH v4 6/6] MAINTAINERS: add MT7621 CLOCK maintainer Sergio Paracuellos
2020-11-22  9:55   ` Sergio Paracuellos
2020-12-10  6:55 ` [PATCH v4 0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621 Sergio Paracuellos
2020-12-10  6:55   ` Sergio Paracuellos

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