From: "tan.shaopeng" <tan.shaopeng@jp.fujitsu.com> To: linux-arm-kernel@lists.infradead.org, soc@kernel.org Cc: will@kernel.org, catalin.marinas@arm.com, arnd@arndb.de, olof@lixom.net, misono.tomohiro@jp.fujitsu.com, tan.shaopeng@jp.fujitsu.com Subject: [PATCH RFC] Upstream A64FX cache driver Date: Wed, 3 Mar 2021 18:38:22 +0900 [thread overview] Message-ID: <1614764303-34903-1-git-send-email-tan.shaopeng@jp.fujitsu.com> (raw) From: "tan.shaopeng" <tan.shaopeng@jp.fujitsu.com> Hello, This driver enables Fujitsu A64FX's cache function. [Driver Description] A64FX CPU has several functions for HPC workload and this driver is for cache functions. Loading this cache driver, control registers will be set to enable these functions, and advanced settings registers will be set by default values. After loading this driver, you can use the default values of the advanced settings registers or set custom values to the advanced settings registers from EL0. Unloading this driver, control registers will be clear to disable these functions. These functions include sector cache function and hardware prefetch assistance function. - Sector cache function: Cache partitioning function which can control virtual cache capacity for each characteristics of data such as temporal locality. - Hardware prefetch assistance function: Software can provide the hint for hardware prefetch mechanism to reduce the penalty of the memory access. By providing the access pattern through that function in advance, hardware prefetch mechanism can access the complex pattern. These functions can be executed according to the default values of the registers which are set by the driver. Or they can be executed according to a tag which is the upper 8 bits of the load/store address of application to customize hardware prefetch and sector cache. For more details of these functions, see A64FX HPC extension specification in https://github.com/fujitsu/A64FX The driver is based on v5.11-rc2 and tested on FX1000 environment. [RFC] This function only performs register initialization for A64FX. At first, I wanted to insert it to kernel initialization code, but there is no initialization code except errata, so I made this driver. I'd like to know if this approach is OK? Would you give me some advice? Best regards, Tan Shaopeng tan.shaopeng (1): soc: fujitsu: Add cache driver code MAINTAINERS | 6 ++ arch/arm64/Kconfig.platforms | 5 + drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/fujitsu/Kconfig | 26 +++++ drivers/soc/fujitsu/fujitsu_cache.c | 183 ++++++++++++++++++++++++++++++++++++ 6 files changed, 222 insertions(+) create mode 100644 drivers/soc/fujitsu/Kconfig create mode 100644 drivers/soc/fujitsu/fujitsu_cache.c -- 1.8.3.1
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From: "tan.shaopeng" <tan.shaopeng@jp.fujitsu.com> To: linux-arm-kernel@lists.infradead.org, soc@kernel.org Cc: will@kernel.org, catalin.marinas@arm.com, arnd@arndb.de, olof@lixom.net, misono.tomohiro@jp.fujitsu.com, tan.shaopeng@jp.fujitsu.com Subject: [PATCH RFC] Upstream A64FX cache driver Date: Wed, 3 Mar 2021 18:38:22 +0900 [thread overview] Message-ID: <1614764303-34903-1-git-send-email-tan.shaopeng@jp.fujitsu.com> (raw) Message-ID: <20210303093822.-IT1OQwhSgJoQgmN67q536CZDizUkz1q5vgVciWysH8@z> (raw) From: "tan.shaopeng" <tan.shaopeng@jp.fujitsu.com> Hello, This driver enables Fujitsu A64FX's cache function. [Driver Description] A64FX CPU has several functions for HPC workload and this driver is for cache functions. Loading this cache driver, control registers will be set to enable these functions, and advanced settings registers will be set by default values. After loading this driver, you can use the default values of the advanced settings registers or set custom values to the advanced settings registers from EL0. Unloading this driver, control registers will be clear to disable these functions. These functions include sector cache function and hardware prefetch assistance function. - Sector cache function: Cache partitioning function which can control virtual cache capacity for each characteristics of data such as temporal locality. - Hardware prefetch assistance function: Software can provide the hint for hardware prefetch mechanism to reduce the penalty of the memory access. By providing the access pattern through that function in advance, hardware prefetch mechanism can access the complex pattern. These functions can be executed according to the default values of the registers which are set by the driver. Or they can be executed according to a tag which is the upper 8 bits of the load/store address of application to customize hardware prefetch and sector cache. For more details of these functions, see A64FX HPC extension specification in https://github.com/fujitsu/A64FX The driver is based on v5.11-rc2 and tested on FX1000 environment. [RFC] This function only performs register initialization for A64FX. At first, I wanted to insert it to kernel initialization code, but there is no initialization code except errata, so I made this driver. I'd like to know if this approach is OK? Would you give me some advice? Best regards, Tan Shaopeng tan.shaopeng (1): soc: fujitsu: Add cache driver code MAINTAINERS | 6 ++ arch/arm64/Kconfig.platforms | 5 + drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/fujitsu/Kconfig | 26 +++++ drivers/soc/fujitsu/fujitsu_cache.c | 183 ++++++++++++++++++++++++++++++++++++ 6 files changed, 222 insertions(+) create mode 100644 drivers/soc/fujitsu/Kconfig create mode 100644 drivers/soc/fujitsu/fujitsu_cache.c -- 1.8.3.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2021-03-03 9:39 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-03 9:38 tan.shaopeng [this message] 2021-03-03 9:38 ` [PATCH RFC] Upstream A64FX cache driver tan.shaopeng 2021-03-03 9:38 ` [PATCH RFC] soc: fujitsu: Add cache driver code tan.shaopeng 2021-03-03 9:38 ` tan.shaopeng 2021-03-03 11:24 ` Arnd Bergmann 2021-03-03 11:24 ` Arnd Bergmann 2021-03-04 10:34 ` tan.shaopeng 2021-03-04 10:34 ` tan.shaopeng 2021-03-04 10:46 ` Will Deacon 2021-03-04 10:46 ` Will Deacon 2021-03-04 10:58 ` Arnd Bergmann 2021-03-04 10:58 ` Arnd Bergmann 2021-03-05 7:48 ` tan.shaopeng 2021-03-05 7:48 ` tan.shaopeng 2021-03-31 8:52 ` tan.shaopeng 2021-03-31 8:52 ` tan.shaopeng 2021-04-01 16:15 ` James Morse 2021-04-01 16:15 ` James Morse 2021-04-02 8:44 ` tan.shaopeng 2021-04-02 8:44 ` tan.shaopeng 2021-03-04 10:54 ` Arnd Bergmann 2021-03-04 10:54 ` Arnd Bergmann 2021-03-05 8:10 ` tan.shaopeng 2021-03-05 8:10 ` tan.shaopeng
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