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From: Will Deacon <will@kernel.org>
To: "tan.shaopeng@fujitsu.com" <tan.shaopeng@fujitsu.com>
Cc: 'Arnd Bergmann' <arnd@arndb.de>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	SoC Team <soc@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Olof Johansson <olof@lixom.net>,
	"misono.tomohiro@fujitsu.com" <misono.tomohiro@fujitsu.com>,
	james.morse@arm.com
Subject: Re: [PATCH RFC] soc: fujitsu: Add cache driver code
Date: Thu, 4 Mar 2021 10:46:51 +0000	[thread overview]
Message-ID: <20210304104650.GA20843@willie-the-truck> (raw)
In-Reply-To: <OSAPR01MB2146DC8A26F6EBD1CF11D9748B979@OSAPR01MB2146.jpnprd01.prod.outlook.com>

On Thu, Mar 04, 2021 at 10:34:43AM +0000, tan.shaopeng@fujitsu.com wrote:
> > On Wed, Mar 3, 2021 at 10:38 AM tan.shaopeng
> > <tan.shaopeng@jp.fujitsu.com> wrote:
> > > +
> > > +config FUJITSU_CACHE
> > > +        tristate "FUJITSU Cache Driver"
> > > +        depends on ARM64_VHE || COMPILE_TEST
> > > +        help
> > > +          FUJITSU Cache Driver
> > > +
> > > +          This driver offers cache functions for A64FX system.
> > > +         Loading this cache driver, control registers will be set to enable
> > > +         these functions, and advanced settings registers will be set by
> > default
> > > +         values. After loading this driver, you can use the default values of
> > the
> > > +         advanced settings registers or set the advanced settings registers
> > > +         from EL0. Unloading this driver, control registers will be clear to
> > > +         disable these functions.
> > > +          When built as a module, this will be called as "fujitsu_cache".
> > 
> > My feeling is that this code should be in arch/arm64/, as the cache
> > is generally considered part of the CPU, rather than part of the wider
> > SoC design, or something that can be controlled separately from the
> > core kernel and memory management code.
> 
> Thanks for your advice. I also would like to hear the opinions from 
> other soc&arm maintainers, and then consider whether to add this to 
> arch/arm64/.

Given that all of this is outside of the scope of the architecture, I don't
think that arch/arm64/ is the right place for it. Perhaps this would fit
into the resctrl rework that James has been doing for MPAM?

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: "tan.shaopeng@fujitsu.com" <tan.shaopeng@fujitsu.com>
Cc: 'Arnd Bergmann' <arnd@arndb.de>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	SoC Team <soc@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Olof Johansson <olof@lixom.net>,
	"misono.tomohiro@fujitsu.com" <misono.tomohiro@fujitsu.com>,
	james.morse@arm.com
Subject: Re: [PATCH RFC] soc: fujitsu: Add cache driver code
Date: Thu, 4 Mar 2021 10:46:51 +0000	[thread overview]
Message-ID: <20210304104650.GA20843@willie-the-truck> (raw)
Message-ID: <20210304104651.gNfJhpKervFBmZv9g5IBWM2JXUTo3Vk7UyI3uFjUTt4@z> (raw)
In-Reply-To: <OSAPR01MB2146DC8A26F6EBD1CF11D9748B979@OSAPR01MB2146.jpnprd01.prod.outlook.com>

On Thu, Mar 04, 2021 at 10:34:43AM +0000, tan.shaopeng@fujitsu.com wrote:
> > On Wed, Mar 3, 2021 at 10:38 AM tan.shaopeng
> > <tan.shaopeng@jp.fujitsu.com> wrote:
> > > +
> > > +config FUJITSU_CACHE
> > > +        tristate "FUJITSU Cache Driver"
> > > +        depends on ARM64_VHE || COMPILE_TEST
> > > +        help
> > > +          FUJITSU Cache Driver
> > > +
> > > +          This driver offers cache functions for A64FX system.
> > > +         Loading this cache driver, control registers will be set to enable
> > > +         these functions, and advanced settings registers will be set by
> > default
> > > +         values. After loading this driver, you can use the default values of
> > the
> > > +         advanced settings registers or set the advanced settings registers
> > > +         from EL0. Unloading this driver, control registers will be clear to
> > > +         disable these functions.
> > > +          When built as a module, this will be called as "fujitsu_cache".
> > 
> > My feeling is that this code should be in arch/arm64/, as the cache
> > is generally considered part of the CPU, rather than part of the wider
> > SoC design, or something that can be controlled separately from the
> > core kernel and memory management code.
> 
> Thanks for your advice. I also would like to hear the opinions from 
> other soc&arm maintainers, and then consider whether to add this to 
> arch/arm64/.

Given that all of this is outside of the scope of the architecture, I don't
think that arch/arm64/ is the right place for it. Perhaps this would fit
into the resctrl rework that James has been doing for MPAM?

Will

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-03-04 10:46 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-03  9:38 [PATCH RFC] Upstream A64FX cache driver tan.shaopeng
2021-03-03  9:38 ` tan.shaopeng
2021-03-03  9:38 ` [PATCH RFC] soc: fujitsu: Add cache driver code tan.shaopeng
2021-03-03  9:38   ` tan.shaopeng
2021-03-03 11:24   ` Arnd Bergmann
2021-03-03 11:24     ` Arnd Bergmann
2021-03-04 10:34     ` tan.shaopeng
2021-03-04 10:34       ` tan.shaopeng
2021-03-04 10:46       ` Will Deacon [this message]
2021-03-04 10:46         ` Will Deacon
2021-03-04 10:58         ` Arnd Bergmann
2021-03-04 10:58           ` Arnd Bergmann
2021-03-05  7:48           ` tan.shaopeng
2021-03-05  7:48             ` tan.shaopeng
2021-03-31  8:52           ` tan.shaopeng
2021-03-31  8:52             ` tan.shaopeng
2021-04-01 16:15             ` James Morse
2021-04-01 16:15               ` James Morse
2021-04-02  8:44               ` tan.shaopeng
2021-04-02  8:44                 ` tan.shaopeng
2021-03-04 10:54       ` Arnd Bergmann
2021-03-04 10:54         ` Arnd Bergmann
2021-03-05  8:10         ` tan.shaopeng
2021-03-05  8:10           ` tan.shaopeng

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