* [thermal PATCH v15 1/9] drivers: thermal: tsens: Don't hardcode sensor slope
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 2/9] drivers: thermal: tsens: Convert msm8960 to reg_field Ansuel Smith
` (7 subsequent siblings)
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, Amit Kucheria, Andy Gross,
Bjorn Andersson, Zhang Rui, Rob Herring, linux-pm, linux-arm-msm,
devicetree, linux-kernel
Function compute_intercept_slope hardcode the sensor slope to
SLOPE_DEFAULT. Change this and use the default value only if a slope is
not defined. This is needed for tsens VER_0 that has a hardcoded slope
table.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
---
drivers/thermal/qcom/tsens.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index 8d3e94d2a..562c438ff 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -85,7 +85,8 @@ void compute_intercept_slope(struct tsens_priv *priv, u32 *p1,
"%s: sensor%d - data_point1:%#x data_point2:%#x\n",
__func__, i, p1[i], p2[i]);
- priv->sensor[i].slope = SLOPE_DEFAULT;
+ if (!priv->sensor[i].slope)
+ priv->sensor[i].slope = SLOPE_DEFAULT;
if (mode == TWO_PT_CALIB) {
/*
* slope (m) = adc_code2 - adc_code1 (y2 - y1)/
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Don't hardcode sensor slope
2021-04-20 18:33 ` [thermal PATCH v15 1/9] drivers: thermal: tsens: Don't hardcode sensor slope Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: 9d51769b2e75bb33c56c8f9ee933eca2d92b375b
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//9d51769b2e75bb33c56c8f9ee933eca2d92b375b
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:35 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:08:50 +02:00
thermal/drivers/tsens: Don't hardcode sensor slope
Function compute_intercept_slope hardcode the sensor slope to
SLOPE_DEFAULT. Change this and use the default value only if a slope is
not defined. This is needed for tsens VER_0 that has a hardcoded slope
table.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-2-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index a5da6a7..d6f8021 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -85,7 +85,8 @@ void compute_intercept_slope(struct tsens_priv *priv, u32 *p1,
"%s: sensor%d - data_point1:%#x data_point2:%#x\n",
__func__, i, p1[i], p2[i]);
- priv->sensor[i].slope = SLOPE_DEFAULT;
+ if (!priv->sensor[i].slope)
+ priv->sensor[i].slope = SLOPE_DEFAULT;
if (mode == TWO_PT_CALIB) {
/*
* slope (m) = adc_code2 - adc_code1 (y2 - y1)/
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 2/9] drivers: thermal: tsens: Convert msm8960 to reg_field
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 1/9] drivers: thermal: tsens: Don't hardcode sensor slope Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 3/9] drivers: thermal: tsens: Add VER_0 tsens version Ansuel Smith
` (6 subsequent siblings)
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, Amit Kucheria, Andy Gross,
Bjorn Andersson, Zhang Rui, Rob Herring, linux-pm, linux-arm-msm,
devicetree, linux-kernel
Convert msm9860 driver to reg_field to use the init_common
function.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
---
drivers/thermal/qcom/tsens-8960.c | 73 ++++++++++++++++++++++++++++++-
1 file changed, 71 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 2a28a5af2..0d0c2647d 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -51,11 +51,22 @@
#define MIN_LIMIT_TH 0x0
#define MAX_LIMIT_TH 0xff
-#define S0_STATUS_ADDR 0x3628
#define INT_STATUS_ADDR 0x363c
#define TRDY_MASK BIT(7)
#define TIMEOUT_US 100
+#define S0_STATUS_OFF 0x3628
+#define S1_STATUS_OFF 0x362c
+#define S2_STATUS_OFF 0x3630
+#define S3_STATUS_OFF 0x3634
+#define S4_STATUS_OFF 0x3638
+#define S5_STATUS_OFF 0x3664 /* Sensors 5-10 found on apq8064/msm8960 */
+#define S6_STATUS_OFF 0x3668
+#define S7_STATUS_OFF 0x366c
+#define S8_STATUS_OFF 0x3670
+#define S9_STATUS_OFF 0x3674
+#define S10_STATUS_OFF 0x3678
+
static int suspend_8960(struct tsens_priv *priv)
{
int ret;
@@ -179,7 +190,7 @@ static int init_8960(struct tsens_priv *priv)
*/
for (i = 0; i < priv->num_sensors; i++) {
if (i >= 5)
- priv->sensor[i].status = S0_STATUS_ADDR + 40;
+ priv->sensor[i].status = S0_STATUS_OFF + 40;
priv->sensor[i].status += i * 4;
}
@@ -269,6 +280,63 @@ static int get_temp_8960(const struct tsens_sensor *s, int *temp)
return -ETIMEDOUT;
}
+static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
+ /* ----- SROT ------ */
+ /* No VERSION information */
+
+ /* CNTL */
+ [TSENS_EN] = REG_FIELD(CNTL_ADDR, 0, 0),
+ [TSENS_SW_RST] = REG_FIELD(CNTL_ADDR, 1, 1),
+ /* 8960 has 5 sensors, 8660 has 11, we only handle 5 */
+ [SENSOR_EN] = REG_FIELD(CNTL_ADDR, 3, 7),
+
+ /* ----- TM ------ */
+ /* INTERRUPT ENABLE */
+ /* NO INTERRUPT ENABLE */
+
+ /* Single UPPER/LOWER TEMPERATURE THRESHOLD for all sensors */
+ [LOW_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 0, 7),
+ [UP_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 8, 15),
+ /* MIN_THRESH_0 and MAX_THRESH_0 are not present in the regfield
+ * Recycle CRIT_THRESH_0 and 1 to set the required regs to hardcoded temp
+ * MIN_THRESH_0 -> CRIT_THRESH_1
+ * MAX_THRESH_0 -> CRIT_THRESH_0
+ */
+ [CRIT_THRESH_1] = REG_FIELD(THRESHOLD_ADDR, 16, 23),
+ [CRIT_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 24, 31),
+
+ /* UPPER/LOWER INTERRUPT [CLEAR/STATUS] */
+ /* 1 == clear, 0 == normal operation */
+ [LOW_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 9, 9),
+ [UP_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 10, 10),
+
+ /* NO CRITICAL INTERRUPT SUPPORT on 8960 */
+
+ /* Sn_STATUS */
+ [LAST_TEMP_0] = REG_FIELD(S0_STATUS_OFF, 0, 7),
+ [LAST_TEMP_1] = REG_FIELD(S1_STATUS_OFF, 0, 7),
+ [LAST_TEMP_2] = REG_FIELD(S2_STATUS_OFF, 0, 7),
+ [LAST_TEMP_3] = REG_FIELD(S3_STATUS_OFF, 0, 7),
+ [LAST_TEMP_4] = REG_FIELD(S4_STATUS_OFF, 0, 7),
+ [LAST_TEMP_5] = REG_FIELD(S5_STATUS_OFF, 0, 7),
+ [LAST_TEMP_6] = REG_FIELD(S6_STATUS_OFF, 0, 7),
+ [LAST_TEMP_7] = REG_FIELD(S7_STATUS_OFF, 0, 7),
+ [LAST_TEMP_8] = REG_FIELD(S8_STATUS_OFF, 0, 7),
+ [LAST_TEMP_9] = REG_FIELD(S9_STATUS_OFF, 0, 7),
+ [LAST_TEMP_10] = REG_FIELD(S10_STATUS_OFF, 0, 7),
+
+ /* No VALID field on 8960 */
+ /* TSENS_INT_STATUS bits: 1 == threshold violated */
+ [MIN_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 0, 0),
+ [LOWER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 1, 1),
+ [UPPER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 2, 2),
+ /* No CRITICAL field on 8960 */
+ [MAX_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 3, 3),
+
+ /* TRDY: 1=ready, 0=in progress */
+ [TRDY] = REG_FIELD(INT_STATUS_ADDR, 7, 7),
+};
+
static const struct tsens_ops ops_8960 = {
.init = init_8960,
.calibrate = calibrate_8960,
@@ -282,4 +350,5 @@ static const struct tsens_ops ops_8960 = {
struct tsens_plat_data data_8960 = {
.num_sensors = 11,
.ops = &ops_8960,
+ .fields = tsens_8960_regfields,
};
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-20 18:33 ` [thermal PATCH v15 2/9] drivers: thermal: tsens: Convert msm8960 to reg_field Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: a0ed1411278db902a043e584c8ed320fe34346b6
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//a0ed1411278db902a043e584c8ed320fe34346b6
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:36 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:09:05 +02:00
thermal/drivers/tsens: Convert msm8960 to reg_field
Convert msm9860 driver to reg_field to use the init_common
function.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-3-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens-8960.c | 73 +++++++++++++++++++++++++++++-
1 file changed, 71 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 2a28a5a..0d0c264 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -51,11 +51,22 @@
#define MIN_LIMIT_TH 0x0
#define MAX_LIMIT_TH 0xff
-#define S0_STATUS_ADDR 0x3628
#define INT_STATUS_ADDR 0x363c
#define TRDY_MASK BIT(7)
#define TIMEOUT_US 100
+#define S0_STATUS_OFF 0x3628
+#define S1_STATUS_OFF 0x362c
+#define S2_STATUS_OFF 0x3630
+#define S3_STATUS_OFF 0x3634
+#define S4_STATUS_OFF 0x3638
+#define S5_STATUS_OFF 0x3664 /* Sensors 5-10 found on apq8064/msm8960 */
+#define S6_STATUS_OFF 0x3668
+#define S7_STATUS_OFF 0x366c
+#define S8_STATUS_OFF 0x3670
+#define S9_STATUS_OFF 0x3674
+#define S10_STATUS_OFF 0x3678
+
static int suspend_8960(struct tsens_priv *priv)
{
int ret;
@@ -179,7 +190,7 @@ static int init_8960(struct tsens_priv *priv)
*/
for (i = 0; i < priv->num_sensors; i++) {
if (i >= 5)
- priv->sensor[i].status = S0_STATUS_ADDR + 40;
+ priv->sensor[i].status = S0_STATUS_OFF + 40;
priv->sensor[i].status += i * 4;
}
@@ -269,6 +280,63 @@ static int get_temp_8960(const struct tsens_sensor *s, int *temp)
return -ETIMEDOUT;
}
+static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
+ /* ----- SROT ------ */
+ /* No VERSION information */
+
+ /* CNTL */
+ [TSENS_EN] = REG_FIELD(CNTL_ADDR, 0, 0),
+ [TSENS_SW_RST] = REG_FIELD(CNTL_ADDR, 1, 1),
+ /* 8960 has 5 sensors, 8660 has 11, we only handle 5 */
+ [SENSOR_EN] = REG_FIELD(CNTL_ADDR, 3, 7),
+
+ /* ----- TM ------ */
+ /* INTERRUPT ENABLE */
+ /* NO INTERRUPT ENABLE */
+
+ /* Single UPPER/LOWER TEMPERATURE THRESHOLD for all sensors */
+ [LOW_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 0, 7),
+ [UP_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 8, 15),
+ /* MIN_THRESH_0 and MAX_THRESH_0 are not present in the regfield
+ * Recycle CRIT_THRESH_0 and 1 to set the required regs to hardcoded temp
+ * MIN_THRESH_0 -> CRIT_THRESH_1
+ * MAX_THRESH_0 -> CRIT_THRESH_0
+ */
+ [CRIT_THRESH_1] = REG_FIELD(THRESHOLD_ADDR, 16, 23),
+ [CRIT_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 24, 31),
+
+ /* UPPER/LOWER INTERRUPT [CLEAR/STATUS] */
+ /* 1 == clear, 0 == normal operation */
+ [LOW_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 9, 9),
+ [UP_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 10, 10),
+
+ /* NO CRITICAL INTERRUPT SUPPORT on 8960 */
+
+ /* Sn_STATUS */
+ [LAST_TEMP_0] = REG_FIELD(S0_STATUS_OFF, 0, 7),
+ [LAST_TEMP_1] = REG_FIELD(S1_STATUS_OFF, 0, 7),
+ [LAST_TEMP_2] = REG_FIELD(S2_STATUS_OFF, 0, 7),
+ [LAST_TEMP_3] = REG_FIELD(S3_STATUS_OFF, 0, 7),
+ [LAST_TEMP_4] = REG_FIELD(S4_STATUS_OFF, 0, 7),
+ [LAST_TEMP_5] = REG_FIELD(S5_STATUS_OFF, 0, 7),
+ [LAST_TEMP_6] = REG_FIELD(S6_STATUS_OFF, 0, 7),
+ [LAST_TEMP_7] = REG_FIELD(S7_STATUS_OFF, 0, 7),
+ [LAST_TEMP_8] = REG_FIELD(S8_STATUS_OFF, 0, 7),
+ [LAST_TEMP_9] = REG_FIELD(S9_STATUS_OFF, 0, 7),
+ [LAST_TEMP_10] = REG_FIELD(S10_STATUS_OFF, 0, 7),
+
+ /* No VALID field on 8960 */
+ /* TSENS_INT_STATUS bits: 1 == threshold violated */
+ [MIN_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 0, 0),
+ [LOWER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 1, 1),
+ [UPPER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 2, 2),
+ /* No CRITICAL field on 8960 */
+ [MAX_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 3, 3),
+
+ /* TRDY: 1=ready, 0=in progress */
+ [TRDY] = REG_FIELD(INT_STATUS_ADDR, 7, 7),
+};
+
static const struct tsens_ops ops_8960 = {
.init = init_8960,
.calibrate = calibrate_8960,
@@ -282,4 +350,5 @@ static const struct tsens_ops ops_8960 = {
struct tsens_plat_data data_8960 = {
.num_sensors = 11,
.ops = &ops_8960,
+ .fields = tsens_8960_regfields,
};
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 3/9] drivers: thermal: tsens: Add VER_0 tsens version
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 1/9] drivers: thermal: tsens: Don't hardcode sensor slope Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 2/9] drivers: thermal: tsens: Convert msm8960 to reg_field Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 4/9] drivers: thermal: tsens: Use init_common for msm8960 Ansuel Smith
` (5 subsequent siblings)
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, kernel test robot, Dan Carpenter,
Andy Gross, Bjorn Andersson, Amit Kucheria, Zhang Rui,
Rob Herring, linux-arm-msm, linux-pm, devicetree, linux-kernel
VER_0 is used to describe device based on tsens version before v0.1.
These device are devices based on msm8960 for example apq8064 or
ipq806x. Add support for VER_0 in tsens.c and set the right tsens feat
in tsens-8960.c file.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
---
drivers/thermal/qcom/tsens-8960.c | 9 ++
drivers/thermal/qcom/tsens.c | 150 ++++++++++++++++++++++++------
drivers/thermal/qcom/tsens.h | 4 +-
3 files changed, 133 insertions(+), 30 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 0d0c2647d..0dd15e812 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -347,8 +347,17 @@ static const struct tsens_ops ops_8960 = {
.resume = resume_8960,
};
+static struct tsens_features tsens_8960_feat = {
+ .ver_major = VER_0,
+ .crit_int = 0,
+ .adc = 1,
+ .srot_split = 0,
+ .max_sensors = 11,
+};
+
struct tsens_plat_data data_8960 = {
.num_sensors = 11,
.ops = &ops_8960,
+ .feat = &tsens_8960_feat,
.fields = tsens_8960_regfields,
};
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index 562c438ff..be0c5931f 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -12,6 +12,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
+#include <linux/mfd/syscon.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/regmap.h>
@@ -516,6 +517,15 @@ irqreturn_t tsens_irq_thread(int irq, void *data)
dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
hw_id, __func__, temp);
}
+
+ if (tsens_version(priv) < VER_0_1) {
+ /* Constraint: There is only 1 interrupt control register for all
+ * 11 temperature sensor. So monitoring more than 1 sensor based
+ * on interrupts will yield inconsistent result. To overcome this
+ * issue we will monitor only sensor 0 which is the master sensor.
+ */
+ break;
+ }
}
return IRQ_HANDLED;
@@ -531,6 +541,13 @@ int tsens_set_trips(void *_sensor, int low, int high)
int high_val, low_val, cl_high, cl_low;
u32 hw_id = s->hw_id;
+ if (tsens_version(priv) < VER_0_1) {
+ /* Pre v0.1 IP had a single register for each type of interrupt
+ * and thresholds
+ */
+ hw_id = 0;
+ }
+
dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
hw_id, __func__, low, high);
@@ -585,18 +602,21 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp)
u32 valid;
int ret;
- ret = regmap_field_read(priv->rf[valid_idx], &valid);
- if (ret)
- return ret;
- while (!valid) {
- /* Valid bit is 0 for 6 AHB clock cycles.
- * At 19.2MHz, 1 AHB clock is ~60ns.
- * We should enter this loop very, very rarely.
- */
- ndelay(400);
+ /* VER_0 doesn't have VALID bit */
+ if (tsens_version(priv) >= VER_0_1) {
ret = regmap_field_read(priv->rf[valid_idx], &valid);
if (ret)
return ret;
+ while (!valid) {
+ /* Valid bit is 0 for 6 AHB clock cycles.
+ * At 19.2MHz, 1 AHB clock is ~60ns.
+ * We should enter this loop very, very rarely.
+ */
+ ndelay(400);
+ ret = regmap_field_read(priv->rf[valid_idx], &valid);
+ if (ret)
+ return ret;
+ }
}
/* Valid bit is set, OK to read the temperature */
@@ -609,15 +629,29 @@ int get_temp_common(const struct tsens_sensor *s, int *temp)
{
struct tsens_priv *priv = s->priv;
int hw_id = s->hw_id;
- int last_temp = 0, ret;
+ int last_temp = 0, ret, trdy;
+ unsigned long timeout;
- ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
- if (ret)
- return ret;
+ timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
+ do {
+ if (tsens_version(priv) == VER_0) {
+ ret = regmap_field_read(priv->rf[TRDY], &trdy);
+ if (ret)
+ return ret;
+ if (!trdy)
+ continue;
+ }
- *temp = code_to_degc(last_temp, s) * 1000;
+ ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
+ if (ret)
+ return ret;
- return 0;
+ *temp = code_to_degc(last_temp, s) * 1000;
+
+ return 0;
+ } while (time_before(jiffies, timeout));
+
+ return -ETIMEDOUT;
}
#ifdef CONFIG_DEBUG_FS
@@ -739,19 +773,34 @@ int __init init_common(struct tsens_priv *priv)
priv->tm_offset = 0x1000;
}
- res = platform_get_resource(op, IORESOURCE_MEM, 0);
- tm_base = devm_ioremap_resource(dev, res);
- if (IS_ERR(tm_base)) {
- ret = PTR_ERR(tm_base);
- goto err_put_device;
+ if (tsens_version(priv) >= VER_0_1) {
+ res = platform_get_resource(op, IORESOURCE_MEM, 0);
+ tm_base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(tm_base)) {
+ ret = PTR_ERR(tm_base);
+ goto err_put_device;
+ }
+
+ priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
+ } else { /* VER_0 share the same gcc regs using a syscon */
+ struct device *parent = priv->dev->parent;
+
+ if (parent)
+ priv->tm_map = syscon_node_to_regmap(parent->of_node);
}
- priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
- if (IS_ERR(priv->tm_map)) {
- ret = PTR_ERR(priv->tm_map);
+ if (IS_ERR_OR_NULL(priv->tm_map)) {
+ if (!priv->tm_map)
+ ret = -ENODEV;
+ else
+ ret = PTR_ERR(priv->tm_map);
goto err_put_device;
}
+ /* VER_0 have only tm_map */
+ if (!priv->srot_map)
+ priv->srot_map = priv->tm_map;
+
if (tsens_version(priv) > VER_0_1) {
for (i = VER_MAJOR; i <= VER_STEP; i++) {
priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
@@ -770,6 +819,10 @@ int __init init_common(struct tsens_priv *priv)
ret = PTR_ERR(priv->rf[TSENS_EN]);
goto err_put_device;
}
+ /* in VER_0 TSENS need to be explicitly enabled */
+ if (tsens_version(priv) == VER_0)
+ regmap_field_write(priv->rf[TSENS_EN], 1);
+
ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
if (ret)
goto err_put_device;
@@ -792,6 +845,19 @@ int __init init_common(struct tsens_priv *priv)
goto err_put_device;
}
+ priv->rf[TSENS_SW_RST] =
+ devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_SW_RST]);
+ if (IS_ERR(priv->rf[TSENS_SW_RST])) {
+ ret = PTR_ERR(priv->rf[TSENS_SW_RST]);
+ goto err_put_device;
+ }
+
+ priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);
+ if (IS_ERR(priv->rf[TRDY])) {
+ ret = PTR_ERR(priv->rf[TRDY]);
+ goto err_put_device;
+ }
+
/* This loop might need changes if enum regfield_ids is reordered */
for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
for (i = 0; i < priv->feat->max_sensors; i++) {
@@ -807,7 +873,7 @@ int __init init_common(struct tsens_priv *priv)
}
}
- if (priv->feat->crit_int) {
+ if (priv->feat->crit_int || tsens_version(priv) < VER_0_1) {
/* Loop might need changes if enum regfield_ids is reordered */
for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
for (i = 0; i < priv->feat->max_sensors; i++) {
@@ -845,7 +911,11 @@ int __init init_common(struct tsens_priv *priv)
}
spin_lock_init(&priv->ul_lock);
- tsens_enable_irq(priv);
+
+ /* VER_0 interrupt doesn't need to be enabled */
+ if (tsens_version(priv) >= VER_0_1)
+ tsens_enable_irq(priv);
+
tsens_debug_init(op);
err_put_device:
@@ -941,10 +1011,19 @@ static int tsens_register_irq(struct tsens_priv *priv, char *irqname,
if (irq == -ENXIO)
ret = 0;
} else {
- ret = devm_request_threaded_irq(&pdev->dev, irq,
- NULL, thread_fn,
- IRQF_ONESHOT,
- dev_name(&pdev->dev), priv);
+ /* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */
+ if (tsens_version(priv) == VER_0)
+ ret = devm_request_threaded_irq(&pdev->dev, irq,
+ thread_fn, NULL,
+ IRQF_TRIGGER_RISING,
+ dev_name(&pdev->dev),
+ priv);
+ else
+ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
+ thread_fn, IRQF_ONESHOT,
+ dev_name(&pdev->dev),
+ priv);
+
if (ret)
dev_err(&pdev->dev, "%s: failed to get irq\n",
__func__);
@@ -973,6 +1052,19 @@ static int tsens_register(struct tsens_priv *priv)
priv->ops->enable(priv, i);
}
+ /* VER_0 require to set MIN and MAX THRESH
+ * These 2 regs are set using the:
+ * - CRIT_THRESH_0 for MAX THRESH hardcoded to 120°C
+ * - CRIT_THRESH_1 for MIN THRESH hardcoded to 0°C
+ */
+ if (tsens_version(priv) < VER_0_1) {
+ regmap_field_write(priv->rf[CRIT_THRESH_0],
+ tsens_mC_to_hw(priv->sensor, 120000));
+
+ regmap_field_write(priv->rf[CRIT_THRESH_1],
+ tsens_mC_to_hw(priv->sensor, 0));
+ }
+
ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
if (ret < 0)
return ret;
diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
index 59d01162c..5dbed0a3f 100644
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -13,6 +13,7 @@
#define CAL_DEGC_PT2 120
#define SLOPE_FACTOR 1000
#define SLOPE_DEFAULT 3200
+#define TIMEOUT_US 100
#define THRESHOLD_MAX_ADC_CODE 0x3ff
#define THRESHOLD_MIN_ADC_CODE 0x0
@@ -25,7 +26,8 @@ struct tsens_priv;
/* IP version numbers in ascending order */
enum tsens_ver {
- VER_0_1 = 0,
+ VER_0 = 0,
+ VER_0_1,
VER_1_X,
VER_2_X,
};
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Add VER_0 tsens version
2021-04-20 18:33 ` [thermal PATCH v15 3/9] drivers: thermal: tsens: Add VER_0 tsens version Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm
Cc: Ansuel Smith, Thara Gopinath, kernel test robot, Dan Carpenter,
Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: 53e2a20e4c41683b695145436b34aa4a14bbcd8c
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//53e2a20e4c41683b695145436b34aa4a14bbcd8c
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:37 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:09:14 +02:00
thermal/drivers/tsens: Add VER_0 tsens version
VER_0 is used to describe device based on tsens version before v0.1.
These device are devices based on msm8960 for example apq8064 or
ipq806x. Add support for VER_0 in tsens.c and set the right tsens feat
in tsens-8960.c file.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-4-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens-8960.c | 9 ++-
drivers/thermal/qcom/tsens.c | 150 +++++++++++++++++++++++------
drivers/thermal/qcom/tsens.h | 4 +-
3 files changed, 133 insertions(+), 30 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 0d0c264..0dd15e8 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -347,8 +347,17 @@ static const struct tsens_ops ops_8960 = {
.resume = resume_8960,
};
+static struct tsens_features tsens_8960_feat = {
+ .ver_major = VER_0,
+ .crit_int = 0,
+ .adc = 1,
+ .srot_split = 0,
+ .max_sensors = 11,
+};
+
struct tsens_plat_data data_8960 = {
.num_sensors = 11,
.ops = &ops_8960,
+ .feat = &tsens_8960_feat,
.fields = tsens_8960_regfields,
};
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index d6f8021..83e01cb 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -12,6 +12,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
+#include <linux/mfd/syscon.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/regmap.h>
@@ -516,6 +517,15 @@ static irqreturn_t tsens_irq_thread(int irq, void *data)
dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
hw_id, __func__, temp);
}
+
+ if (tsens_version(priv) < VER_0_1) {
+ /* Constraint: There is only 1 interrupt control register for all
+ * 11 temperature sensor. So monitoring more than 1 sensor based
+ * on interrupts will yield inconsistent result. To overcome this
+ * issue we will monitor only sensor 0 which is the master sensor.
+ */
+ break;
+ }
}
return IRQ_HANDLED;
@@ -531,6 +541,13 @@ static int tsens_set_trips(void *_sensor, int low, int high)
int high_val, low_val, cl_high, cl_low;
u32 hw_id = s->hw_id;
+ if (tsens_version(priv) < VER_0_1) {
+ /* Pre v0.1 IP had a single register for each type of interrupt
+ * and thresholds
+ */
+ hw_id = 0;
+ }
+
dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
hw_id, __func__, low, high);
@@ -585,18 +602,21 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp)
u32 valid;
int ret;
- ret = regmap_field_read(priv->rf[valid_idx], &valid);
- if (ret)
- return ret;
- while (!valid) {
- /* Valid bit is 0 for 6 AHB clock cycles.
- * At 19.2MHz, 1 AHB clock is ~60ns.
- * We should enter this loop very, very rarely.
- */
- ndelay(400);
+ /* VER_0 doesn't have VALID bit */
+ if (tsens_version(priv) >= VER_0_1) {
ret = regmap_field_read(priv->rf[valid_idx], &valid);
if (ret)
return ret;
+ while (!valid) {
+ /* Valid bit is 0 for 6 AHB clock cycles.
+ * At 19.2MHz, 1 AHB clock is ~60ns.
+ * We should enter this loop very, very rarely.
+ */
+ ndelay(400);
+ ret = regmap_field_read(priv->rf[valid_idx], &valid);
+ if (ret)
+ return ret;
+ }
}
/* Valid bit is set, OK to read the temperature */
@@ -609,15 +629,29 @@ int get_temp_common(const struct tsens_sensor *s, int *temp)
{
struct tsens_priv *priv = s->priv;
int hw_id = s->hw_id;
- int last_temp = 0, ret;
+ int last_temp = 0, ret, trdy;
+ unsigned long timeout;
- ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
- if (ret)
- return ret;
+ timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
+ do {
+ if (tsens_version(priv) == VER_0) {
+ ret = regmap_field_read(priv->rf[TRDY], &trdy);
+ if (ret)
+ return ret;
+ if (!trdy)
+ continue;
+ }
- *temp = code_to_degc(last_temp, s) * 1000;
+ ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
+ if (ret)
+ return ret;
- return 0;
+ *temp = code_to_degc(last_temp, s) * 1000;
+
+ return 0;
+ } while (time_before(jiffies, timeout));
+
+ return -ETIMEDOUT;
}
#ifdef CONFIG_DEBUG_FS
@@ -739,19 +773,34 @@ int __init init_common(struct tsens_priv *priv)
priv->tm_offset = 0x1000;
}
- res = platform_get_resource(op, IORESOURCE_MEM, 0);
- tm_base = devm_ioremap_resource(dev, res);
- if (IS_ERR(tm_base)) {
- ret = PTR_ERR(tm_base);
- goto err_put_device;
+ if (tsens_version(priv) >= VER_0_1) {
+ res = platform_get_resource(op, IORESOURCE_MEM, 0);
+ tm_base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(tm_base)) {
+ ret = PTR_ERR(tm_base);
+ goto err_put_device;
+ }
+
+ priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
+ } else { /* VER_0 share the same gcc regs using a syscon */
+ struct device *parent = priv->dev->parent;
+
+ if (parent)
+ priv->tm_map = syscon_node_to_regmap(parent->of_node);
}
- priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
- if (IS_ERR(priv->tm_map)) {
- ret = PTR_ERR(priv->tm_map);
+ if (IS_ERR_OR_NULL(priv->tm_map)) {
+ if (!priv->tm_map)
+ ret = -ENODEV;
+ else
+ ret = PTR_ERR(priv->tm_map);
goto err_put_device;
}
+ /* VER_0 have only tm_map */
+ if (!priv->srot_map)
+ priv->srot_map = priv->tm_map;
+
if (tsens_version(priv) > VER_0_1) {
for (i = VER_MAJOR; i <= VER_STEP; i++) {
priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
@@ -772,6 +821,10 @@ int __init init_common(struct tsens_priv *priv)
ret = PTR_ERR(priv->rf[TSENS_EN]);
goto err_put_device;
}
+ /* in VER_0 TSENS need to be explicitly enabled */
+ if (tsens_version(priv) == VER_0)
+ regmap_field_write(priv->rf[TSENS_EN], 1);
+
ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
if (ret)
goto err_put_device;
@@ -794,6 +847,19 @@ int __init init_common(struct tsens_priv *priv)
goto err_put_device;
}
+ priv->rf[TSENS_SW_RST] =
+ devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_SW_RST]);
+ if (IS_ERR(priv->rf[TSENS_SW_RST])) {
+ ret = PTR_ERR(priv->rf[TSENS_SW_RST]);
+ goto err_put_device;
+ }
+
+ priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);
+ if (IS_ERR(priv->rf[TRDY])) {
+ ret = PTR_ERR(priv->rf[TRDY]);
+ goto err_put_device;
+ }
+
/* This loop might need changes if enum regfield_ids is reordered */
for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
for (i = 0; i < priv->feat->max_sensors; i++) {
@@ -809,7 +875,7 @@ int __init init_common(struct tsens_priv *priv)
}
}
- if (priv->feat->crit_int) {
+ if (priv->feat->crit_int || tsens_version(priv) < VER_0_1) {
/* Loop might need changes if enum regfield_ids is reordered */
for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
for (i = 0; i < priv->feat->max_sensors; i++) {
@@ -847,7 +913,11 @@ int __init init_common(struct tsens_priv *priv)
}
spin_lock_init(&priv->ul_lock);
- tsens_enable_irq(priv);
+
+ /* VER_0 interrupt doesn't need to be enabled */
+ if (tsens_version(priv) >= VER_0_1)
+ tsens_enable_irq(priv);
+
tsens_debug_init(op);
err_put_device:
@@ -949,10 +1019,19 @@ static int tsens_register_irq(struct tsens_priv *priv, char *irqname,
if (irq == -ENXIO)
ret = 0;
} else {
- ret = devm_request_threaded_irq(&pdev->dev, irq,
- NULL, thread_fn,
- IRQF_ONESHOT,
- dev_name(&pdev->dev), priv);
+ /* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */
+ if (tsens_version(priv) == VER_0)
+ ret = devm_request_threaded_irq(&pdev->dev, irq,
+ thread_fn, NULL,
+ IRQF_TRIGGER_RISING,
+ dev_name(&pdev->dev),
+ priv);
+ else
+ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
+ thread_fn, IRQF_ONESHOT,
+ dev_name(&pdev->dev),
+ priv);
+
if (ret)
dev_err(&pdev->dev, "%s: failed to get irq\n",
__func__);
@@ -981,6 +1060,19 @@ static int tsens_register(struct tsens_priv *priv)
priv->ops->enable(priv, i);
}
+ /* VER_0 require to set MIN and MAX THRESH
+ * These 2 regs are set using the:
+ * - CRIT_THRESH_0 for MAX THRESH hardcoded to 120°C
+ * - CRIT_THRESH_1 for MIN THRESH hardcoded to 0°C
+ */
+ if (tsens_version(priv) < VER_0_1) {
+ regmap_field_write(priv->rf[CRIT_THRESH_0],
+ tsens_mC_to_hw(priv->sensor, 120000));
+
+ regmap_field_write(priv->rf[CRIT_THRESH_1],
+ tsens_mC_to_hw(priv->sensor, 0));
+ }
+
ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
if (ret < 0)
return ret;
diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
index cba64c3..1471a2c 100644
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -13,6 +13,7 @@
#define CAL_DEGC_PT2 120
#define SLOPE_FACTOR 1000
#define SLOPE_DEFAULT 3200
+#define TIMEOUT_US 100
#define THRESHOLD_MAX_ADC_CODE 0x3ff
#define THRESHOLD_MIN_ADC_CODE 0x0
@@ -25,7 +26,8 @@ struct tsens_priv;
/* IP version numbers in ascending order */
enum tsens_ver {
- VER_0_1 = 0,
+ VER_0 = 0,
+ VER_0_1,
VER_1_X,
VER_2_X,
};
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 4/9] drivers: thermal: tsens: Use init_common for msm8960
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
` (2 preceding siblings ...)
2021-04-20 18:33 ` [thermal PATCH v15 3/9] drivers: thermal: tsens: Add VER_0 tsens version Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 5/9] drivers: thermal: tsens: Fix bug in sensor enable " Ansuel Smith
` (4 subsequent siblings)
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, Amit Kucheria, Andy Gross,
Bjorn Andersson, Zhang Rui, Rob Herring, linux-pm, linux-arm-msm,
devicetree, linux-kernel
Use init_common and drop custom init for msm8960.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
---
drivers/thermal/qcom/tsens-8960.c | 52 +------------------------------
1 file changed, 1 insertion(+), 51 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 0dd15e812..83746ee3f 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -173,56 +173,6 @@ static void disable_8960(struct tsens_priv *priv)
regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
}
-static int init_8960(struct tsens_priv *priv)
-{
- int ret, i;
- u32 reg_cntl;
-
- priv->tm_map = dev_get_regmap(priv->dev, NULL);
- if (!priv->tm_map)
- return -ENODEV;
-
- /*
- * The status registers for each sensor are discontiguous
- * because some SoCs have 5 sensors while others have more
- * but the control registers stay in the same place, i.e
- * directly after the first 5 status registers.
- */
- for (i = 0; i < priv->num_sensors; i++) {
- if (i >= 5)
- priv->sensor[i].status = S0_STATUS_OFF + 40;
- priv->sensor[i].status += i * 4;
- }
-
- reg_cntl = SW_RST;
- ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
- if (ret)
- return ret;
-
- if (priv->num_sensors > 1) {
- reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
- reg_cntl &= ~SW_RST;
- ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
- CONFIG_MASK, CONFIG);
- } else {
- reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
- reg_cntl &= ~CONFIG_MASK_8660;
- reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
- }
-
- reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
- ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
- if (ret)
- return ret;
-
- reg_cntl |= EN;
- ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
- if (ret)
- return ret;
-
- return 0;
-}
-
static int calibrate_8960(struct tsens_priv *priv)
{
int i;
@@ -338,7 +288,7 @@ static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
};
static const struct tsens_ops ops_8960 = {
- .init = init_8960,
+ .init = init_common,
.calibrate = calibrate_8960,
.get_temp = get_temp_8960,
.enable = enable_8960,
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Use init_common for msm8960
2021-04-20 18:33 ` [thermal PATCH v15 4/9] drivers: thermal: tsens: Use init_common for msm8960 Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: fdda131f8fbadee2dfc21f0787d11547b42a961e
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//fdda131f8fbadee2dfc21f0787d11547b42a961e
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:38 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:09:23 +02:00
thermal/drivers/tsens: Use init_common for msm8960
Use init_common and drop custom init for msm8960.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-5-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens-8960.c | 52 +------------------------------
1 file changed, 1 insertion(+), 51 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 0dd15e8..83746ee 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -173,56 +173,6 @@ static void disable_8960(struct tsens_priv *priv)
regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
}
-static int init_8960(struct tsens_priv *priv)
-{
- int ret, i;
- u32 reg_cntl;
-
- priv->tm_map = dev_get_regmap(priv->dev, NULL);
- if (!priv->tm_map)
- return -ENODEV;
-
- /*
- * The status registers for each sensor are discontiguous
- * because some SoCs have 5 sensors while others have more
- * but the control registers stay in the same place, i.e
- * directly after the first 5 status registers.
- */
- for (i = 0; i < priv->num_sensors; i++) {
- if (i >= 5)
- priv->sensor[i].status = S0_STATUS_OFF + 40;
- priv->sensor[i].status += i * 4;
- }
-
- reg_cntl = SW_RST;
- ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
- if (ret)
- return ret;
-
- if (priv->num_sensors > 1) {
- reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
- reg_cntl &= ~SW_RST;
- ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
- CONFIG_MASK, CONFIG);
- } else {
- reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
- reg_cntl &= ~CONFIG_MASK_8660;
- reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
- }
-
- reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
- ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
- if (ret)
- return ret;
-
- reg_cntl |= EN;
- ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
- if (ret)
- return ret;
-
- return 0;
-}
-
static int calibrate_8960(struct tsens_priv *priv)
{
int i;
@@ -338,7 +288,7 @@ static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
};
static const struct tsens_ops ops_8960 = {
- .init = init_8960,
+ .init = init_common,
.calibrate = calibrate_8960,
.get_temp = get_temp_8960,
.enable = enable_8960,
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 5/9] drivers: thermal: tsens: Fix bug in sensor enable for msm8960
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
` (3 preceding siblings ...)
2021-04-20 18:33 ` [thermal PATCH v15 4/9] drivers: thermal: tsens: Use init_common for msm8960 Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 6/9] drivers: thermal: tsens: Replace custom 8960 apis with generic apis Ansuel Smith
` (3 subsequent siblings)
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, Andy Gross, Bjorn Andersson,
Amit Kucheria, Zhang Rui, Rob Herring, linux-arm-msm, linux-pm,
devicetree, linux-kernel
Device based on tsens VER_0 contains a hardware bug that results in some
problem with sensor enablement. Sensor id 6-11 can't be enabled
selectively and all of them must be enabled in one step.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
---
drivers/thermal/qcom/tsens-8960.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 83746ee3f..a96d37c2b 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -27,9 +27,9 @@
#define EN BIT(0)
#define SW_RST BIT(1)
#define SENSOR0_EN BIT(3)
+#define MEASURE_PERIOD BIT(18)
#define SLP_CLK_ENA BIT(26)
#define SLP_CLK_ENA_8660 BIT(24)
-#define MEASURE_PERIOD 1
#define SENSOR0_SHIFT 3
/* INT_STATUS_ADDR bitmasks */
@@ -126,17 +126,34 @@ static int resume_8960(struct tsens_priv *priv)
static int enable_8960(struct tsens_priv *priv, int id)
{
int ret;
- u32 reg, mask;
+ u32 reg, mask = BIT(id);
ret = regmap_read(priv->tm_map, CNTL_ADDR, ®);
if (ret)
return ret;
- mask = BIT(id + SENSOR0_SHIFT);
+ /* HARDWARE BUG:
+ * On platforms with more than 6 sensors, all remaining sensors
+ * must be enabled together, otherwise undefined results are expected.
+ * (Sensor 6-7 disabled, Sensor 3 disabled...) In the original driver,
+ * all the sensors are enabled in one step hence this bug is not
+ * triggered.
+ */
+ if (id > 5)
+ mask = GENMASK(10, 6);
+
+ mask <<= SENSOR0_SHIFT;
+
+ /* Sensors already enabled. Skip. */
+ if ((reg & mask) == mask)
+ return 0;
+
ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST);
if (ret)
return ret;
+ reg |= MEASURE_PERIOD;
+
if (priv->num_sensors > 1)
reg |= mask | SLP_CLK_ENA | EN;
else
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Fix bug in sensor enable for msm8960
2021-04-20 18:33 ` [thermal PATCH v15 5/9] drivers: thermal: tsens: Fix bug in sensor enable " Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: 3d08f029fdbbd29c8b363ef4c8c4bfe3b8f79ad0
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//3d08f029fdbbd29c8b363ef4c8c4bfe3b8f79ad0
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:39 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:09:32 +02:00
thermal/drivers/tsens: Fix bug in sensor enable for msm8960
Device based on tsens VER_0 contains a hardware bug that results in some
problem with sensor enablement. Sensor id 6-11 can't be enabled
selectively and all of them must be enabled in one step.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-6-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens-8960.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 83746ee..a96d37c 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -27,9 +27,9 @@
#define EN BIT(0)
#define SW_RST BIT(1)
#define SENSOR0_EN BIT(3)
+#define MEASURE_PERIOD BIT(18)
#define SLP_CLK_ENA BIT(26)
#define SLP_CLK_ENA_8660 BIT(24)
-#define MEASURE_PERIOD 1
#define SENSOR0_SHIFT 3
/* INT_STATUS_ADDR bitmasks */
@@ -126,17 +126,34 @@ static int resume_8960(struct tsens_priv *priv)
static int enable_8960(struct tsens_priv *priv, int id)
{
int ret;
- u32 reg, mask;
+ u32 reg, mask = BIT(id);
ret = regmap_read(priv->tm_map, CNTL_ADDR, ®);
if (ret)
return ret;
- mask = BIT(id + SENSOR0_SHIFT);
+ /* HARDWARE BUG:
+ * On platforms with more than 6 sensors, all remaining sensors
+ * must be enabled together, otherwise undefined results are expected.
+ * (Sensor 6-7 disabled, Sensor 3 disabled...) In the original driver,
+ * all the sensors are enabled in one step hence this bug is not
+ * triggered.
+ */
+ if (id > 5)
+ mask = GENMASK(10, 6);
+
+ mask <<= SENSOR0_SHIFT;
+
+ /* Sensors already enabled. Skip. */
+ if ((reg & mask) == mask)
+ return 0;
+
ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST);
if (ret)
return ret;
+ reg |= MEASURE_PERIOD;
+
if (priv->num_sensors > 1)
reg |= mask | SLP_CLK_ENA | EN;
else
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 6/9] drivers: thermal: tsens: Replace custom 8960 apis with generic apis
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
` (4 preceding siblings ...)
2021-04-20 18:33 ` [thermal PATCH v15 5/9] drivers: thermal: tsens: Fix bug in sensor enable " Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 7/9] drivers: thermal: tsens: Drop unused define for msm8960 Ansuel Smith
` (2 subsequent siblings)
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, Amit Kucheria, Andy Gross,
Bjorn Andersson, Zhang Rui, Rob Herring, linux-pm, linux-arm-msm,
devicetree, linux-kernel
Rework calibrate function to use common function. Derive the offset from
a missing hardcoded slope table and the data from the nvmem calib
efuses.
Drop custom get_temp function and use generic api.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
---
drivers/thermal/qcom/tsens-8960.c | 56 +++++++++----------------------
1 file changed, 15 insertions(+), 41 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index a96d37c2b..58112f0df 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -67,6 +67,13 @@
#define S9_STATUS_OFF 0x3674
#define S10_STATUS_OFF 0x3678
+/* Original slope - 350 to compensate mC to C inaccuracy */
+static u32 tsens_msm8960_slope[] = {
+ 826, 826, 804, 826,
+ 761, 782, 782, 849,
+ 782, 849, 782
+ };
+
static int suspend_8960(struct tsens_priv *priv)
{
int ret;
@@ -194,9 +201,7 @@ static int calibrate_8960(struct tsens_priv *priv)
{
int i;
char *data;
-
- ssize_t num_read = priv->num_sensors;
- struct tsens_sensor *s = priv->sensor;
+ u32 p1[11];
data = qfprom_read(priv->dev, "calib");
if (IS_ERR(data))
@@ -204,49 +209,18 @@ static int calibrate_8960(struct tsens_priv *priv)
if (IS_ERR(data))
return PTR_ERR(data);
- for (i = 0; i < num_read; i++, s++)
- s->offset = data[i];
+ for (i = 0; i < priv->num_sensors; i++) {
+ p1[i] = data[i];
+ priv->sensor[i].slope = tsens_msm8960_slope[i];
+ }
+
+ compute_intercept_slope(priv, p1, NULL, ONE_PT_CALIB);
kfree(data);
return 0;
}
-/* Temperature on y axis and ADC-code on x-axis */
-static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
-{
- int slope, offset;
-
- slope = thermal_zone_get_slope(s->tzd);
- offset = CAL_MDEGC - slope * s->offset;
-
- return adc_code * slope + offset;
-}
-
-static int get_temp_8960(const struct tsens_sensor *s, int *temp)
-{
- int ret;
- u32 code, trdy;
- struct tsens_priv *priv = s->priv;
- unsigned long timeout;
-
- timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
- do {
- ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
- if (ret)
- return ret;
- if (!(trdy & TRDY_MASK))
- continue;
- ret = regmap_read(priv->tm_map, s->status, &code);
- if (ret)
- return ret;
- *temp = code_to_mdegC(code, s);
- return 0;
- } while (time_before(jiffies, timeout));
-
- return -ETIMEDOUT;
-}
-
static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
/* ----- SROT ------ */
/* No VERSION information */
@@ -307,7 +281,7 @@ static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
static const struct tsens_ops ops_8960 = {
.init = init_common,
.calibrate = calibrate_8960,
- .get_temp = get_temp_8960,
+ .get_temp = get_temp_common,
.enable = enable_8960,
.disable = disable_8960,
.suspend = suspend_8960,
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Replace custom 8960 apis with generic apis
2021-04-20 18:33 ` [thermal PATCH v15 6/9] drivers: thermal: tsens: Replace custom 8960 apis with generic apis Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: dfc1193d4dbd6c3cb68c944413146c940bde290a
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//dfc1193d4dbd6c3cb68c944413146c940bde290a
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:40 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:09:59 +02:00
thermal/drivers/tsens: Replace custom 8960 apis with generic apis
Rework calibrate function to use common function. Derive the offset from
a missing hardcoded slope table and the data from the nvmem calib
efuses.
Drop custom get_temp function and use generic api.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-7-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens-8960.c | 56 ++++++++----------------------
1 file changed, 15 insertions(+), 41 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index a96d37c..58112f0 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -67,6 +67,13 @@
#define S9_STATUS_OFF 0x3674
#define S10_STATUS_OFF 0x3678
+/* Original slope - 350 to compensate mC to C inaccuracy */
+static u32 tsens_msm8960_slope[] = {
+ 826, 826, 804, 826,
+ 761, 782, 782, 849,
+ 782, 849, 782
+ };
+
static int suspend_8960(struct tsens_priv *priv)
{
int ret;
@@ -194,9 +201,7 @@ static int calibrate_8960(struct tsens_priv *priv)
{
int i;
char *data;
-
- ssize_t num_read = priv->num_sensors;
- struct tsens_sensor *s = priv->sensor;
+ u32 p1[11];
data = qfprom_read(priv->dev, "calib");
if (IS_ERR(data))
@@ -204,49 +209,18 @@ static int calibrate_8960(struct tsens_priv *priv)
if (IS_ERR(data))
return PTR_ERR(data);
- for (i = 0; i < num_read; i++, s++)
- s->offset = data[i];
+ for (i = 0; i < priv->num_sensors; i++) {
+ p1[i] = data[i];
+ priv->sensor[i].slope = tsens_msm8960_slope[i];
+ }
+
+ compute_intercept_slope(priv, p1, NULL, ONE_PT_CALIB);
kfree(data);
return 0;
}
-/* Temperature on y axis and ADC-code on x-axis */
-static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
-{
- int slope, offset;
-
- slope = thermal_zone_get_slope(s->tzd);
- offset = CAL_MDEGC - slope * s->offset;
-
- return adc_code * slope + offset;
-}
-
-static int get_temp_8960(const struct tsens_sensor *s, int *temp)
-{
- int ret;
- u32 code, trdy;
- struct tsens_priv *priv = s->priv;
- unsigned long timeout;
-
- timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
- do {
- ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
- if (ret)
- return ret;
- if (!(trdy & TRDY_MASK))
- continue;
- ret = regmap_read(priv->tm_map, s->status, &code);
- if (ret)
- return ret;
- *temp = code_to_mdegC(code, s);
- return 0;
- } while (time_before(jiffies, timeout));
-
- return -ETIMEDOUT;
-}
-
static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
/* ----- SROT ------ */
/* No VERSION information */
@@ -307,7 +281,7 @@ static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
static const struct tsens_ops ops_8960 = {
.init = init_common,
.calibrate = calibrate_8960,
- .get_temp = get_temp_8960,
+ .get_temp = get_temp_common,
.enable = enable_8960,
.disable = disable_8960,
.suspend = suspend_8960,
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 7/9] drivers: thermal: tsens: Drop unused define for msm8960
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
` (5 preceding siblings ...)
2021-04-20 18:33 ` [thermal PATCH v15 6/9] drivers: thermal: tsens: Replace custom 8960 apis with generic apis Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 8/9] drivers: thermal: tsens: Add support for ipq8064-tsens Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 9/9] dt-bindings: thermal: tsens: Document ipq8064 bindings Ansuel Smith
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, Andy Gross, Bjorn Andersson,
Amit Kucheria, Zhang Rui, Rob Herring, linux-arm-msm, linux-pm,
devicetree, linux-kernel
Drop unused define for msm8960 replaced by generic api and reg_field.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
---
drivers/thermal/qcom/tsens-8960.c | 24 +-----------------------
1 file changed, 1 insertion(+), 23 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 58112f0df..67c1748cd 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -10,8 +10,6 @@
#include <linux/thermal.h>
#include "tsens.h"
-#define CAL_MDEGC 30000
-
#define CONFIG_ADDR 0x3640
#define CONFIG_ADDR_8660 0x3620
/* CONFIG_ADDR bitmasks */
@@ -21,39 +19,19 @@
#define CONFIG_SHIFT_8660 28
#define CONFIG_MASK_8660 (3 << CONFIG_SHIFT_8660)
-#define STATUS_CNTL_ADDR_8064 0x3660
#define CNTL_ADDR 0x3620
/* CNTL_ADDR bitmasks */
#define EN BIT(0)
#define SW_RST BIT(1)
-#define SENSOR0_EN BIT(3)
+
#define MEASURE_PERIOD BIT(18)
#define SLP_CLK_ENA BIT(26)
#define SLP_CLK_ENA_8660 BIT(24)
#define SENSOR0_SHIFT 3
-/* INT_STATUS_ADDR bitmasks */
-#define MIN_STATUS_MASK BIT(0)
-#define LOWER_STATUS_CLR BIT(1)
-#define UPPER_STATUS_CLR BIT(2)
-#define MAX_STATUS_MASK BIT(3)
-
#define THRESHOLD_ADDR 0x3624
-/* THRESHOLD_ADDR bitmasks */
-#define THRESHOLD_MAX_LIMIT_SHIFT 24
-#define THRESHOLD_MIN_LIMIT_SHIFT 16
-#define THRESHOLD_UPPER_LIMIT_SHIFT 8
-#define THRESHOLD_LOWER_LIMIT_SHIFT 0
-
-/* Initial temperature threshold values */
-#define LOWER_LIMIT_TH 0x50
-#define UPPER_LIMIT_TH 0xdf
-#define MIN_LIMIT_TH 0x0
-#define MAX_LIMIT_TH 0xff
#define INT_STATUS_ADDR 0x363c
-#define TRDY_MASK BIT(7)
-#define TIMEOUT_US 100
#define S0_STATUS_OFF 0x3628
#define S1_STATUS_OFF 0x362c
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Drop unused define for msm8960
2021-04-20 18:33 ` [thermal PATCH v15 7/9] drivers: thermal: tsens: Drop unused define for msm8960 Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: 2ebd0982e6ba69d9f9c02a4a0aab705a5526283e
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//2ebd0982e6ba69d9f9c02a4a0aab705a5526283e
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:41 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:10:08 +02:00
thermal/drivers/tsens: Drop unused define for msm8960
Drop unused define for msm8960 replaced by generic api and reg_field.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-8-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens-8960.c | 24 +-----------------------
1 file changed, 1 insertion(+), 23 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 58112f0..67c1748 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -10,8 +10,6 @@
#include <linux/thermal.h>
#include "tsens.h"
-#define CAL_MDEGC 30000
-
#define CONFIG_ADDR 0x3640
#define CONFIG_ADDR_8660 0x3620
/* CONFIG_ADDR bitmasks */
@@ -21,39 +19,19 @@
#define CONFIG_SHIFT_8660 28
#define CONFIG_MASK_8660 (3 << CONFIG_SHIFT_8660)
-#define STATUS_CNTL_ADDR_8064 0x3660
#define CNTL_ADDR 0x3620
/* CNTL_ADDR bitmasks */
#define EN BIT(0)
#define SW_RST BIT(1)
-#define SENSOR0_EN BIT(3)
+
#define MEASURE_PERIOD BIT(18)
#define SLP_CLK_ENA BIT(26)
#define SLP_CLK_ENA_8660 BIT(24)
#define SENSOR0_SHIFT 3
-/* INT_STATUS_ADDR bitmasks */
-#define MIN_STATUS_MASK BIT(0)
-#define LOWER_STATUS_CLR BIT(1)
-#define UPPER_STATUS_CLR BIT(2)
-#define MAX_STATUS_MASK BIT(3)
-
#define THRESHOLD_ADDR 0x3624
-/* THRESHOLD_ADDR bitmasks */
-#define THRESHOLD_MAX_LIMIT_SHIFT 24
-#define THRESHOLD_MIN_LIMIT_SHIFT 16
-#define THRESHOLD_UPPER_LIMIT_SHIFT 8
-#define THRESHOLD_LOWER_LIMIT_SHIFT 0
-
-/* Initial temperature threshold values */
-#define LOWER_LIMIT_TH 0x50
-#define UPPER_LIMIT_TH 0xdf
-#define MIN_LIMIT_TH 0x0
-#define MAX_LIMIT_TH 0xff
#define INT_STATUS_ADDR 0x363c
-#define TRDY_MASK BIT(7)
-#define TIMEOUT_US 100
#define S0_STATUS_OFF 0x3628
#define S1_STATUS_OFF 0x362c
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 8/9] drivers: thermal: tsens: Add support for ipq8064-tsens
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
` (6 preceding siblings ...)
2021-04-20 18:33 ` [thermal PATCH v15 7/9] drivers: thermal: tsens: Drop unused define for msm8960 Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
2021-04-20 18:33 ` [thermal PATCH v15 9/9] dt-bindings: thermal: tsens: Document ipq8064 bindings Ansuel Smith
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Thara Gopinath, Amit Kucheria, Andy Gross,
Bjorn Andersson, Zhang Rui, Rob Herring, linux-pm, linux-arm-msm,
devicetree, linux-kernel
Add support for tsens present in ipq806x SoCs based on generic msm8960
tsens driver.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
---
drivers/thermal/qcom/tsens.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index be0c5931f..56b505f35 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -966,6 +966,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume);
static const struct of_device_id tsens_table[] = {
{
+ .compatible = "qcom,ipq8064-tsens",
+ .data = &data_8960,
+ }, {
.compatible = "qcom,msm8916-tsens",
.data = &data_8916,
}, {
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] thermal/drivers/tsens: Add support for ipq8064-tsens
2021-04-20 18:33 ` [thermal PATCH v15 8/9] drivers: thermal: tsens: Add support for ipq8064-tsens Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: 6b3aeafbc12c18036809108e301efe8056249233
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//6b3aeafbc12c18036809108e301efe8056249233
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:42 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:10:17 +02:00
thermal/drivers/tsens: Add support for ipq8064-tsens
Add support for tsens present in ipq806x SoCs based on generic msm8960
tsens driver.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-9-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index 83e01cb..4c7ebd1 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -968,6 +968,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume);
static const struct of_device_id tsens_table[] = {
{
+ .compatible = "qcom,ipq8064-tsens",
+ .data = &data_8960,
+ }, {
.compatible = "qcom,mdm9607-tsens",
.data = &data_9607,
}, {
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal PATCH v15 9/9] dt-bindings: thermal: tsens: Document ipq8064 bindings
2021-04-20 18:33 [thermal PATCH v15 0/9] Add support for ipq8064 tsens Ansuel Smith
` (7 preceding siblings ...)
2021-04-20 18:33 ` [thermal PATCH v15 8/9] drivers: thermal: tsens: Add support for ipq8064-tsens Ansuel Smith
@ 2021-04-20 18:33 ` Ansuel Smith
2021-04-27 19:44 ` [thermal: thermal/next] " thermal-bot for Ansuel Smith
8 siblings, 1 reply; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:33 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Ansuel Smith, Rob Herring, Andy Gross, Bjorn Andersson,
Amit Kucheria, Zhang Rui, Rob Herring, linux-arm-msm, linux-pm,
devicetree, linux-kernel
Document the use of bindings used for msm8960 tsens based devices.
msm8960 use the same gcc regs and is set as a child of the qcom gcc.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/thermal/qcom-tsens.yaml | 56 ++++++++++++++++---
1 file changed, 48 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index d7be931b4..2e762596b 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -19,6 +19,11 @@ description: |
properties:
compatible:
oneOf:
+ - description: msm9860 TSENS based
+ items:
+ - enum:
+ - qcom,ipq8064-tsens
+
- description: v0.1 of TSENS
items:
- enum:
@@ -70,7 +75,9 @@ properties:
maxItems: 2
items:
- const: calib
- - const: calib_sel
+ - enum:
+ - calib_backup
+ - calib_sel
"#qcom,sensors":
description:
@@ -85,12 +92,20 @@ properties:
Number of cells required to uniquely identify the thermal sensors. Since
we have multiple sensors this is set to 1
+required:
+ - compatible
+ - interrupts
+ - interrupt-names
+ - "#thermal-sensor-cells"
+ - "#qcom,sensors"
+
allOf:
- if:
properties:
compatible:
contains:
enum:
+ - qcom,ipq8064-tsens
- qcom,msm8916-tsens
- qcom,msm8974-tsens
- qcom,msm8976-tsens
@@ -111,17 +126,42 @@ allOf:
interrupt-names:
minItems: 2
-required:
- - compatible
- - reg
- - "#qcom,sensors"
- - interrupts
- - interrupt-names
- - "#thermal-sensor-cells"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,tsens-v0_1
+ - qcom,tsens-v1
+ - qcom,tsens-v2
+
+ then:
+ required:
+ - reg
additionalProperties: false
examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example msm9860 based SoC (ipq8064):
+ gcc: clock-controller {
+
+ /* ... */
+
+ tsens: thermal-sensor {
+ compatible = "qcom,ipq8064-tsens";
+
+ nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
+ nvmem-cell-names = "calib", "calib_backup";
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
+
+ #qcom,sensors = <11>;
+ #thermal-sensor-cells = <1>;
+ };
+ };
+
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
// Example 1 (legacy: for pre v1 IP):
--
2.30.2
^ permalink raw reply related [flat|nested] 38+ messages in thread* [thermal: thermal/next] dt-bindings: thermal: tsens: Document ipq8064 bindings
2021-04-20 18:33 ` [thermal PATCH v15 9/9] dt-bindings: thermal: tsens: Document ipq8064 bindings Ansuel Smith
@ 2021-04-27 19:44 ` thermal-bot for Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-27 19:44 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Rob Herring, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: 26b2f03d2adf43d0dc9aeeb3fff54dcc9fcdb1f4
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//26b2f03d2adf43d0dc9aeeb3fff54dcc9fcdb1f4
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Tue, 20 Apr 2021 20:33:43 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 22 Apr 2021 14:10:24 +02:00
dt-bindings: thermal: tsens: Document ipq8064 bindings
Document the use of bindings used for msm8960 tsens based devices.
msm8960 use the same gcc regs and is set as a child of the qcom gcc.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210420183343.2272-10-ansuelsmth@gmail.com
---
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 56 ++++++-
1 file changed, 48 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index fbd03cd..0242fd9 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -19,6 +19,11 @@ description: |
properties:
compatible:
oneOf:
+ - description: msm9860 TSENS based
+ items:
+ - enum:
+ - qcom,ipq8064-tsens
+
- description: v0.1 of TSENS
items:
- enum:
@@ -75,7 +80,9 @@ properties:
maxItems: 2
items:
- const: calib
- - const: calib_sel
+ - enum:
+ - calib_backup
+ - calib_sel
"#qcom,sensors":
description:
@@ -90,12 +97,20 @@ properties:
Number of cells required to uniquely identify the thermal sensors. Since
we have multiple sensors this is set to 1
+required:
+ - compatible
+ - interrupts
+ - interrupt-names
+ - "#thermal-sensor-cells"
+ - "#qcom,sensors"
+
allOf:
- if:
properties:
compatible:
contains:
enum:
+ - qcom,ipq8064-tsens
- qcom,mdm9607-tsens
- qcom,msm8916-tsens
- qcom,msm8974-tsens
@@ -117,19 +132,44 @@ allOf:
interrupt-names:
minItems: 2
-required:
- - compatible
- - reg
- - "#qcom,sensors"
- - interrupts
- - interrupt-names
- - "#thermal-sensor-cells"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,tsens-v0_1
+ - qcom,tsens-v1
+ - qcom,tsens-v2
+
+ then:
+ required:
+ - reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example msm9860 based SoC (ipq8064):
+ gcc: clock-controller {
+
+ /* ... */
+
+ tsens: thermal-sensor {
+ compatible = "qcom,ipq8064-tsens";
+
+ nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
+ nvmem-cell-names = "calib", "calib_backup";
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
+
+ #qcom,sensors = <11>;
+ #thermal-sensor-cells = <1>;
+ };
+ };
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
// Example 1 (legacy: for pre v1 IP):
tsens1: thermal-sensor@900000 {
compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-04 14:48 [PATCH v14 3/9] drivers: thermal: tsens: Convert msm8960 to reg_field Ansuel Smith
@ 2021-04-15 12:03 ` thermal-bot for Ansuel Smith
2021-04-15 18:03 ` kernel test robot
2021-04-15 20:27 ` kernel test robot
0 siblings, 2 replies; 38+ messages in thread
From: thermal-bot for Ansuel Smith @ 2021-04-15 12:03 UTC (permalink / raw)
To: linux-pm; +Cc: Ansuel Smith, Thara Gopinath, Daniel Lezcano, rui.zhang, amitk
The following commit has been merged into the thermal/next branch of thermal:
Commit-ID: 0eb973a50ccce674d157c2256156424dedb57a22
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git//0eb973a50ccce674d157c2256156424dedb57a22
Author: Ansuel Smith <ansuelsmth@gmail.com>
AuthorDate: Sun, 04 Apr 2021 16:48:17 +02:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Thu, 15 Apr 2021 13:21:42 +02:00
thermal/drivers/tsens: Convert msm8960 to reg_field
Convert msm9860 driver to reg_field to use the init_common
function.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210404144823.31867-4-ansuelsmth@gmail.com
---
drivers/thermal/qcom/tsens-8960.c | 80 +++++++++++++++++++++++++++++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
index 2a28a5a..3f4fc1f 100644
--- a/drivers/thermal/qcom/tsens-8960.c
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -51,11 +51,22 @@
#define MIN_LIMIT_TH 0x0
#define MAX_LIMIT_TH 0xff
-#define S0_STATUS_ADDR 0x3628
#define INT_STATUS_ADDR 0x363c
#define TRDY_MASK BIT(7)
#define TIMEOUT_US 100
+#define S0_STATUS_OFF 0x3628
+#define S1_STATUS_OFF 0x362c
+#define S2_STATUS_OFF 0x3630
+#define S3_STATUS_OFF 0x3634
+#define S4_STATUS_OFF 0x3638
+#define S5_STATUS_OFF 0x3664 /* Sensors 5-10 found on apq8064/msm8960 */
+#define S6_STATUS_OFF 0x3668
+#define S7_STATUS_OFF 0x366c
+#define S8_STATUS_OFF 0x3670
+#define S9_STATUS_OFF 0x3674
+#define S10_STATUS_OFF 0x3678
+
static int suspend_8960(struct tsens_priv *priv)
{
int ret;
@@ -269,6 +280,71 @@ static int get_temp_8960(const struct tsens_sensor *s, int *temp)
return -ETIMEDOUT;
}
+static struct tsens_features tsens_8960_feat = {
+ .ver_major = VER_0,
+ .crit_int = 0,
+ .adc = 1,
+ .srot_split = 0,
+ .max_sensors = 11,
+};
+
+static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
+ /* ----- SROT ------ */
+ /* No VERSION information */
+
+ /* CNTL */
+ [TSENS_EN] = REG_FIELD(CNTL_ADDR, 0, 0),
+ [TSENS_SW_RST] = REG_FIELD(CNTL_ADDR, 1, 1),
+ /* 8960 has 5 sensors, 8660 has 11, we only handle 5 */
+ [SENSOR_EN] = REG_FIELD(CNTL_ADDR, 3, 7),
+
+ /* ----- TM ------ */
+ /* INTERRUPT ENABLE */
+ /* NO INTERRUPT ENABLE */
+
+ /* Single UPPER/LOWER TEMPERATURE THRESHOLD for all sensors */
+ [LOW_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 0, 7),
+ [UP_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 8, 15),
+ /* MIN_THRESH_0 and MAX_THRESH_0 are not present in the regfield
+ * Recycle CRIT_THRESH_0 and 1 to set the required regs to hardcoded temp
+ * MIN_THRESH_0 -> CRIT_THRESH_1
+ * MAX_THRESH_0 -> CRIT_THRESH_0
+ */
+ [CRIT_THRESH_1] = REG_FIELD(THRESHOLD_ADDR, 16, 23),
+ [CRIT_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 24, 31),
+
+ /* UPPER/LOWER INTERRUPT [CLEAR/STATUS] */
+ /* 1 == clear, 0 == normal operation */
+ [LOW_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 9, 9),
+ [UP_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 10, 10),
+
+ /* NO CRITICAL INTERRUPT SUPPORT on 8960 */
+
+ /* Sn_STATUS */
+ [LAST_TEMP_0] = REG_FIELD(S0_STATUS_OFF, 0, 7),
+ [LAST_TEMP_1] = REG_FIELD(S1_STATUS_OFF, 0, 7),
+ [LAST_TEMP_2] = REG_FIELD(S2_STATUS_OFF, 0, 7),
+ [LAST_TEMP_3] = REG_FIELD(S3_STATUS_OFF, 0, 7),
+ [LAST_TEMP_4] = REG_FIELD(S4_STATUS_OFF, 0, 7),
+ [LAST_TEMP_5] = REG_FIELD(S5_STATUS_OFF, 0, 7),
+ [LAST_TEMP_6] = REG_FIELD(S6_STATUS_OFF, 0, 7),
+ [LAST_TEMP_7] = REG_FIELD(S7_STATUS_OFF, 0, 7),
+ [LAST_TEMP_8] = REG_FIELD(S8_STATUS_OFF, 0, 7),
+ [LAST_TEMP_9] = REG_FIELD(S9_STATUS_OFF, 0, 7),
+ [LAST_TEMP_10] = REG_FIELD(S10_STATUS_OFF, 0, 7),
+
+ /* No VALID field on 8960 */
+ /* TSENS_INT_STATUS bits: 1 == threshold violated */
+ [MIN_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 0, 0),
+ [LOWER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 1, 1),
+ [UPPER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 2, 2),
+ /* No CRITICAL field on 8960 */
+ [MAX_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 3, 3),
+
+ /* TRDY: 1=ready, 0=in progress */
+ [TRDY] = REG_FIELD(INT_STATUS_ADDR, 7, 7),
+};
+
static const struct tsens_ops ops_8960 = {
.init = init_8960,
.calibrate = calibrate_8960,
@@ -282,4 +358,6 @@ static const struct tsens_ops ops_8960 = {
struct tsens_plat_data data_8960 = {
.num_sensors = 11,
.ops = &ops_8960,
+ .feat = &tsens_8960_feat,
+ .fields = tsens_8960_regfields,
};
^ permalink raw reply related [flat|nested] 38+ messages in thread* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-15 12:03 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
@ 2021-04-15 18:03 ` kernel test robot
2021-04-15 20:27 ` kernel test robot
1 sibling, 0 replies; 38+ messages in thread
From: kernel test robot @ 2021-04-15 18:03 UTC (permalink / raw)
To: thermal-bot for Ansuel Smith, linux-pm
Cc: kbuild-all, Ansuel Smith, Thara Gopinath, Daniel Lezcano,
rui.zhang, amitk
[-- Attachment #1: Type: text/plain, Size: 12288 bytes --]
Hi thermal-bot,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc7]
[cannot apply to thermal/next next-20210415]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
config: arm-randconfig-r015-20210415 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
| ^~~~~~~~~~~~~~
| INT_STATUS_ADDR
drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
drivers/thermal/qcom/tsens-8960.c: At top level:
>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
284 | .ver_major = VER_0,
| ^~~~~
| VER_0_1
vim +193 drivers/thermal/qcom/tsens-8960.c
20d4fd84bf524ad Rajendra Nayak 2016-05-05 175
69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 180
69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL);
69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 184
20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /*
20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous
20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more
20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e
20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers.
20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */
69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5)
69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40;
69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 196
20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 201
69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 212
69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 217
20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN;
69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 222
20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 225
69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 230
69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors;
69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 233
69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data))
69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 239
20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i];
20d4fd84bf524ad Rajendra Nayak 2016-05-05 242
6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data);
6b8249abb093551 Srinivas Kandagatla 2019-08-23 244
20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 247
20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */
20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 252
20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 255
20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 258
e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy;
8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 265
20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do {
69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue;
69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout));
20d4fd84bf524ad Rajendra Nayak 2016-05-05 279
20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 282
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = {
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 };
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 36618 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-15 18:03 ` kernel test robot
0 siblings, 0 replies; 38+ messages in thread
From: kernel test robot @ 2021-04-15 18:03 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 12455 bytes --]
Hi thermal-bot,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc7]
[cannot apply to thermal/next next-20210415]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
config: arm-randconfig-r015-20210415 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
| ^~~~~~~~~~~~~~
| INT_STATUS_ADDR
drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
drivers/thermal/qcom/tsens-8960.c: At top level:
>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
284 | .ver_major = VER_0,
| ^~~~~
| VER_0_1
vim +193 drivers/thermal/qcom/tsens-8960.c
20d4fd84bf524ad Rajendra Nayak 2016-05-05 175
69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 180
69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL);
69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 184
20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /*
20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous
20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more
20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e
20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers.
20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */
69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5)
69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40;
69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 196
20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 201
69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 212
69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 217
20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN;
69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 222
20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 225
69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 230
69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors;
69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 233
69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data))
69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 239
20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i];
20d4fd84bf524ad Rajendra Nayak 2016-05-05 242
6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data);
6b8249abb093551 Srinivas Kandagatla 2019-08-23 244
20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 247
20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */
20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 252
20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 255
20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 258
e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy;
8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 265
20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do {
69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue;
69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout));
20d4fd84bf524ad Rajendra Nayak 2016-05-05 279
20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 282
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = {
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 };
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 36618 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-15 18:03 ` kernel test robot
@ 2021-04-15 18:52 ` Ansuel Smith
-1 siblings, 0 replies; 38+ messages in thread
From: Ansuel Smith @ 2021-04-15 18:52 UTC (permalink / raw)
To: kernel test robot
Cc: thermal-bot for Ansuel Smith,
open list:QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096, kbuild-all,
Thara Gopinath, Daniel Lezcano, Zhang Rui, Amit Kucheria
>
> Hi thermal-bot,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on linus/master]
> [also build test ERROR on v5.12-rc7]
> [cannot apply to thermal/next next-20210415]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
> config: arm-randconfig-r015-20210415 (attached as .config)
> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
> git remote add linux-review https://github.com/0day-ci/linux
> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All errors (new ones prefixed by >>):
>
> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
> >> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
> | ^~~~~~~~~~~~~~
> | INT_STATUS_ADDR
> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
> drivers/thermal/qcom/tsens-8960.c: At top level:
> >> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
> 284 | .ver_major = VER_0,
> | ^~~~~
> | VER_0_1
>
>
> vim +193 drivers/thermal/qcom/tsens-8960.c
>
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 175
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 180
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL);
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 184
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /*
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers.
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5)
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 196
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 201
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 212
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 217
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 222
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 225
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 230
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 233
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib");
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data))
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup");
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data))
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 239
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i];
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 242
> 6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data);
> 6b8249abb093551 Srinivas Kandagatla 2019-08-23 244
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 247
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 252
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 255
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 258
> e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy;
> 8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 265
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do {
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK))
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout));
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 279
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 282
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = {
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 };
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
What happened here? This doesn't seem right.
^ permalink raw reply [flat|nested] 38+ messages in thread* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-15 18:52 ` Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: Ansuel Smith @ 2021-04-15 18:52 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 13124 bytes --]
>
> Hi thermal-bot,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on linus/master]
> [also build test ERROR on v5.12-rc7]
> [cannot apply to thermal/next next-20210415]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
> config: arm-randconfig-r015-20210415 (attached as .config)
> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
> git remote add linux-review https://github.com/0day-ci/linux
> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All errors (new ones prefixed by >>):
>
> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
> >> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
> | ^~~~~~~~~~~~~~
> | INT_STATUS_ADDR
> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
> drivers/thermal/qcom/tsens-8960.c: At top level:
> >> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
> 284 | .ver_major = VER_0,
> | ^~~~~
> | VER_0_1
>
>
> vim +193 drivers/thermal/qcom/tsens-8960.c
>
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 175
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 180
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL);
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 184
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /*
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers.
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5)
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 196
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 201
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 212
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 217
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 222
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 225
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 230
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 233
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib");
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data))
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup");
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data))
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 239
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i];
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 242
> 6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data);
> 6b8249abb093551 Srinivas Kandagatla 2019-08-23 244
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 247
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 252
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 255
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 258
> e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 {
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy;
> 8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 265
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do {
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK))
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue;
> 69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret)
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s);
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout));
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 279
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT;
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 }
> 20d4fd84bf524ad Rajendra Nayak 2016-05-05 282
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = {
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11,
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 };
> efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
What happened here? This doesn't seem right.
^ permalink raw reply [flat|nested] 38+ messages in thread* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-15 18:52 ` Ansuel Smith
@ 2021-04-19 8:58 ` Daniel Lezcano
-1 siblings, 0 replies; 38+ messages in thread
From: Daniel Lezcano @ 2021-04-19 8:58 UTC (permalink / raw)
To: Ansuel Smith, kernel test robot
Cc: thermal-bot for Ansuel Smith,
open list:QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096, kbuild-all,
Thara Gopinath, Zhang Rui, Amit Kucheria
On 15/04/2021 20:52, Ansuel Smith wrote:
>>
>> Hi thermal-bot,
>>
>> Thank you for the patch! Yet something to improve:
>>
>> [auto build test ERROR on linus/master]
>> [also build test ERROR on v5.12-rc7]
>> [cannot apply to thermal/next next-20210415]
>> [If your patch is applied to the wrong git tree, kindly drop us a note.
>> And when submitting patch, we suggest to use '--base' as documented in
>> https://git-scm.com/docs/git-format-patch]
>>
>> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
>> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
>> config: arm-randconfig-r015-20210415 (attached as .config)
>> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
>> reproduce (this is a W=1 build):
>> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
>> chmod +x ~/bin/make.cross
>> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
>> git remote add linux-review https://github.com/0day-ci/linux
>> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
>> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
>> # save the attached .config to linux build tree
>> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
>>
>> If you fix the issue, kindly add following tag as appropriate
>> Reported-by: kernel test robot <lkp@intel.com>
>>
>> All errors (new ones prefixed by >>):
>>
>> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
>>>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
>> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
>> | ^~~~~~~~~~~~~~
>> | INT_STATUS_ADDR
>> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/thermal/qcom/tsens-8960.c: At top level:
>>>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
>> 284 | .ver_major = VER_0,
>> | ^~~~~
>> | VER_0_1
>>
>>
>> vim +193 drivers/thermal/qcom/tsens-8960.c
[ ... ]
> What happened here? This doesn't seem right.
Yes, it is. It means the series is not git bisect safe.
Please fix it.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-19 8:58 ` Daniel Lezcano
0 siblings, 0 replies; 38+ messages in thread
From: Daniel Lezcano @ 2021-04-19 8:58 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 2975 bytes --]
On 15/04/2021 20:52, Ansuel Smith wrote:
>>
>> Hi thermal-bot,
>>
>> Thank you for the patch! Yet something to improve:
>>
>> [auto build test ERROR on linus/master]
>> [also build test ERROR on v5.12-rc7]
>> [cannot apply to thermal/next next-20210415]
>> [If your patch is applied to the wrong git tree, kindly drop us a note.
>> And when submitting patch, we suggest to use '--base' as documented in
>> https://git-scm.com/docs/git-format-patch]
>>
>> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
>> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
>> config: arm-randconfig-r015-20210415 (attached as .config)
>> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
>> reproduce (this is a W=1 build):
>> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
>> chmod +x ~/bin/make.cross
>> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
>> git remote add linux-review https://github.com/0day-ci/linux
>> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
>> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
>> # save the attached .config to linux build tree
>> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
>>
>> If you fix the issue, kindly add following tag as appropriate
>> Reported-by: kernel test robot <lkp@intel.com>
>>
>> All errors (new ones prefixed by >>):
>>
>> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
>>>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
>> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
>> | ^~~~~~~~~~~~~~
>> | INT_STATUS_ADDR
>> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/thermal/qcom/tsens-8960.c: At top level:
>>>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
>> 284 | .ver_major = VER_0,
>> | ^~~~~
>> | VER_0_1
>>
>>
>> vim +193 drivers/thermal/qcom/tsens-8960.c
[ ... ]
> What happened here? This doesn't seem right.
Yes, it is. It means the series is not git bisect safe.
Please fix it.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-19 8:58 ` Daniel Lezcano
@ 2021-04-19 12:08 ` Ansuel Smith
-1 siblings, 0 replies; 38+ messages in thread
From: Ansuel Smith @ 2021-04-19 12:08 UTC (permalink / raw)
To: Daniel Lezcano
Cc: kernel test robot, thermal-bot for Ansuel Smith,
open list:QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096, kbuild-all,
Thara Gopinath, Zhang Rui, Amit Kucheria
>
> On 15/04/2021 20:52, Ansuel Smith wrote:
> >>
> >> Hi thermal-bot,
> >>
> >> Thank you for the patch! Yet something to improve:
> >>
> >> [auto build test ERROR on linus/master]
> >> [also build test ERROR on v5.12-rc7]
> >> [cannot apply to thermal/next next-20210415]
> >> [If your patch is applied to the wrong git tree, kindly drop us a note.
> >> And when submitting patch, we suggest to use '--base' as documented in
> >> https://git-scm.com/docs/git-format-patch]
> >>
> >> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> >> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
> >> config: arm-randconfig-r015-20210415 (attached as .config)
> >> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
> >> reproduce (this is a W=1 build):
> >> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> >> chmod +x ~/bin/make.cross
> >> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
> >> git remote add linux-review https://github.com/0day-ci/linux
> >> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> >> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
> >> # save the attached .config to linux build tree
> >> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
> >>
> >> If you fix the issue, kindly add following tag as appropriate
> >> Reported-by: kernel test robot <lkp@intel.com>
> >>
> >> All errors (new ones prefixed by >>):
> >>
> >> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
> >>>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
> >> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
> >> | ^~~~~~~~~~~~~~
> >> | INT_STATUS_ADDR
> >> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
> >> drivers/thermal/qcom/tsens-8960.c: At top level:
> >>>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
> >> 284 | .ver_major = VER_0,
> >> | ^~~~~
> >> | VER_0_1
> >>
> >>
> >> vim +193 drivers/thermal/qcom/tsens-8960.c
>
> [ ... ]
>
> > What happened here? This doesn't seem right.
>
> Yes, it is. It means the series is not git bisect safe.
>
> Please fix it.
>
>
I'm a bit confused. Should I send just a patch to fix this or I
need to send the series again rebased with the new changes?
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-19 12:08 ` Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: Ansuel Smith @ 2021-04-19 12:08 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3225 bytes --]
>
> On 15/04/2021 20:52, Ansuel Smith wrote:
> >>
> >> Hi thermal-bot,
> >>
> >> Thank you for the patch! Yet something to improve:
> >>
> >> [auto build test ERROR on linus/master]
> >> [also build test ERROR on v5.12-rc7]
> >> [cannot apply to thermal/next next-20210415]
> >> [If your patch is applied to the wrong git tree, kindly drop us a note.
> >> And when submitting patch, we suggest to use '--base' as documented in
> >> https://git-scm.com/docs/git-format-patch]
> >>
> >> url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> >> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
> >> config: arm-randconfig-r015-20210415 (attached as .config)
> >> compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
> >> reproduce (this is a W=1 build):
> >> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> >> chmod +x ~/bin/make.cross
> >> # https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
> >> git remote add linux-review https://github.com/0day-ci/linux
> >> git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
> >> git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
> >> # save the attached .config to linux build tree
> >> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=arm
> >>
> >> If you fix the issue, kindly add following tag as appropriate
> >> Reported-by: kernel test robot <lkp@intel.com>
> >>
> >> All errors (new ones prefixed by >>):
> >>
> >> drivers/thermal/qcom/tsens-8960.c: In function 'init_8960':
> >>>> drivers/thermal/qcom/tsens-8960.c:193:29: error: 'S0_STATUS_ADDR' undeclared (first use in this function); did you mean 'INT_STATUS_ADDR'?
> >> 193 | priv->sensor[i].status = S0_STATUS_ADDR + 40;
> >> | ^~~~~~~~~~~~~~
> >> | INT_STATUS_ADDR
> >> drivers/thermal/qcom/tsens-8960.c:193:29: note: each undeclared identifier is reported only once for each function it appears in
> >> drivers/thermal/qcom/tsens-8960.c: At top level:
> >>>> drivers/thermal/qcom/tsens-8960.c:284:15: error: 'VER_0' undeclared here (not in a function); did you mean 'VER_0_1'?
> >> 284 | .ver_major = VER_0,
> >> | ^~~~~
> >> | VER_0_1
> >>
> >>
> >> vim +193 drivers/thermal/qcom/tsens-8960.c
>
> [ ... ]
>
> > What happened here? This doesn't seem right.
>
> Yes, it is. It means the series is not git bisect safe.
>
> Please fix it.
>
>
I'm a bit confused. Should I send just a patch to fix this or I
need to send the series again rebased with the new changes?
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-19 12:08 ` Ansuel Smith
@ 2021-04-20 7:16 ` Daniel Lezcano
-1 siblings, 0 replies; 38+ messages in thread
From: Daniel Lezcano @ 2021-04-20 7:16 UTC (permalink / raw)
To: Ansuel Smith
Cc: kernel test robot, thermal-bot for Ansuel Smith,
open list:QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096, kbuild-all,
Thara Gopinath, Zhang Rui, Amit Kucheria
On 19/04/2021 14:08, Ansuel Smith wrote:
[ ... ]
>>>> vim +193 drivers/thermal/qcom/tsens-8960.c
>>
>> [ ... ]
>>
>>> What happened here? This doesn't seem right.
>>
>> Yes, it is. It means the series is not git bisect safe.
>>
>> Please fix it.
>>
>>
>
> I'm a bit confused. Should I send just a patch to fix this or I
> need to send the series again rebased with the new changes?
The latter, I've dropped your series from the thermal/next branch
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-20 7:16 ` Daniel Lezcano
0 siblings, 0 replies; 38+ messages in thread
From: Daniel Lezcano @ 2021-04-20 7:16 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 711 bytes --]
On 19/04/2021 14:08, Ansuel Smith wrote:
[ ... ]
>>>> vim +193 drivers/thermal/qcom/tsens-8960.c
>>
>> [ ... ]
>>
>>> What happened here? This doesn't seem right.
>>
>> Yes, it is. It means the series is not git bisect safe.
>>
>> Please fix it.
>>
>>
>
> I'm a bit confused. Should I send just a patch to fix this or I
> need to send the series again rebased with the new changes?
The latter, I've dropped your series from the thermal/next branch
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-20 7:16 ` Daniel Lezcano
@ 2021-04-20 11:04 ` Ansuel Smith
-1 siblings, 0 replies; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 11:04 UTC (permalink / raw)
To: Daniel Lezcano
Cc: kernel test robot, thermal-bot for Ansuel Smith,
open list:QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096, kbuild-all,
Thara Gopinath, Zhang Rui, Amit Kucheria
>
> On 19/04/2021 14:08, Ansuel Smith wrote:
>
> [ ... ]
>
> >>>> vim +193 drivers/thermal/qcom/tsens-8960.c
> >>
> >> [ ... ]
> >>
> >>> What happened here? This doesn't seem right.
> >>
> >> Yes, it is. It means the series is not git bisect safe.
> >>
> >> Please fix it.
> >>
> >>
> >
> > I'm a bit confused. Should I send just a patch to fix this or I
> > need to send the series again rebased with the new changes?
>
> The latter, I've dropped your series from the thermal/next branch
>
Ok I will resend the series. I notice it has been applied to linux-next,
will that be a problem?
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-20 11:04 ` Ansuel Smith
0 siblings, 0 replies; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 11:04 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 865 bytes --]
>
> On 19/04/2021 14:08, Ansuel Smith wrote:
>
> [ ... ]
>
> >>>> vim +193 drivers/thermal/qcom/tsens-8960.c
> >>
> >> [ ... ]
> >>
> >>> What happened here? This doesn't seem right.
> >>
> >> Yes, it is. It means the series is not git bisect safe.
> >>
> >> Please fix it.
> >>
> >>
> >
> > I'm a bit confused. Should I send just a patch to fix this or I
> > need to send the series again rebased with the new changes?
>
> The latter, I've dropped your series from the thermal/next branch
>
Ok I will resend the series. I notice it has been applied to linux-next,
will that be a problem?
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-20 11:04 ` Ansuel Smith
@ 2021-04-20 11:32 ` Daniel Lezcano
-1 siblings, 0 replies; 38+ messages in thread
From: Daniel Lezcano @ 2021-04-20 11:32 UTC (permalink / raw)
To: Ansuel Smith
Cc: kernel test robot, thermal-bot for Ansuel Smith,
open list:QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096, kbuild-all,
Thara Gopinath, Zhang Rui, Amit Kucheria
On 20/04/2021 13:04, Ansuel Smith wrote:
>>
>> On 19/04/2021 14:08, Ansuel Smith wrote:
>>
>> [ ... ]
>>
>>>>>> vim +193 drivers/thermal/qcom/tsens-8960.c
>>>>
>>>> [ ... ]
>>>>
>>>>> What happened here? This doesn't seem right.
>>>>
>>>> Yes, it is. It means the series is not git bisect safe.
>>>>
>>>> Please fix it.
>>>>
>>>>
>>>
>>> I'm a bit confused. Should I send just a patch to fix this or I
>>> need to send the series again rebased with the new changes?
>>
>> The latter, I've dropped your series from the thermal/next branch
>>
>
> Ok I will resend the series. I notice it has been applied to linux-next,
> will that be a problem?
No, it is fine. linux-next uses thermal/linux-next and it is allowed to
rebase the branch.
I've just updated it with your v14 series dropped.
>> --
>> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>>
>> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
>> <http://twitter.com/#!/linaroorg> Twitter |
>> <http://www.linaro.org/linaro-blog/> Blog
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-20 11:32 ` Daniel Lezcano
0 siblings, 0 replies; 38+ messages in thread
From: Daniel Lezcano @ 2021-04-20 11:32 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1316 bytes --]
On 20/04/2021 13:04, Ansuel Smith wrote:
>>
>> On 19/04/2021 14:08, Ansuel Smith wrote:
>>
>> [ ... ]
>>
>>>>>> vim +193 drivers/thermal/qcom/tsens-8960.c
>>>>
>>>> [ ... ]
>>>>
>>>>> What happened here? This doesn't seem right.
>>>>
>>>> Yes, it is. It means the series is not git bisect safe.
>>>>
>>>> Please fix it.
>>>>
>>>>
>>>
>>> I'm a bit confused. Should I send just a patch to fix this or I
>>> need to send the series again rebased with the new changes?
>>
>> The latter, I've dropped your series from the thermal/next branch
>>
>
> Ok I will resend the series. I notice it has been applied to linux-next,
> will that be a problem?
No, it is fine. linux-next uses thermal/linux-next and it is allowed to
rebase the branch.
I've just updated it with your v14 series dropped.
>> --
>> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>>
>> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
>> <http://twitter.com/#!/linaroorg> Twitter |
>> <http://www.linaro.org/linaro-blog/> Blog
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-20 11:32 ` Daniel Lezcano
@ 2021-04-20 18:36 ` Ansuel Smith
-1 siblings, 0 replies; 38+ messages in thread
From: Ansuel Smith @ 2021-04-20 18:36 UTC (permalink / raw)
To: Daniel Lezcano
Cc: kernel test robot, thermal-bot for Ansuel Smith,
open list:QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096, kbuild-all,
Thara Gopinath, Zhang Rui, Amit Kucheria
>
> On 20/04/2021 13:04, Ansuel Smith wrote:
> >>
> >> On 19/04/2021 14:08, Ansuel Smith wrote:
> >>
> >> [ ... ]
> >>
> >>>>>> vim +193 drivers/thermal/qcom/tsens-8960.c
> >>>>
> >>>> [ ... ]
> >>>>
> >>>>> What happened here? This doesn't seem right.
> >>>>
> >>>> Yes, it is. It means the series is not git bisect safe.
> >>>>
> >>>> Please fix it.
> >>>>
> >>>>
> >>>
> >>> I'm a bit confused. Should I send just a patch to fix this or I
> >>> need to send the series again rebased with the new changes?
> >>
> >> The latter, I've dropped your series from the thermal/next branch
> >>
> >
> > Ok I will resend the series. I notice it has been applied to linux-next,
> > will that be a problem?
>
> No, it is fine. linux-next uses thermal/linux-next and it is allowed to
> rebase the branch.
>
> I've just updated it with your v14 series dropped.
>
I have just sent v15 series hoping it's more bisect friendly. Hope it's
good now and sorry for the mess.
>
> >> --
> >> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
> >>
> >> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> >> <http://twitter.com/#!/linaroorg> Twitter |
> >> <http://www.linaro.org/linaro-blog/> Blog
>
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
2021-04-15 12:03 ` [thermal: thermal/next] thermal/drivers/tsens: " thermal-bot for Ansuel Smith
@ 2021-04-15 20:27 ` kernel test robot
2021-04-15 20:27 ` kernel test robot
1 sibling, 0 replies; 38+ messages in thread
From: kernel test robot @ 2021-04-15 20:27 UTC (permalink / raw)
To: thermal-bot for Ansuel Smith, linux-pm
Cc: kbuild-all, clang-built-linux, Ansuel Smith, Thara Gopinath,
Daniel Lezcano, rui.zhang, amitk
[-- Attachment #1: Type: text/plain, Size: 12121 bytes --]
Hi thermal-bot,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc7]
[cannot apply to thermal/next next-20210415]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
config: powerpc-randconfig-r022-20210415 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 6a18cc23efad410db48a3ccfc233d215de7d4cb9)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/thermal/qcom/tsens-8960.c:193:29: error: use of undeclared identifier 'S0_STATUS_ADDR'
priv->sensor[i].status = S0_STATUS_ADDR + 40;
^
>> drivers/thermal/qcom/tsens-8960.c:284:15: error: use of undeclared identifier 'VER_0'
.ver_major = VER_0,
^
2 errors generated.
vim +/S0_STATUS_ADDR +193 drivers/thermal/qcom/tsens-8960.c
20d4fd84bf524ad Rajendra Nayak 2016-05-05 175
69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 180
69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL);
69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 184
20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /*
20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous
20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more
20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e
20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers.
20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */
69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5)
69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40;
69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 196
20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 201
69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 212
69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 217
20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN;
69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 222
20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 225
69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 230
69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors;
69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 233
69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data))
69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 239
20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i];
20d4fd84bf524ad Rajendra Nayak 2016-05-05 242
6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data);
6b8249abb093551 Srinivas Kandagatla 2019-08-23 244
20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 247
20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */
20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 252
20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 255
20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 258
e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy;
8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 265
20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do {
69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue;
69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout));
20d4fd84bf524ad Rajendra Nayak 2016-05-05 279
20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 282
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = {
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 };
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 41268 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* Re: [thermal: thermal/next] thermal/drivers/tsens: Convert msm8960 to reg_field
@ 2021-04-15 20:27 ` kernel test robot
0 siblings, 0 replies; 38+ messages in thread
From: kernel test robot @ 2021-04-15 20:27 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 12286 bytes --]
Hi thermal-bot,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc7]
[cannot apply to thermal/next next-20210415]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7f75285ca572eaabc028cf78c6ab5473d0d160be
config: powerpc-randconfig-r022-20210415 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 6a18cc23efad410db48a3ccfc233d215de7d4cb9)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://github.com/0day-ci/linux/commit/efea0f0570b6b581bdb2fad978a35fd1a521385b
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review thermal-bot-for-Ansuel-Smith/thermal-drivers-tsens-Convert-msm8960-to-reg_field/20210415-200542
git checkout efea0f0570b6b581bdb2fad978a35fd1a521385b
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/thermal/qcom/tsens-8960.c:193:29: error: use of undeclared identifier 'S0_STATUS_ADDR'
priv->sensor[i].status = S0_STATUS_ADDR + 40;
^
>> drivers/thermal/qcom/tsens-8960.c:284:15: error: use of undeclared identifier 'VER_0'
.ver_major = VER_0,
^
2 errors generated.
vim +/S0_STATUS_ADDR +193 drivers/thermal/qcom/tsens-8960.c
20d4fd84bf524ad Rajendra Nayak 2016-05-05 175
69b628ac71f07d6 Amit Kucheria 2019-03-20 176 static int init_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 177 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 178 int ret, i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 179 u32 reg_cntl;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 180
69b628ac71f07d6 Amit Kucheria 2019-03-20 181 priv->tm_map = dev_get_regmap(priv->dev, NULL);
69b628ac71f07d6 Amit Kucheria 2019-03-20 182 if (!priv->tm_map)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 183 return -ENODEV;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 184
20d4fd84bf524ad Rajendra Nayak 2016-05-05 185 /*
20d4fd84bf524ad Rajendra Nayak 2016-05-05 186 * The status registers for each sensor are discontiguous
20d4fd84bf524ad Rajendra Nayak 2016-05-05 187 * because some SoCs have 5 sensors while others have more
20d4fd84bf524ad Rajendra Nayak 2016-05-05 188 * but the control registers stay in the same place, i.e
20d4fd84bf524ad Rajendra Nayak 2016-05-05 189 * directly after the first 5 status registers.
20d4fd84bf524ad Rajendra Nayak 2016-05-05 190 */
69b628ac71f07d6 Amit Kucheria 2019-03-20 191 for (i = 0; i < priv->num_sensors; i++) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 192 if (i >= 5)
69b628ac71f07d6 Amit Kucheria 2019-03-20 @193 priv->sensor[i].status = S0_STATUS_ADDR + 40;
69b628ac71f07d6 Amit Kucheria 2019-03-20 194 priv->sensor[i].status += i * 4;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 195 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 196
20d4fd84bf524ad Rajendra Nayak 2016-05-05 197 reg_cntl = SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 198 ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 199 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 200 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 201
69b628ac71f07d6 Amit Kucheria 2019-03-20 202 if (priv->num_sensors > 1) {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 203 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 204 reg_cntl &= ~SW_RST;
69b628ac71f07d6 Amit Kucheria 2019-03-20 205 ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
20d4fd84bf524ad Rajendra Nayak 2016-05-05 206 CONFIG_MASK, CONFIG);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 207 } else {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 208 reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 209 reg_cntl &= ~CONFIG_MASK_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 210 reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 211 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 212
69b628ac71f07d6 Amit Kucheria 2019-03-20 213 reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
69b628ac71f07d6 Amit Kucheria 2019-03-20 214 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 215 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 216 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 217
20d4fd84bf524ad Rajendra Nayak 2016-05-05 218 reg_cntl |= EN;
69b628ac71f07d6 Amit Kucheria 2019-03-20 219 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 220 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 221 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 222
20d4fd84bf524ad Rajendra Nayak 2016-05-05 223 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 224 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 225
69b628ac71f07d6 Amit Kucheria 2019-03-20 226 static int calibrate_8960(struct tsens_priv *priv)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 227 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 228 int i;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 229 char *data;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 230
69b628ac71f07d6 Amit Kucheria 2019-03-20 231 ssize_t num_read = priv->num_sensors;
69b628ac71f07d6 Amit Kucheria 2019-03-20 232 struct tsens_sensor *s = priv->sensor;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 233
69b628ac71f07d6 Amit Kucheria 2019-03-20 234 data = qfprom_read(priv->dev, "calib");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 235 if (IS_ERR(data))
69b628ac71f07d6 Amit Kucheria 2019-03-20 236 data = qfprom_read(priv->dev, "calib_backup");
20d4fd84bf524ad Rajendra Nayak 2016-05-05 237 if (IS_ERR(data))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 238 return PTR_ERR(data);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 239
20d4fd84bf524ad Rajendra Nayak 2016-05-05 240 for (i = 0; i < num_read; i++, s++)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 241 s->offset = data[i];
20d4fd84bf524ad Rajendra Nayak 2016-05-05 242
6b8249abb093551 Srinivas Kandagatla 2019-08-23 243 kfree(data);
6b8249abb093551 Srinivas Kandagatla 2019-08-23 244
20d4fd84bf524ad Rajendra Nayak 2016-05-05 245 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 246 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 247
20d4fd84bf524ad Rajendra Nayak 2016-05-05 248 /* Temperature on y axis and ADC-code on x-axis */
20d4fd84bf524ad Rajendra Nayak 2016-05-05 249 static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 250 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 251 int slope, offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 252
20d4fd84bf524ad Rajendra Nayak 2016-05-05 253 slope = thermal_zone_get_slope(s->tzd);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 254 offset = CAL_MDEGC - slope * s->offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 255
20d4fd84bf524ad Rajendra Nayak 2016-05-05 256 return adc_code * slope + offset;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 257 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 258
e604bdd2a7e1087 Amit Kucheria 2020-03-12 259 static int get_temp_8960(const struct tsens_sensor *s, int *temp)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 260 {
20d4fd84bf524ad Rajendra Nayak 2016-05-05 261 int ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 262 u32 code, trdy;
8b71bce407b3f13 Amit Kucheria 2019-11-01 263 struct tsens_priv *priv = s->priv;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 264 unsigned long timeout;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 265
20d4fd84bf524ad Rajendra Nayak 2016-05-05 266 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 267 do {
69b628ac71f07d6 Amit Kucheria 2019-03-20 268 ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 269 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 270 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 271 if (!(trdy & TRDY_MASK))
20d4fd84bf524ad Rajendra Nayak 2016-05-05 272 continue;
69b628ac71f07d6 Amit Kucheria 2019-03-20 273 ret = regmap_read(priv->tm_map, s->status, &code);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 274 if (ret)
20d4fd84bf524ad Rajendra Nayak 2016-05-05 275 return ret;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 276 *temp = code_to_mdegC(code, s);
20d4fd84bf524ad Rajendra Nayak 2016-05-05 277 return 0;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 278 } while (time_before(jiffies, timeout));
20d4fd84bf524ad Rajendra Nayak 2016-05-05 279
20d4fd84bf524ad Rajendra Nayak 2016-05-05 280 return -ETIMEDOUT;
20d4fd84bf524ad Rajendra Nayak 2016-05-05 281 }
20d4fd84bf524ad Rajendra Nayak 2016-05-05 282
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 283 static struct tsens_features tsens_8960_feat = {
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 @284 .ver_major = VER_0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 285 .crit_int = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 286 .adc = 1,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 287 .srot_split = 0,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 288 .max_sensors = 11,
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 289 };
efea0f0570b6b58 thermal-bot for Ansuel Smith 2021-04-15 290
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
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