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From: Yong Wu <yong.wu@mediatek.com>
To: Ikjoon Jang <ikjn@chromium.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Tomasz Figa <tfiga@chromium.org>,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-mediatek@lists.infradead.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>
Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb
Date: Thu, 22 Jul 2021 14:38:22 +0800	[thread overview]
Message-ID: <1626935902.27875.7.camel@mhfsdcap03> (raw)
In-Reply-To: <CAATdQgAfo9oNR5=ogEottHajODngi1ahvKUnEOUczzjreYpPcQ@mail.gmail.com>

On Wed, 2021-07-21 at 21:40 +0800, Ikjoon Jang wrote:
> On Thu, Jul 15, 2021 at 8:23 PM Yong Wu <yong.wu@mediatek.com> wrote:
> >
> > To improve the performance, We add some initial setting for smi larbs.
> > there are two part:
> > 1), Each port has the special ostd(outstanding) value in each larb.
> > 2), Two general setting for each larb.
> >
> > In some SoC, this setting maybe changed dynamically for some special case
> > like 4K, and this initial setting is enough in mt8195.
> >
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
[...]
> >  struct mtk_smi {
> > @@ -213,12 +228,22 @@ static void mtk_smi_larb_config_port_mt8173(struct device *dev)
> >  static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >  {
> >         struct mtk_smi_larb *larb = dev_get_drvdata(dev);
> > -       u32 reg;
> > +       u32 reg, flags_general = larb->larb_gen->flags_general;
> > +       const u8 *larbostd = larb->larb_gen->ostd[larb->larbid];
> >         int i;
> >
> >         if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
> >                 return;
> >
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_THRT_EN))
> > +               writel_relaxed(SMI_LARB_THRT_EN, larb->base + SMI_LARB_CMD_THRT_CON);
> > +
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_SW_FLAG))
> > +               writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG);
> > +
> > +       for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++)
> > +               writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i));
> 
> All other mtk platform's larbs have the same format for SMI_LARB_OSTDL_PORTx()
> registers at the same offset? or is this unique feature for mt8195?

All the other Platform's larbs have the same format at the same offset.

> 
> > +
> >         for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
> >                 reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
> >                 reg |= F_MMU_EN;
> > @@ -227,6 +252,51 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >         }
> >  }
> >

[...]


WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Ikjoon Jang <ikjn@chromium.org>
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Robin Murphy <robin.murphy@arm.com>,
	open list <linux-kernel@vger.kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb
Date: Thu, 22 Jul 2021 14:38:22 +0800	[thread overview]
Message-ID: <1626935902.27875.7.camel@mhfsdcap03> (raw)
In-Reply-To: <CAATdQgAfo9oNR5=ogEottHajODngi1ahvKUnEOUczzjreYpPcQ@mail.gmail.com>

On Wed, 2021-07-21 at 21:40 +0800, Ikjoon Jang wrote:
> On Thu, Jul 15, 2021 at 8:23 PM Yong Wu <yong.wu@mediatek.com> wrote:
> >
> > To improve the performance, We add some initial setting for smi larbs.
> > there are two part:
> > 1), Each port has the special ostd(outstanding) value in each larb.
> > 2), Two general setting for each larb.
> >
> > In some SoC, this setting maybe changed dynamically for some special case
> > like 4K, and this initial setting is enough in mt8195.
> >
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
[...]
> >  struct mtk_smi {
> > @@ -213,12 +228,22 @@ static void mtk_smi_larb_config_port_mt8173(struct device *dev)
> >  static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >  {
> >         struct mtk_smi_larb *larb = dev_get_drvdata(dev);
> > -       u32 reg;
> > +       u32 reg, flags_general = larb->larb_gen->flags_general;
> > +       const u8 *larbostd = larb->larb_gen->ostd[larb->larbid];
> >         int i;
> >
> >         if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
> >                 return;
> >
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_THRT_EN))
> > +               writel_relaxed(SMI_LARB_THRT_EN, larb->base + SMI_LARB_CMD_THRT_CON);
> > +
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_SW_FLAG))
> > +               writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG);
> > +
> > +       for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++)
> > +               writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i));
> 
> All other mtk platform's larbs have the same format for SMI_LARB_OSTDL_PORTx()
> registers at the same offset? or is this unique feature for mt8195?

All the other Platform's larbs have the same format at the same offset.

> 
> > +
> >         for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
> >                 reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
> >                 reg |= F_MMU_EN;
> > @@ -227,6 +252,51 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >         }
> >  }
> >

[...]

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Ikjoon Jang <ikjn@chromium.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Tomasz Figa <tfiga@chromium.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>
Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb
Date: Thu, 22 Jul 2021 14:38:22 +0800	[thread overview]
Message-ID: <1626935902.27875.7.camel@mhfsdcap03> (raw)
In-Reply-To: <CAATdQgAfo9oNR5=ogEottHajODngi1ahvKUnEOUczzjreYpPcQ@mail.gmail.com>

On Wed, 2021-07-21 at 21:40 +0800, Ikjoon Jang wrote:
> On Thu, Jul 15, 2021 at 8:23 PM Yong Wu <yong.wu@mediatek.com> wrote:
> >
> > To improve the performance, We add some initial setting for smi larbs.
> > there are two part:
> > 1), Each port has the special ostd(outstanding) value in each larb.
> > 2), Two general setting for each larb.
> >
> > In some SoC, this setting maybe changed dynamically for some special case
> > like 4K, and this initial setting is enough in mt8195.
> >
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
[...]
> >  struct mtk_smi {
> > @@ -213,12 +228,22 @@ static void mtk_smi_larb_config_port_mt8173(struct device *dev)
> >  static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >  {
> >         struct mtk_smi_larb *larb = dev_get_drvdata(dev);
> > -       u32 reg;
> > +       u32 reg, flags_general = larb->larb_gen->flags_general;
> > +       const u8 *larbostd = larb->larb_gen->ostd[larb->larbid];
> >         int i;
> >
> >         if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
> >                 return;
> >
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_THRT_EN))
> > +               writel_relaxed(SMI_LARB_THRT_EN, larb->base + SMI_LARB_CMD_THRT_CON);
> > +
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_SW_FLAG))
> > +               writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG);
> > +
> > +       for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++)
> > +               writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i));
> 
> All other mtk platform's larbs have the same format for SMI_LARB_OSTDL_PORTx()
> registers at the same offset? or is this unique feature for mt8195?

All the other Platform's larbs have the same format at the same offset.

> 
> > +
> >         for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
> >                 reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
> >                 reg |= F_MMU_EN;
> > @@ -227,6 +252,51 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >         }
> >  }
> >

[...]

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Ikjoon Jang <ikjn@chromium.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Tomasz Figa <tfiga@chromium.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>
Subject: Re: [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb
Date: Thu, 22 Jul 2021 14:38:22 +0800	[thread overview]
Message-ID: <1626935902.27875.7.camel@mhfsdcap03> (raw)
In-Reply-To: <CAATdQgAfo9oNR5=ogEottHajODngi1ahvKUnEOUczzjreYpPcQ@mail.gmail.com>

On Wed, 2021-07-21 at 21:40 +0800, Ikjoon Jang wrote:
> On Thu, Jul 15, 2021 at 8:23 PM Yong Wu <yong.wu@mediatek.com> wrote:
> >
> > To improve the performance, We add some initial setting for smi larbs.
> > there are two part:
> > 1), Each port has the special ostd(outstanding) value in each larb.
> > 2), Two general setting for each larb.
> >
> > In some SoC, this setting maybe changed dynamically for some special case
> > like 4K, and this initial setting is enough in mt8195.
> >
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
[...]
> >  struct mtk_smi {
> > @@ -213,12 +228,22 @@ static void mtk_smi_larb_config_port_mt8173(struct device *dev)
> >  static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >  {
> >         struct mtk_smi_larb *larb = dev_get_drvdata(dev);
> > -       u32 reg;
> > +       u32 reg, flags_general = larb->larb_gen->flags_general;
> > +       const u8 *larbostd = larb->larb_gen->ostd[larb->larbid];
> >         int i;
> >
> >         if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
> >                 return;
> >
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_THRT_EN))
> > +               writel_relaxed(SMI_LARB_THRT_EN, larb->base + SMI_LARB_CMD_THRT_CON);
> > +
> > +       if (MTK_SMI_CAPS(flags_general, MTK_SMI_FLAG_LARB_SW_FLAG))
> > +               writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG);
> > +
> > +       for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++)
> > +               writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i));
> 
> All other mtk platform's larbs have the same format for SMI_LARB_OSTDL_PORTx()
> registers at the same offset? or is this unique feature for mt8195?

All the other Platform's larbs have the same format at the same offset.

> 
> > +
> >         for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
> >                 reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
> >                 reg |= F_MMU_EN;
> > @@ -227,6 +252,51 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
> >         }
> >  }
> >

[...]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-07-22  6:38 UTC|newest]

Thread overview: 112+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-15 12:11 [PATCH v2 00/11] MT8195 SMI support Yong Wu
2021-07-15 12:11 ` Yong Wu
2021-07-15 12:11 ` Yong Wu
2021-07-15 12:11 ` Yong Wu
2021-07-15 12:11 ` [PATCH v2 01/11] dt-bindings: memory: mediatek: Add mt8195 smi binding Yong Wu
2021-07-15 12:11   ` Yong Wu
2021-07-15 12:11   ` Yong Wu
2021-07-15 12:11   ` Yong Wu
2021-07-22  2:51   ` Rob Herring
2021-07-22  2:51     ` Rob Herring
2021-07-22  2:51     ` Rob Herring
2021-07-22  2:51     ` Rob Herring
2021-07-15 12:12 ` [PATCH v2 02/11] dt-bindings: memory: mediatek: Add mt8195 smi sub common Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-22  2:53   ` Rob Herring
2021-07-22  2:53     ` Rob Herring
2021-07-22  2:53     ` Rob Herring
2021-07-22  2:53     ` Rob Herring
2021-07-15 12:12 ` [PATCH v2 03/11] memory: mtk-smi: Use clk_bulk clock ops Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 10:43   ` Ikjoon Jang
2021-07-21 10:43     ` Ikjoon Jang
2021-07-21 10:43     ` Ikjoon Jang
2021-07-21 10:43     ` Ikjoon Jang
2021-07-15 12:12 ` [PATCH v2 04/11] memory: mtk-smi: Rename smi_gen to smi_type Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 10:44   ` Ikjoon Jang
2021-07-21 10:44     ` Ikjoon Jang
2021-07-21 10:44     ` Ikjoon Jang
2021-07-21 10:44     ` Ikjoon Jang
2021-07-15 12:12 ` [PATCH v2 05/11] memory: mtk-smi: Adjust some code position Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 10:44   ` Ikjoon Jang
2021-07-21 10:44     ` Ikjoon Jang
2021-07-21 10:44     ` Ikjoon Jang
2021-07-21 10:44     ` Ikjoon Jang
2021-07-15 12:12 ` [PATCH v2 06/11] memory: mtk-smi: Add error handle for smi_probe Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 10:45   ` Ikjoon Jang
2021-07-21 10:45     ` Ikjoon Jang
2021-07-21 10:45     ` Ikjoon Jang
2021-07-21 10:45     ` Ikjoon Jang
2021-07-15 12:12 ` [PATCH v2 07/11] memory: mtk-smi: Add smi sub common support Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 11:43   ` Ikjoon Jang
2021-07-21 11:43     ` Ikjoon Jang
2021-07-21 11:43     ` Ikjoon Jang
2021-07-21 11:43     ` Ikjoon Jang
2021-07-22  6:38     ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-15 12:12 ` [PATCH v2 08/11] memory: mtk-smi: Use devm_platform_ioremap_resource Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 11:44   ` Ikjoon Jang
2021-07-21 11:44     ` Ikjoon Jang
2021-07-21 11:44     ` Ikjoon Jang
2021-07-21 11:44     ` Ikjoon Jang
2021-07-15 12:12 ` [PATCH v2 09/11] memory: mtk-smi: mt8195: Add smi support Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 12:39   ` Ikjoon Jang
2021-07-21 12:39     ` Ikjoon Jang
2021-07-21 12:39     ` Ikjoon Jang
2021-07-21 12:39     ` Ikjoon Jang
2021-07-15 12:12 ` [PATCH v2 10/11] memory: mtk-smi: mt8195: Add initial setting for smi-common Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 12:54   ` Ikjoon Jang
2021-07-21 12:54     ` Ikjoon Jang
2021-07-21 12:54     ` Ikjoon Jang
2021-07-21 12:54     ` Ikjoon Jang
2021-07-22  6:38     ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-15 12:12 ` [PATCH v2 11/11] memory: mtk-smi: mt8195: Add initial setting for smi-larb Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-15 12:12   ` Yong Wu
2021-07-21 13:40   ` Ikjoon Jang
2021-07-21 13:40     ` Ikjoon Jang
2021-07-21 13:40     ` Ikjoon Jang
2021-07-21 13:40     ` Ikjoon Jang
2021-07-22  6:38     ` Yong Wu [this message]
2021-07-22  6:38       ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-22  6:38       ` Yong Wu
2021-07-29  6:41       ` Yong Wu
2021-07-29  6:41         ` Yong Wu
2021-07-29  6:41         ` Yong Wu
2021-07-29  6:41         ` Yong Wu
2021-08-03  5:37         ` Ikjoon Jang
2021-08-03  5:37           ` Ikjoon Jang
2021-08-03  5:37           ` Ikjoon Jang
2021-08-03  5:37           ` Ikjoon Jang

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