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From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com
Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	Richard Zhu <hongxing.zhu@nxp.com>
Subject: [RESEND v2 4/5] PCI: imx6: Fix the clock reference handling unbalance when link never came up
Date: Fri, 15 Oct 2021 14:05:40 +0800	[thread overview]
Message-ID: <1634277941-6672-5-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634277941-6672-1-git-send-email-hongxing.zhu@nxp.com>

When link never came up, driver probe would be failed with error -110.
To keep usage counter balance of the clocks, disable the previous
enabled clocks when link is down.
Move definitions of the imx6_pcie_clk_disable() function to the proper
place. Because it wouldn't be used in imx6_pcie_suspend_noirq() only.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 47 ++++++++++++++-------------
 1 file changed, 24 insertions(+), 23 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index cc837f8bf6d4..d6a5d99ffa52 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -514,6 +514,29 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
 	return ret;
 }
 
+static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
+{
+	clk_disable_unprepare(imx6_pcie->pcie);
+	clk_disable_unprepare(imx6_pcie->pcie_phy);
+	clk_disable_unprepare(imx6_pcie->pcie_bus);
+
+	switch (imx6_pcie->drvdata->variant) {
+	case IMX6SX:
+		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
+		break;
+	case IMX7D:
+		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
+		break;
+	case IMX8MQ:
+		clk_disable_unprepare(imx6_pcie->pcie_aux);
+		break;
+	default:
+		break;
+	}
+}
+
 static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
 {
 	u32 val;
@@ -853,6 +876,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
 		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
 		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
 	imx6_pcie_reset_phy(imx6_pcie);
+	imx6_pcie_clk_disable(imx6_pcie);
 	if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0)
 		regulator_disable(imx6_pcie->vpcie);
 	return ret;
@@ -941,29 +965,6 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
 	usleep_range(1000, 10000);
 }
 
-static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
-{
-	clk_disable_unprepare(imx6_pcie->pcie);
-	clk_disable_unprepare(imx6_pcie->pcie_phy);
-	clk_disable_unprepare(imx6_pcie->pcie_bus);
-
-	switch (imx6_pcie->drvdata->variant) {
-	case IMX6SX:
-		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
-		break;
-	case IMX7D:
-		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
-		break;
-	case IMX8MQ:
-		clk_disable_unprepare(imx6_pcie->pcie_aux);
-		break;
-	default:
-		break;
-	}
-}
-
 static int imx6_pcie_suspend_noirq(struct device *dev)
 {
 	struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com
Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	Richard Zhu <hongxing.zhu@nxp.com>
Subject: [RESEND v2 4/5] PCI: imx6: Fix the clock reference handling unbalance when link never came up
Date: Fri, 15 Oct 2021 14:05:40 +0800	[thread overview]
Message-ID: <1634277941-6672-5-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634277941-6672-1-git-send-email-hongxing.zhu@nxp.com>

When link never came up, driver probe would be failed with error -110.
To keep usage counter balance of the clocks, disable the previous
enabled clocks when link is down.
Move definitions of the imx6_pcie_clk_disable() function to the proper
place. Because it wouldn't be used in imx6_pcie_suspend_noirq() only.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 47 ++++++++++++++-------------
 1 file changed, 24 insertions(+), 23 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index cc837f8bf6d4..d6a5d99ffa52 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -514,6 +514,29 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
 	return ret;
 }
 
+static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
+{
+	clk_disable_unprepare(imx6_pcie->pcie);
+	clk_disable_unprepare(imx6_pcie->pcie_phy);
+	clk_disable_unprepare(imx6_pcie->pcie_bus);
+
+	switch (imx6_pcie->drvdata->variant) {
+	case IMX6SX:
+		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
+		break;
+	case IMX7D:
+		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
+		break;
+	case IMX8MQ:
+		clk_disable_unprepare(imx6_pcie->pcie_aux);
+		break;
+	default:
+		break;
+	}
+}
+
 static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
 {
 	u32 val;
@@ -853,6 +876,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
 		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
 		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
 	imx6_pcie_reset_phy(imx6_pcie);
+	imx6_pcie_clk_disable(imx6_pcie);
 	if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0)
 		regulator_disable(imx6_pcie->vpcie);
 	return ret;
@@ -941,29 +965,6 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
 	usleep_range(1000, 10000);
 }
 
-static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
-{
-	clk_disable_unprepare(imx6_pcie->pcie);
-	clk_disable_unprepare(imx6_pcie->pcie_phy);
-	clk_disable_unprepare(imx6_pcie->pcie_bus);
-
-	switch (imx6_pcie->drvdata->variant) {
-	case IMX6SX:
-		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
-		break;
-	case IMX7D:
-		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
-		break;
-	case IMX8MQ:
-		clk_disable_unprepare(imx6_pcie->pcie_aux);
-		break;
-	default:
-		break;
-	}
-}
-
 static int imx6_pcie_suspend_noirq(struct device *dev)
 {
 	struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
-- 
2.25.1


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  parent reply	other threads:[~2021-10-15  6:30 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15  6:05 [RESEND v2 0/5] PCI: imx6: refine codes and add compliance tests mode support Richard Zhu
2021-10-15  6:05 ` Richard Zhu
2021-10-15  6:05 ` [RESEND v2 1/5] PCI: imx6: Encapsulate the clock enable into one standalone function Richard Zhu
2021-10-15  6:05   ` Richard Zhu
2021-10-15 18:13   ` Lucas Stach
2021-10-15 18:13     ` Lucas Stach
2021-10-19  7:32     ` Richard Zhu
2021-10-19  7:32       ` Richard Zhu
2021-10-15  6:05 ` [RESEND v2 2/5] PCI: imx6: Add the error propagation from host_init Richard Zhu
2021-10-15  6:05   ` Richard Zhu
2021-10-15 18:16   ` Lucas Stach
2021-10-15 18:16     ` Lucas Stach
2021-10-19  7:33     ` Richard Zhu
2021-10-19  7:33       ` Richard Zhu
2021-10-15  6:05 ` [RESEND v2 3/5] PCI: imx6: Fix the regulator dump when link never came up Richard Zhu
2021-10-15  6:05   ` Richard Zhu
2021-10-15 18:22   ` Lucas Stach
2021-10-15 18:22     ` Lucas Stach
2021-10-19  7:39     ` Richard Zhu
2021-10-19  7:39       ` Richard Zhu
2021-10-20  3:22       ` Richard Zhu
2021-10-20  3:22         ` Richard Zhu
2021-10-15 18:34   ` Fabio Estevam
2021-10-15 18:34     ` Fabio Estevam
2021-10-19  7:44     ` Richard Zhu
2021-10-19  7:44       ` Richard Zhu
2021-10-15  6:05 ` Richard Zhu [this message]
2021-10-15  6:05   ` [RESEND v2 4/5] PCI: imx6: Fix the clock reference handling unbalance " Richard Zhu
2021-10-15 18:24   ` Lucas Stach
2021-10-15 18:24     ` Lucas Stach
2021-10-19  7:43     ` Richard Zhu
2021-10-19  7:43       ` Richard Zhu
2021-10-15 18:49   ` Bjorn Helgaas
2021-10-15 18:49     ` Bjorn Helgaas
2021-10-15 18:51     ` Bjorn Helgaas
2021-10-15 18:51       ` Bjorn Helgaas
2021-10-19  7:56       ` Richard Zhu
2021-10-19  7:56         ` Richard Zhu
2021-10-22  8:02         ` Richard Zhu
2021-10-22  8:02           ` Richard Zhu
2021-10-23  9:53           ` Krzysztof Wilczyński
2021-10-23  9:53             ` Krzysztof Wilczyński
2021-10-25  2:35             ` Richard Zhu
2021-10-25  2:35               ` Richard Zhu
2021-10-26 22:21               ` Bjorn Helgaas
2021-10-26 22:21                 ` Bjorn Helgaas
2021-10-27  1:30                 ` Richard Zhu
2021-10-27  1:30                   ` Richard Zhu
2021-10-26 16:38           ` Bjorn Helgaas
2021-10-26 16:38             ` Bjorn Helgaas
2021-10-27  1:29             ` Richard Zhu
2021-10-27  1:29               ` Richard Zhu
2021-10-19  7:45     ` Richard Zhu
2021-10-19  7:45       ` Richard Zhu
2021-10-15  6:05 ` [RESEND v2 5/5] PCI: imx6: Add the compliance tests mode support Richard Zhu
2021-10-15  6:05   ` Richard Zhu
2021-10-15 18:28   ` Lucas Stach
2021-10-15 18:28     ` Lucas Stach
2021-10-19  8:12     ` Richard Zhu
2021-10-19  8:12       ` Richard Zhu

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