From: Julien Thierry <julien.thierry@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, Arnd Bergmann <arnd@arndb.de>, linux-arch@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v7 01/25] arm64: Fix HCR.TGE status for NMI contexts Date: Mon, 17 Dec 2018 08:49:01 +0000 [thread overview] Message-ID: <19f8c91b-0879-30dd-09dd-c0657b53bb33@arm.com> (raw) In-Reply-To: <1544633245-6036-2-git-send-email-julien.thierry@arm.com> On 12/12/2018 16:47, Julien Thierry wrote: > When using VHE, the host needs to clear HCR_EL2.TGE bit in order > to interract with guest TLBs, switching from EL2&0 translation regime > to EL1&0. > > However, some non-maskable asynchronous event could happen while TGE is > cleared like SDEI. Because of this address translation operations > relying on EL2&0 translation regime could fail (tlb invalidation, > userspace access, ...). > > Fix this by properly setting HCR_EL2.TGE when entering NMI context and > clear it if necessary when returning to the interrupted context. > > Signed-off-by: Julien Thierry <julien.thierry@arm.com> > Suggested-by: Marc Zyngier <marc.zyngier@arm.com> > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > Cc: Marc Zyngier <marc.zyngier@arm.com> > Cc: James Morse <james.morse@arm.com> > Cc: linux-arch@vger.kernel.org > Cc: stable@vger.kernel.org > --- > arch/arm64/include/asm/hardirq.h | 28 ++++++++++++++++++++++++++++ > arch/arm64/kernel/irq.c | 3 +++ > include/asm-generic/hardirq.h | 3 +++ > include/linux/hardirq.h | 2 ++ > 4 files changed, 36 insertions(+) > > diff --git a/include/asm-generic/hardirq.h b/include/asm-generic/hardirq.h > index d14214d..c33b53f20 100644 > --- a/include/asm-generic/hardirq.h > +++ b/include/asm-generic/hardirq.h > @@ -12,6 +12,9 @@ > #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ > #include <linux/irq.h> > > +#define arch_nmi_enter() do { } while (0) > +#define arch_nmi_exit() do { } while (0) > + As spotted by the build bot, this needs to go in include/linux/hardirq.h under a #ifndef arch_nmi_enter. > #ifndef ack_bad_irq > static inline void ack_bad_irq(unsigned int irq) > { > diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h > index 0fbbcdf..776a60f 100644 > --- a/include/linux/hardirq.h > +++ b/include/linux/hardirq.h > @@ -62,6 +62,7 @@ static inline void rcu_nmi_exit(void) > > #define nmi_enter() \ > do { \ > + arch_nmi_enter(); \ > printk_nmi_enter(); \ > lockdep_off(); \ > ftrace_nmi_enter(); \ > @@ -80,6 +81,7 @@ static inline void rcu_nmi_exit(void) > ftrace_nmi_exit(); \ > lockdep_on(); \ > printk_nmi_exit(); \ > + arch_nmi_exit(); \ > } while (0) > > #endif /* LINUX_HARDIRQ_H */ > -- Julien Thierry
WARNING: multiple messages have this Message-ID (diff)
From: Julien Thierry <julien.thierry@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: mark.rutland@arm.com, linux-arch@vger.kernel.org, daniel.thompson@linaro.org, Arnd Bergmann <arnd@arndb.de>, marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, stable@vger.kernel.org, christoffer.dall@arm.com, james.morse@arm.com, joel@joelfernandes.org Subject: Re: [PATCH v7 01/25] arm64: Fix HCR.TGE status for NMI contexts Date: Mon, 17 Dec 2018 08:49:01 +0000 [thread overview] Message-ID: <19f8c91b-0879-30dd-09dd-c0657b53bb33@arm.com> (raw) In-Reply-To: <1544633245-6036-2-git-send-email-julien.thierry@arm.com> On 12/12/2018 16:47, Julien Thierry wrote: > When using VHE, the host needs to clear HCR_EL2.TGE bit in order > to interract with guest TLBs, switching from EL2&0 translation regime > to EL1&0. > > However, some non-maskable asynchronous event could happen while TGE is > cleared like SDEI. Because of this address translation operations > relying on EL2&0 translation regime could fail (tlb invalidation, > userspace access, ...). > > Fix this by properly setting HCR_EL2.TGE when entering NMI context and > clear it if necessary when returning to the interrupted context. > > Signed-off-by: Julien Thierry <julien.thierry@arm.com> > Suggested-by: Marc Zyngier <marc.zyngier@arm.com> > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > Cc: Marc Zyngier <marc.zyngier@arm.com> > Cc: James Morse <james.morse@arm.com> > Cc: linux-arch@vger.kernel.org > Cc: stable@vger.kernel.org > --- > arch/arm64/include/asm/hardirq.h | 28 ++++++++++++++++++++++++++++ > arch/arm64/kernel/irq.c | 3 +++ > include/asm-generic/hardirq.h | 3 +++ > include/linux/hardirq.h | 2 ++ > 4 files changed, 36 insertions(+) > > diff --git a/include/asm-generic/hardirq.h b/include/asm-generic/hardirq.h > index d14214d..c33b53f20 100644 > --- a/include/asm-generic/hardirq.h > +++ b/include/asm-generic/hardirq.h > @@ -12,6 +12,9 @@ > #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ > #include <linux/irq.h> > > +#define arch_nmi_enter() do { } while (0) > +#define arch_nmi_exit() do { } while (0) > + As spotted by the build bot, this needs to go in include/linux/hardirq.h under a #ifndef arch_nmi_enter. > #ifndef ack_bad_irq > static inline void ack_bad_irq(unsigned int irq) > { > diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h > index 0fbbcdf..776a60f 100644 > --- a/include/linux/hardirq.h > +++ b/include/linux/hardirq.h > @@ -62,6 +62,7 @@ static inline void rcu_nmi_exit(void) > > #define nmi_enter() \ > do { \ > + arch_nmi_enter(); \ > printk_nmi_enter(); \ > lockdep_off(); \ > ftrace_nmi_enter(); \ > @@ -80,6 +81,7 @@ static inline void rcu_nmi_exit(void) > ftrace_nmi_exit(); \ > lockdep_on(); \ > printk_nmi_exit(); \ > + arch_nmi_exit(); \ > } while (0) > > #endif /* LINUX_HARDIRQ_H */ > -- Julien Thierry _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2018-12-17 8:49 UTC|newest] Thread overview: 91+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-12-12 16:47 [PATCH v7 00/25] arm64: provide pseudo NMI with GICv3 Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 01/25] arm64: Fix HCR.TGE status for NMI contexts Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 21:39 ` Sasha Levin 2018-12-12 21:39 ` Sasha Levin 2018-12-17 8:49 ` Julien Thierry [this message] 2018-12-17 8:49 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 02/25] arm64: Remove unused daif related functions/macros Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 03/25] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 04/25] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 05/25] arm/arm64: gic-v3: Add PMR and RPR accessors Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 06/25] irqchip/gic-v3: Switch to PMR masking before calling IRQ handler Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 07/25] arm64: ptrace: Provide definitions for PMR values Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 08/25] arm64: Make PMR part of task context Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 09/25] arm64: Unmask PMR before going idle Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 10/25] arm64: kvm: Unmask PMR before entering guest Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 11/25] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 17:27 ` Ard Biesheuvel 2018-12-12 17:27 ` Ard Biesheuvel 2018-12-12 17:59 ` Julien Thierry 2018-12-12 17:59 ` Julien Thierry 2018-12-12 18:10 ` Ard Biesheuvel 2018-12-12 18:10 ` Ard Biesheuvel 2018-12-13 8:54 ` Julien Thierry 2018-12-13 8:54 ` Julien Thierry 2018-12-13 11:35 ` Ard Biesheuvel 2018-12-13 11:35 ` Ard Biesheuvel 2018-12-13 12:02 ` Julien Thierry 2018-12-13 12:02 ` Julien Thierry 2018-12-13 15:03 ` Julien Thierry 2018-12-13 15:03 ` Julien Thierry 2018-12-14 15:23 ` Julien Thierry 2018-12-14 15:23 ` Julien Thierry 2018-12-14 15:49 ` Ard Biesheuvel 2018-12-14 15:49 ` Ard Biesheuvel 2018-12-14 16:40 ` Julien Thierry 2018-12-14 16:40 ` Julien Thierry 2018-12-19 17:01 ` Julien Thierry 2018-12-19 17:01 ` Julien Thierry 2018-12-20 17:53 ` Ard Biesheuvel 2018-12-20 17:53 ` Ard Biesheuvel 2018-12-21 10:25 ` Julien Thierry 2018-12-21 10:25 ` Julien Thierry 2018-12-16 14:47 ` Jian-Lin Chen 2018-12-16 14:47 ` Jian-Lin Chen 2018-12-17 9:26 ` Julien Thierry 2018-12-17 9:26 ` Julien Thierry 2018-12-18 8:36 ` Jian-Lin Chen 2018-12-18 8:36 ` Jian-Lin Chen 2018-12-12 16:47 ` [PATCH v7 12/25] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 13/25] arm64: alternative: Allow alternative status checking per cpufeature Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 14/25] arm64: alternative: Apply alternatives early in boot process Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 15/25] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 16/25] arm64: Switch to PMR masking when starting CPUs Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 17/25] arm64: gic-v3: Implement arch support for priority masking Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 18/25] irqchip/gic-v3: Detect if GIC can support pseudo-NMIs Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 19/25] irqchip/gic-v3: Handle pseudo-NMIs Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 20/25] irqchip/gic: Add functions to access irq priorities Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 21/25] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 22/25] arm64: Handle serror in NMI context Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 23/25] arm64: Skip preemption when exiting an NMI Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 24/25] arm64: Skip irqflags tracing for NMI in IRQs disabled context Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:47 ` [PATCH v7 25/25] arm64: Enable the support of pseudo-NMIs Julien Thierry 2018-12-12 16:47 ` Julien Thierry 2018-12-12 16:52 ` [PATCH v7 00/25] arm64: provide pseudo NMI with GICv3 Julien Thierry 2018-12-12 16:52 ` Julien Thierry
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