From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: Tony Lindgren <tony@atomide.com>, Russell King - ARM Linux <linux@arm.linux.org.uk>, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v5 15/19] ARM: LPAE: Add support for cpu_v7_do_(suspend|resume) Date: Fri, 20 May 2011 17:17:27 +0200 [thread overview] Message-ID: <20110520151727.GW15292@game.jcrosoft.org> (raw) In-Reply-To: <1305897667.2788.98.camel@e102109-lin.cambridge.arm.com> On 14:21 Fri 20 May , Catalin Marinas wrote: > Tony, > > On Wed, 2011-05-18 at 08:27 +0100, Tony Lindgren wrote: > > * Catalin Marinas <catalin.marinas@arm.com> [110508 15:52]: > > > --- a/arch/arm/mm/proc-v7.S > > > +++ b/arch/arm/mm/proc-v7.S > > > @@ -260,19 +260,32 @@ cpu_v7_name: > > > > > > /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ > > > .globl cpu_v7_suspend_size > > > +#ifdef CONFIG_ARM_LPAE > > > +.equ cpu_v7_suspend_size, 4 * 10 > > > +#else > > > .equ cpu_v7_suspend_size, 4 * 8 > > > +#endif > > > #ifdef CONFIG_PM_SLEEP > > > ENTRY(cpu_v7_do_suspend) > > > stmfd sp!, {r4 - r11, lr} > > > mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID > > > mrc p15, 0, r5, c13, c0, 1 @ Context ID > > > mrc p15, 0, r6, c3, c0, 0 @ Domain ID > > > +#ifdef CONFIG_ARM_LPAE > > > + mrrc p15, 0, r7, r8, c2 @ TTB 0 > > > + mrrc p15, 1, r2, r3, c2 @ TTB 1 > > > +#else > > > mrc p15, 0, r7, c2, c0, 0 @ TTB 0 > > > mrc p15, 0, r8, c2, c0, 1 @ TTB 1 > > > +#endif > > > mrc p15, 0, r9, c1, c0, 0 @ Control register > > > mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register > > > mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control > > > +#ifdef CONFIG_ARM_LPAE > > > + stmia r0, {r2 - r11} > > > +#else > > > stmia r0, {r4 - r11} > > > +#endif > > > ldmfd sp!, {r4 - r11, pc} > > > ENDPROC(cpu_v7_do_suspend) > > > > > > @@ -280,12 +293,21 @@ ENTRY(cpu_v7_do_resume) > > > mov ip, #0 > > > mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs > > > mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache > > > +#ifdef CONFIG_ARM_LPAE > > > + ldmia r0, {r2 - r11} > > > +#else > > > ldmia r0, {r4 - r11} > > > +#endif > > > mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID > > > mcr p15, 0, r5, c13, c0, 1 @ Context ID > > > mcr p15, 0, r6, c3, c0, 0 @ Domain ID > > > +#ifdef CONFIG_ARM_LPAE > > > + mcrr p15, 0, r7, r8, c2 @ TTB 0 > > > + mcrr p15, 1, r2, r3, c2 @ TTB 1 > > > +#else > > > mcr p15, 0, r7, c2, c0, 0 @ TTB 0 > > > mcr p15, 0, r8, c2, c0, 1 @ TTB 1 > > > +#endif > > > mcr p15, 0, ip, c2, c0, 2 @ TTB control register > > > mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register > > > mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control > > > > Do we really need all this ifdef else throughout this series? > > > > I think we already have things in place to do this dynamically > > like we already do for thumb, smp_on_up, v6 vs v7 and so on. > > By dynamically, do you mean at run-time? We won't be able to compile > both classic and LPAE in the same kernel, there is just too much > difference between them (2 vs 3 levels of page tables - LPAE is an > entirely new format). > > If you mean some simpler macros like what we have for ARM/THUMB to > reduce the number of lines, I'm fine with it though we don't always have > a 1:1 mapping between LPAE and non-LPAE instructions. create the same macro as done do arm/thumb is good will make the code more readable > > Alternatively, I'm happy to create a separate proc-v7lpae.S file. maybe a good idea Best Regards, J.
WARNING: multiple messages have this Message-ID (diff)
From: plagnioj@jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 15/19] ARM: LPAE: Add support for cpu_v7_do_(suspend|resume) Date: Fri, 20 May 2011 17:17:27 +0200 [thread overview] Message-ID: <20110520151727.GW15292@game.jcrosoft.org> (raw) In-Reply-To: <1305897667.2788.98.camel@e102109-lin.cambridge.arm.com> On 14:21 Fri 20 May , Catalin Marinas wrote: > Tony, > > On Wed, 2011-05-18 at 08:27 +0100, Tony Lindgren wrote: > > * Catalin Marinas <catalin.marinas@arm.com> [110508 15:52]: > > > --- a/arch/arm/mm/proc-v7.S > > > +++ b/arch/arm/mm/proc-v7.S > > > @@ -260,19 +260,32 @@ cpu_v7_name: > > > > > > /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ > > > .globl cpu_v7_suspend_size > > > +#ifdef CONFIG_ARM_LPAE > > > +.equ cpu_v7_suspend_size, 4 * 10 > > > +#else > > > .equ cpu_v7_suspend_size, 4 * 8 > > > +#endif > > > #ifdef CONFIG_PM_SLEEP > > > ENTRY(cpu_v7_do_suspend) > > > stmfd sp!, {r4 - r11, lr} > > > mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID > > > mrc p15, 0, r5, c13, c0, 1 @ Context ID > > > mrc p15, 0, r6, c3, c0, 0 @ Domain ID > > > +#ifdef CONFIG_ARM_LPAE > > > + mrrc p15, 0, r7, r8, c2 @ TTB 0 > > > + mrrc p15, 1, r2, r3, c2 @ TTB 1 > > > +#else > > > mrc p15, 0, r7, c2, c0, 0 @ TTB 0 > > > mrc p15, 0, r8, c2, c0, 1 @ TTB 1 > > > +#endif > > > mrc p15, 0, r9, c1, c0, 0 @ Control register > > > mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register > > > mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control > > > +#ifdef CONFIG_ARM_LPAE > > > + stmia r0, {r2 - r11} > > > +#else > > > stmia r0, {r4 - r11} > > > +#endif > > > ldmfd sp!, {r4 - r11, pc} > > > ENDPROC(cpu_v7_do_suspend) > > > > > > @@ -280,12 +293,21 @@ ENTRY(cpu_v7_do_resume) > > > mov ip, #0 > > > mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs > > > mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache > > > +#ifdef CONFIG_ARM_LPAE > > > + ldmia r0, {r2 - r11} > > > +#else > > > ldmia r0, {r4 - r11} > > > +#endif > > > mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID > > > mcr p15, 0, r5, c13, c0, 1 @ Context ID > > > mcr p15, 0, r6, c3, c0, 0 @ Domain ID > > > +#ifdef CONFIG_ARM_LPAE > > > + mcrr p15, 0, r7, r8, c2 @ TTB 0 > > > + mcrr p15, 1, r2, r3, c2 @ TTB 1 > > > +#else > > > mcr p15, 0, r7, c2, c0, 0 @ TTB 0 > > > mcr p15, 0, r8, c2, c0, 1 @ TTB 1 > > > +#endif > > > mcr p15, 0, ip, c2, c0, 2 @ TTB control register > > > mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register > > > mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control > > > > Do we really need all this ifdef else throughout this series? > > > > I think we already have things in place to do this dynamically > > like we already do for thumb, smp_on_up, v6 vs v7 and so on. > > By dynamically, do you mean at run-time? We won't be able to compile > both classic and LPAE in the same kernel, there is just too much > difference between them (2 vs 3 levels of page tables - LPAE is an > entirely new format). > > If you mean some simpler macros like what we have for ARM/THUMB to > reduce the number of lines, I'm fine with it though we don't always have > a 1:1 mapping between LPAE and non-LPAE instructions. create the same macro as done do arm/thumb is good will make the code more readable > > Alternatively, I'm happy to create a separate proc-v7lpae.S file. maybe a good idea Best Regards, J.
next prev parent reply other threads:[~2011-05-20 15:29 UTC|newest] Thread overview: 104+ messages / expand[flat|nested] mbox.gz Atom feed top 2011-05-08 12:51 [PATCH v5 00/19] ARM: Add support for the Large Physical Address Extensions Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 01/19] ARM: LPAE: Use long long printk format for displaying the pud Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 02/19] ARM: LPAE: add ISBs around MMU enabling code Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 21:41 ` Russell King - ARM Linux 2011-05-08 21:41 ` Russell King - ARM Linux 2011-05-09 10:22 ` Catalin Marinas 2011-05-09 10:22 ` Catalin Marinas 2011-05-09 10:32 ` Russell King - ARM Linux 2011-05-09 10:32 ` Russell King - ARM Linux 2011-05-09 10:59 ` Catalin Marinas 2011-05-09 10:59 ` Catalin Marinas 2011-05-09 12:05 ` Russell King - ARM Linux 2011-05-09 12:05 ` Russell King - ARM Linux 2011-05-09 13:36 ` Catalin Marinas 2011-05-09 13:36 ` Catalin Marinas 2011-05-09 15:01 ` Catalin Marinas 2011-05-09 15:01 ` Catalin Marinas 2011-05-09 15:34 ` Russell King - ARM Linux 2011-05-09 15:34 ` Russell King - ARM Linux 2011-05-09 15:38 ` Catalin Marinas 2011-05-09 15:38 ` Catalin Marinas 2011-05-09 15:48 ` Russell King - ARM Linux 2011-05-09 15:48 ` Russell King - ARM Linux 2011-05-09 16:02 ` Catalin Marinas 2011-05-09 16:02 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 03/19] ARM: LPAE: Use unsigned long for __phys_to_virt and __virt_to_phys Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 21:44 ` Russell King - ARM Linux 2011-05-08 21:44 ` Russell King - ARM Linux 2011-05-16 17:28 ` Catalin Marinas 2011-05-16 17:28 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 04/19] ARM: LPAE: Make TTBR1 always point to swapper_pg_dir on ARMv7 Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 05/19] ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_* Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 06/19] ARM: LPAE: Factor out 2-level page table definitions into separate files Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 07/19] ARM: LPAE: Add (pte|pmd|pgd|pgprot)val_t type definitions as u32 Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 08/19] ARM: LPAE: Use a mask for physical addresses in page table entries Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 09/19] ARM: LPAE: Introduce the 3-level page table format definitions Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 10/19] ARM: LPAE: Page table maintenance for the 3-level format Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 11/19] ARM: LPAE: MMU setup for the 3-level page table format Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 12/19] ARM: LPAE: Add fault handling support Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 13/19] ARM: LPAE: Add context switching support Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 14/19] ARM: LPAE: Add identity mapping support for the 3-level page table format Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 15/19] ARM: LPAE: Add support for cpu_v7_do_(suspend|resume) Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-18 7:27 ` Tony Lindgren 2011-05-18 7:27 ` Tony Lindgren 2011-05-20 13:21 ` Catalin Marinas 2011-05-20 13:21 ` Catalin Marinas 2011-05-20 15:17 ` Jean-Christophe PLAGNIOL-VILLARD [this message] 2011-05-20 15:17 ` Jean-Christophe PLAGNIOL-VILLARD 2011-05-20 18:09 ` Nicolas Pitre 2011-05-20 18:09 ` Nicolas Pitre 2011-05-22 21:09 ` Catalin Marinas 2011-05-22 21:09 ` Catalin Marinas 2011-05-24 6:26 ` Tony Lindgren 2011-05-24 6:26 ` Tony Lindgren 2011-05-08 12:51 ` [PATCH v5 16/19] ARM: LPAE: Use generic dma_addr_t type definition Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 17/19] ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 18/19] ARM: LPAE: add support for ATAG_MEM64 Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-08 12:51 ` [PATCH v5 19/19] ARM: LPAE: Add the Kconfig entries Catalin Marinas 2011-05-08 12:51 ` Catalin Marinas 2011-05-11 10:23 ` [PATCH 20/19] ARM: LPAE: Invalidate the TLB before freeing the PMD Catalin Marinas 2011-05-11 10:23 ` Catalin Marinas 2011-05-11 10:31 ` Sergei Shtylyov 2011-05-11 10:31 ` Sergei Shtylyov 2011-05-11 10:40 ` Catalin Marinas 2011-05-11 10:40 ` Catalin Marinas 2011-05-11 10:54 ` Russell King - ARM Linux 2011-05-11 10:54 ` Russell King - ARM Linux 2011-05-11 13:40 ` Catalin Marinas 2011-05-11 13:40 ` Catalin Marinas 2011-05-11 14:00 ` Russell King - ARM Linux 2011-05-11 14:00 ` Russell King - ARM Linux 2011-05-11 15:58 ` Catalin Marinas 2011-05-11 15:58 ` Catalin Marinas 2011-05-23 16:54 ` [PATCH v5 00/19] ARM: Add support for the Large Physical Address Extensions Russell King - ARM Linux 2011-05-23 16:54 ` Russell King - ARM Linux 2011-05-23 17:22 ` Catalin Marinas 2011-05-23 17:22 ` Catalin Marinas 2011-05-24 10:04 ` Catalin Marinas 2011-05-24 10:04 ` Catalin Marinas 2011-05-26 21:15 ` Catalin Marinas 2011-05-26 21:15 ` Catalin Marinas 2011-05-26 21:44 ` Russell King - ARM Linux 2011-05-26 21:44 ` Russell King - ARM Linux 2011-05-27 9:09 ` Catalin Marinas 2011-05-27 9:09 ` Catalin Marinas
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