From: Mark Brown <broonie@opensource.wolfsonmicro.com> To: Richard Zhao <richard.zhao@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org>, "Rafael J. Wysocki" <rjw@sisk.pl>, Kevin Hilman <khilman@ti.com>, Nishanth Menon <nm@ti.com>, Russell King - ARM Linux <linux@arm.linux.org.uk>, Mike Turquette <mturquette@linaro.org>, devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, cpufreq@vger.kernel.org Subject: Re: [PATCH 3/3] cpufreq: Add a generic cpufreq-cpu0 driver Date: Fri, 27 Jul 2012 11:08:46 +0100 [thread overview] Message-ID: <20120727100845.GA7777@opensource.wolfsonmicro.com> (raw) In-Reply-To: <20120727021303.GB3347@b20223-02.ap.freescale.net> [-- Attachment #1: Type: text/plain, Size: 1466 bytes --] On Fri, Jul 27, 2012 at 10:13:04AM +0800, Richard Zhao wrote: > On Thu, Jul 26, 2012 at 02:11:21PM +0100, Mark Brown wrote: > > On Thu, Jul 19, 2012 at 11:54:41PM +0800, Shawn Guo wrote: > > > +Optional properties: > > > +- transition-latency: Specify the possible maximum transition latency, > > > + in unit of nanoseconds. > > This should make it clear that the transition latency being documented > > here is just that for the core clock change itself, there may be other > > sources of latency like the regulator ramp time or reprogramming PLLs. > I think it's the total time and board dts can over-write it if it > needs. Different transitions between different operating points may > differ, and regulator may be able to indicate the transition time but > clk don't have such api, and probably not worth to have. That's going to be awfully manual if every board has to tweak values (though obviously the main effect is just going to be bad decisions rather than breakage). I've seen several systems where the clock could provide useful timing input here - the usual pattern is that you've got a PLL which you can use as well as some dividers. Transitions that only need a divider update are extremely quick but transitions that change the PLL setup can take much longer. It seems better to just allow the board maintainer to plug everything together rather than having to work out their specific latencies to squeeze the performance out of the system. [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 836 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: broonie@opensource.wolfsonmicro.com (Mark Brown) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] cpufreq: Add a generic cpufreq-cpu0 driver Date: Fri, 27 Jul 2012 11:08:46 +0100 [thread overview] Message-ID: <20120727100845.GA7777@opensource.wolfsonmicro.com> (raw) In-Reply-To: <20120727021303.GB3347@b20223-02.ap.freescale.net> On Fri, Jul 27, 2012 at 10:13:04AM +0800, Richard Zhao wrote: > On Thu, Jul 26, 2012 at 02:11:21PM +0100, Mark Brown wrote: > > On Thu, Jul 19, 2012 at 11:54:41PM +0800, Shawn Guo wrote: > > > +Optional properties: > > > +- transition-latency: Specify the possible maximum transition latency, > > > + in unit of nanoseconds. > > This should make it clear that the transition latency being documented > > here is just that for the core clock change itself, there may be other > > sources of latency like the regulator ramp time or reprogramming PLLs. > I think it's the total time and board dts can over-write it if it > needs. Different transitions between different operating points may > differ, and regulator may be able to indicate the transition time but > clk don't have such api, and probably not worth to have. That's going to be awfully manual if every board has to tweak values (though obviously the main effect is just going to be bad decisions rather than breakage). I've seen several systems where the clock could provide useful timing input here - the usual pattern is that you've got a PLL which you can use as well as some dividers. Transitions that only need a divider update are extremely quick but transitions that change the PLL setup can take much longer. It seems better to just allow the board maintainer to plug everything together rather than having to work out their specific latencies to squeeze the performance out of the system. -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20120727/673349c5/attachment.sig>
next prev parent reply other threads:[~2012-07-27 10:08 UTC|newest] Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top 2012-07-19 15:54 [PATCH 0/3] Add a generic cpufreq-cpu0 driver Shawn Guo 2012-07-19 15:54 ` Shawn Guo 2012-07-19 15:54 ` [PATCH 1/3] ARM: add cpufreq transiton notifier to adjust loops_per_jiffy for smp Shawn Guo 2012-07-19 15:54 ` Shawn Guo 2012-07-20 6:36 ` Shilimkar, Santosh 2012-07-20 6:36 ` Shilimkar, Santosh 2012-07-20 7:56 ` Shawn Guo 2012-07-20 7:56 ` Shawn Guo 2012-07-20 8:27 ` Shilimkar, Santosh 2012-07-20 8:27 ` Shilimkar, Santosh 2012-07-19 15:54 ` [PATCH 2/3] PM / OPP: Initialize OPP table from device tree Shawn Guo 2012-07-19 15:54 ` Shawn Guo 2012-07-20 6:00 ` Menon, Nishanth 2012-07-20 6:00 ` Menon, Nishanth 2012-07-20 8:46 ` Shawn Guo 2012-07-20 8:46 ` Shawn Guo 2012-07-20 9:04 ` Menon, Nishanth 2012-07-20 9:04 ` Menon, Nishanth 2012-07-19 15:54 ` [PATCH 3/3] cpufreq: Add a generic cpufreq-cpu0 driver Shawn Guo 2012-07-19 15:54 ` Shawn Guo 2012-07-20 6:52 ` Shilimkar, Santosh 2012-07-20 6:52 ` Shilimkar, Santosh [not found] ` <CAMQu2gw32LogXJJa+K5ZjmCZzBNK3FY2wYwZXU8fsftsVzEO2Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2012-07-20 12:33 ` Shawn Guo 2012-07-20 12:33 ` Shawn Guo 2012-07-20 15:50 ` Turquette, Mike 2012-07-20 15:50 ` Turquette, Mike 2012-07-21 5:04 ` Shilimkar, Santosh 2012-07-21 5:04 ` Shilimkar, Santosh 2012-07-21 6:38 ` Shawn Guo 2012-07-21 6:38 ` Shawn Guo 2012-07-27 2:04 ` Richard Zhao 2012-07-27 2:04 ` Richard Zhao 2012-07-30 4:57 ` Shawn Guo 2012-07-30 4:57 ` Shawn Guo 2012-07-20 12:51 ` Richard Zhao 2012-07-20 12:51 ` Richard Zhao 2012-07-20 13:15 ` Shawn Guo 2012-07-20 13:15 ` Shawn Guo [not found] ` <1342713281-31114-4-git-send-email-shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2012-07-26 13:11 ` Mark Brown 2012-07-26 13:11 ` Mark Brown [not found] ` <20120726131121.GB7306-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2012-07-27 2:13 ` Richard Zhao 2012-07-27 2:13 ` Richard Zhao 2012-07-27 10:08 ` Mark Brown [this message] 2012-07-27 10:08 ` Mark Brown 2012-07-30 6:52 ` Shawn Guo 2012-07-30 6:52 ` Shawn Guo 2012-07-30 8:20 ` Shawn Guo 2012-07-30 8:20 ` Shawn Guo 2012-07-30 18:55 ` Mark Brown 2012-07-30 18:55 ` Mark Brown 2012-07-30 18:53 ` Mark Brown 2012-07-30 18:53 ` Mark Brown 2012-07-31 4:20 ` Shawn Guo 2012-07-31 4:20 ` Shawn Guo 2012-07-31 13:40 ` Mark Brown 2012-07-31 13:40 ` Mark Brown 2012-07-27 6:33 ` Richard Zhao 2012-07-27 6:33 ` Richard Zhao 2012-07-30 8:17 ` Shawn Guo 2012-07-30 8:17 ` Shawn Guo 2012-07-30 8:50 ` Richard Zhao 2012-07-30 8:50 ` Richard Zhao 2012-07-30 9:24 ` Shawn Guo 2012-07-30 9:24 ` Shawn Guo 2012-07-19 18:39 ` [PATCH 0/3] " Rafael J. Wysocki 2012-07-19 18:39 ` Rafael J. Wysocki 2012-07-20 0:29 ` Shawn Guo 2012-07-20 0:29 ` Shawn Guo
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