From: Shawn Guo <shawn.guo@freescale.com> To: Stefan Agner <stefan@agner.ch> Cc: <peter.chen@freescale.com>, <s.hauer@pengutronix.de>, <b35083@freescale.com>, <linux-arm-kernel@lists.infradead.org>, <linux-usb@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: Re: [PATCH 1/6] ARM: dts: vf610: add USB PHY and controller Date: Tue, 22 Jul 2014 10:22:33 +0800 [thread overview] Message-ID: <20140722022232.GR8537@dragon> (raw) In-Reply-To: <839af70e8acf139bc0f7bbdb4dd68dd146b5d6a8.1405702442.git.stefan@agner.ch> On Fri, Jul 18, 2014 at 07:01:37PM +0200, Stefan Agner wrote: > This adds USB PHY and USB controller nodes. Vybrid SoCs have two > independent USB cores which each supports DR (dual role). However, > real OTG is not supported since the OTG ID pin is not available. > > The PHYs are located within the anadig register range, hence we need > to change the length of the anadig registers. > > Signed-off-by: Stefan Agner <stefan@agner.ch> > --- > arch/arm/boot/dts/vf610.dtsi | 46 +++++++++++++++++++++++++++++++++++++++++--- > 1 file changed, 43 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi > index 6a6190c..f6c3f02 100644 > --- a/arch/arm/boot/dts/vf610.dtsi > +++ b/arch/arm/boot/dts/vf610.dtsi > @@ -25,6 +25,8 @@ > gpio2 = &gpio3; > gpio3 = &gpio4; > gpio4 = &gpio5; > + usbphy0 = &usbphy0; > + usbphy1 = &usbphy1; > }; > > cpus { > @@ -285,9 +287,25 @@ > gpio-ranges = <&iomuxc 0 128 7>; > }; > > - anatop@40050000 { > - compatible = "fsl,vf610-anatop"; > - reg = <0x40050000 0x1000>; > + anatop: anatop@40050000 { > + compatible = "fsl,vf610-anatop", "syscon"; > + reg = <0x40050000 0x400>; > + }; > + > + usbphy0: usbphy@40050800 { > + compatible = "fsl,vf610-usbphy", "fsl,imx23-usbphy"; Since phy driver will match "fsl,vf610-usbphy" anyway, we do not need "fsl,imx23-usbphy" here. > + reg = <0x40050800 0x400>; > + interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBPHY0>; > + fsl,anatop = <&anatop>; > + }; > + > + usbphy1: usbphy@40050c00 { > + compatible = "fsl,vf610-usbphy", "fsl,imx23-usbphy"; > + reg = <0x40050c00 0x400>; > + interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBPHY1>; > + fsl,anatop = <&anatop>; > }; > > i2c0: i2c@40066000 { > @@ -309,6 +327,18 @@ > reg = <0x4006b000 0x1000>; > #clock-cells = <1>; > }; > + > + usbdev0: usb@40034000 { > + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; It doesn't really make any sense to have "fsl,imx6q-usb" here. The following one should be less confusing. compatible = "fsl,vf610-usb", "fsl,imx27-usb"; Shawn > + reg = <0x40034000 0x800>; > + interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBC0>; > + fsl,usbphy = <&usbphy0>; > + dr_mode = "peripheral"; > + status = "disabled"; > + }; > + > + > }; > > aips1: aips-bus@40080000 { > @@ -371,6 +401,16 @@ > status = "disabled"; > }; > > + usbh1: usb@400b4000 { > + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; > + reg = <0x400b4000 0x800>; > + interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBC1>; > + fsl,usbphy = <&usbphy1>; > + dr_mode = "host"; > + status = "disabled"; > + }; > + > ftm: ftm@400b8000 { > compatible = "fsl,ftm-timer"; > reg = <0x400b8000 0x1000 0x400b9000 0x1000>; > -- > 2.0.1 >
WARNING: multiple messages have this Message-ID (diff)
From: shawn.guo@freescale.com (Shawn Guo) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/6] ARM: dts: vf610: add USB PHY and controller Date: Tue, 22 Jul 2014 10:22:33 +0800 [thread overview] Message-ID: <20140722022232.GR8537@dragon> (raw) In-Reply-To: <839af70e8acf139bc0f7bbdb4dd68dd146b5d6a8.1405702442.git.stefan@agner.ch> On Fri, Jul 18, 2014 at 07:01:37PM +0200, Stefan Agner wrote: > This adds USB PHY and USB controller nodes. Vybrid SoCs have two > independent USB cores which each supports DR (dual role). However, > real OTG is not supported since the OTG ID pin is not available. > > The PHYs are located within the anadig register range, hence we need > to change the length of the anadig registers. > > Signed-off-by: Stefan Agner <stefan@agner.ch> > --- > arch/arm/boot/dts/vf610.dtsi | 46 +++++++++++++++++++++++++++++++++++++++++--- > 1 file changed, 43 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi > index 6a6190c..f6c3f02 100644 > --- a/arch/arm/boot/dts/vf610.dtsi > +++ b/arch/arm/boot/dts/vf610.dtsi > @@ -25,6 +25,8 @@ > gpio2 = &gpio3; > gpio3 = &gpio4; > gpio4 = &gpio5; > + usbphy0 = &usbphy0; > + usbphy1 = &usbphy1; > }; > > cpus { > @@ -285,9 +287,25 @@ > gpio-ranges = <&iomuxc 0 128 7>; > }; > > - anatop at 40050000 { > - compatible = "fsl,vf610-anatop"; > - reg = <0x40050000 0x1000>; > + anatop: anatop at 40050000 { > + compatible = "fsl,vf610-anatop", "syscon"; > + reg = <0x40050000 0x400>; > + }; > + > + usbphy0: usbphy at 40050800 { > + compatible = "fsl,vf610-usbphy", "fsl,imx23-usbphy"; Since phy driver will match "fsl,vf610-usbphy" anyway, we do not need "fsl,imx23-usbphy" here. > + reg = <0x40050800 0x400>; > + interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBPHY0>; > + fsl,anatop = <&anatop>; > + }; > + > + usbphy1: usbphy at 40050c00 { > + compatible = "fsl,vf610-usbphy", "fsl,imx23-usbphy"; > + reg = <0x40050c00 0x400>; > + interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBPHY1>; > + fsl,anatop = <&anatop>; > }; > > i2c0: i2c at 40066000 { > @@ -309,6 +327,18 @@ > reg = <0x4006b000 0x1000>; > #clock-cells = <1>; > }; > + > + usbdev0: usb at 40034000 { > + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; It doesn't really make any sense to have "fsl,imx6q-usb" here. The following one should be less confusing. compatible = "fsl,vf610-usb", "fsl,imx27-usb"; Shawn > + reg = <0x40034000 0x800>; > + interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBC0>; > + fsl,usbphy = <&usbphy0>; > + dr_mode = "peripheral"; > + status = "disabled"; > + }; > + > + > }; > > aips1: aips-bus at 40080000 { > @@ -371,6 +401,16 @@ > status = "disabled"; > }; > > + usbh1: usb at 400b4000 { > + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; > + reg = <0x400b4000 0x800>; > + interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks VF610_CLK_USBC1>; > + fsl,usbphy = <&usbphy1>; > + dr_mode = "host"; > + status = "disabled"; > + }; > + > ftm: ftm at 400b8000 { > compatible = "fsl,ftm-timer"; > reg = <0x400b8000 0x1000 0x400b9000 0x1000>; > -- > 2.0.1 >
next prev parent reply other threads:[~2014-07-22 2:22 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-07-18 17:01 [PATCH 0/6] vf610: Add USB support Stefan Agner 2014-07-18 17:01 ` Stefan Agner 2014-07-18 17:01 ` [PATCH 1/6] ARM: dts: vf610: add USB PHY and controller Stefan Agner 2014-07-18 17:01 ` Stefan Agner 2014-07-22 2:22 ` Shawn Guo [this message] 2014-07-22 2:22 ` Shawn Guo 2014-07-22 9:57 ` Stefan Agner 2014-07-22 9:57 ` Stefan Agner 2014-07-22 13:18 ` Shawn Guo 2014-07-22 13:18 ` Shawn Guo 2014-07-18 17:01 ` [PATCH 2/6] ARM: imx: clk-vf610: add USBPHY clocks Stefan Agner 2014-07-18 17:01 ` Stefan Agner 2014-07-22 2:32 ` Shawn Guo 2014-07-22 2:32 ` Shawn Guo 2014-07-22 6:58 ` Jingchang Lu 2014-07-22 6:58 ` Jingchang Lu 2014-07-18 17:01 ` [PATCH 3/6] ARM: dts: vf610: Add usbmisc for non-core registers Stefan Agner 2014-07-18 17:01 ` Stefan Agner 2014-07-18 17:01 ` [PATCH 4/6] chipidea: usbmisc_imx: Add USB support for VF610 SoCs Stefan Agner 2014-07-18 17:01 ` Stefan Agner 2014-07-22 1:52 ` Peter Chen 2014-07-22 1:52 ` Peter Chen 2014-07-22 2:34 ` Shawn Guo 2014-07-22 2:34 ` Shawn Guo 2014-07-18 17:01 ` [PATCH 5/6] usb: phy: mxs: Add VF610 USB PHY support Stefan Agner 2014-07-18 17:01 ` Stefan Agner 2014-07-22 1:43 ` Peter Chen 2014-07-22 1:43 ` Peter Chen 2014-07-22 2:16 ` Shawn Guo 2014-07-22 2:16 ` Shawn Guo 2014-07-18 17:01 ` [PATCH 6/6] ARM: dts: vf610-colibri: add USB support Stefan Agner 2014-07-18 17:01 ` Stefan Agner 2014-07-22 0:13 ` [PATCH 0/6] vf610: Add " Peter Chen 2014-07-22 0:13 ` Peter Chen 2014-07-26 12:24 ` Stefan Agner 2014-07-26 12:24 ` Stefan Agner
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