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From: Mark Brown <broonie@kernel.org>
To: mengdong.lin@intel.com
Cc: bardliao@realtek.com, alsa-devel@alsa-project.org
Subject: Re: [PATCH 1/3] ASoC: rt5670: fix bit definition for ASRC control
Date: Mon, 5 Jan 2015 18:17:14 +0000	[thread overview]
Message-ID: <20150105181714.GA2634@sirena.org.uk> (raw)
In-Reply-To: <1481c597e90b5daacce80a021fa0c513a7a2ec6d.1420451186.git.mengdong.lin@intel.com>


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On Mon, Jan 05, 2015 at 05:48:15PM +0800, mengdong.lin@intel.com wrote:
> From: Bard Liao <bardliao@realtek.com>
> 
> This patch fixes bit definitions for two ASRC control registers 0x84 and 0x85.

This appears to do something more or different to fixing definitions -
if it was fixing I'd expect to see equal numbers of lines added and
removed in blocks identical apart from some numbers but this appears to
be adding some new definitions like these...

> +/* ASRC clock source selection (0x84, 0x85) */
> +#define RT5670_CLK_SEL_SYS			(0x0)
> +#define RT5670_CLK_SEL_I2S1_ASRC		(0x1)
> +#define RT5670_CLK_SEL_I2S2_ASRC		(0x2)
> +#define RT5670_CLK_SEL_I2S3_ASRC		(0x3)
> +#define RT5670_CLK_SEL_SYS2			(0x5)
> +#define RT5670_CLK_SEL_SYS3			(0x6)

...among other things, and this block here:

>  /* ASRC Control 2 (0x84) */
> -#define RT5670_MDA_L_M_MASK			(0x1 << 15)
> -#define RT5670_MDA_L_M_SFT			15
> -#define RT5670_MDA_L_M_NOR			(0x0 << 15)
> -#define RT5670_MDA_L_M_ASYN			(0x1 << 15)
> -#define RT5670_MDA_R_M_MASK			(0x1 << 14)
> -#define RT5670_MDA_R_M_SFT			14
> -#define RT5670_MDA_R_M_NOR			(0x0 << 14)
> -#define RT5670_MDA_R_M_ASYN			(0x1 << 14)
> -#define RT5670_MAD_L_M_MASK			(0x1 << 13)
> -#define RT5670_MAD_L_M_SFT			13
> -#define RT5670_MAD_L_M_NOR			(0x0 << 13)
> -#define RT5670_MAD_L_M_ASYN			(0x1 << 13)
> -#define RT5670_MAD_R_M_MASK			(0x1 << 12)
> -#define RT5670_MAD_R_M_SFT			12
> -#define RT5670_MAD_R_M_NOR			(0x0 << 12)
> -#define RT5670_MAD_R_M_ASYN			(0x1 << 12)
> -#define RT5670_ADC_M_MASK			(0x1 << 11)
> -#define RT5670_ADC_M_SFT			11
> -#define RT5670_ADC_M_NOR			(0x0 << 11)
> -#define RT5670_ADC_M_ASYN			(0x1 << 11)
> -#define RT5670_STO_DAC_M_MASK			(0x1 << 5)
> -#define RT5670_STO_DAC_M_SFT			5
> -#define RT5670_STO_DAC_M_NOR			(0x0 << 5)
> -#define RT5670_STO_DAC_M_ASYN			(0x1 << 5)
> -#define RT5670_I2S1_R_D_MASK			(0x1 << 4)
> -#define RT5670_I2S1_R_D_SFT			4
> -#define RT5670_I2S1_R_D_DIS			(0x0 << 4)
> -#define RT5670_I2S1_R_D_EN			(0x1 << 4)
> -#define RT5670_I2S2_R_D_MASK			(0x1 << 3)
> -#define RT5670_I2S2_R_D_SFT			3
> -#define RT5670_I2S2_R_D_DIS			(0x0 << 3)
> -#define RT5670_I2S2_R_D_EN			(0x1 << 3)
> -#define RT5670_PRE_SCLK_MASK			(0x3)
> -#define RT5670_PRE_SCLK_SFT			0
> -#define RT5670_PRE_SCLK_512			(0x0)
> -#define RT5670_PRE_SCLK_1024			(0x1)
> -#define RT5670_PRE_SCLK_2048			(0x2)
> +#define RT5670_DA_STO_CLK_SEL_MASK		(0xf << 12)
> +#define RT5670_DA_STO_CLK_SEL_SFT		12
> +#define RT5670_DA_MONOL_CLK_SEL_MASK		(0xf << 8)
> +#define RT5670_DA_MONOL_CLK_SEL_SFT		8
> +#define RT5670_DA_MONOR_CLK_SEL_MASK		(0xf << 4)
> +#define RT5670_DA_MONOR_CLK_SEL_SFT		4
> +#define RT5670_AD_STO1_CLK_SEL_MASK		(0xf << 0)
> +#define RT5670_AD_STO1_CLK_SEL_SFT		0

removes a lot more things than it adds, with different names too.

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  parent reply	other threads:[~2015-01-05 18:17 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-05  9:48 [PATCH 1/3] ASoC: rt5670: fix bit definition for ASRC control mengdong.lin
2015-01-05  9:48 ` [PATCH 2/3] ASoC: rt5670: add API to select ASRC clock source mengdong.lin
2015-01-05  9:48 ` [PATCH 3/3] ASoC: Intel: Select RT5672 ASRC clock source on Cherrytrail and Braswell mengdong.lin
2015-01-05 18:17 ` Mark Brown [this message]
2015-01-06  2:08   ` [PATCH 1/3] ASoC: rt5670: fix bit definition for ASRC control Bard Liao
2015-01-06 11:03     ` Mark Brown
2015-01-07  2:16       ` Lin, Mengdong
2015-01-07  2:19 ` [PATCH v2 1/3] ASoC: rt5670: redefine ASRC control registers 0x84 and 0x85 mengdong.lin
2015-01-07 17:42   ` Mark Brown
2015-01-07  2:19 ` [PATCH v2 2/3] ASoC: rt5670: add API to select ASRC clock source mengdong.lin
2015-01-07  2:19 ` [PATCH v2 3/3] ASoC: Intel: Select RT5672 ASRC clock source on Cherrytrail and Braswell mengdong.lin

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