From: Mark Brown <broonie@kernel.org>
To: Bard Liao <bardliao@realtek.com>
Cc: "mengdong.lin@intel.com" <mengdong.lin@intel.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>
Subject: Re: [PATCH 1/3] ASoC: rt5670: fix bit definition for ASRC control
Date: Tue, 6 Jan 2015 11:03:25 +0000 [thread overview]
Message-ID: <20150106110325.GU2634@sirena.org.uk> (raw)
In-Reply-To: <ABFD875FF5FB574BA706497D987D48D70103ABE3@RTITMBSV03.realtek.com.tw>
[-- Attachment #1.1: Type: text/plain, Size: 859 bytes --]
On Tue, Jan 06, 2015 at 02:08:45AM +0000, Bard Liao wrote:
> > > This patch fixes bit definitions for two ASRC control registers 0x84 and
> > 0x85.
> > This appears to do something more or different to fixing definitions - if it
> > was fixing I'd expect to see equal numbers of lines added and removed in
> > blocks identical apart from some numbers but this appears to be adding
> > some new definitions like these...
> Maybe we should call redefine rather than fix. The previous definition of
> registers 0x84 and 0x85 doesn't match the register's description. To make
> the code more readable, we would like to rewrite the definition of registers
> 0x84 and 0x85.
Yes, if it's just redefining the definitions that are currently unused
then it should be described as such - a fix is something that should get
sent to Linus and possibly also to stable.
[-- Attachment #1.2: Digital signature --]
[-- Type: application/pgp-signature, Size: 473 bytes --]
[-- Attachment #2: Type: text/plain, Size: 0 bytes --]
next prev parent reply other threads:[~2015-01-06 11:03 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-05 9:48 [PATCH 1/3] ASoC: rt5670: fix bit definition for ASRC control mengdong.lin
2015-01-05 9:48 ` [PATCH 2/3] ASoC: rt5670: add API to select ASRC clock source mengdong.lin
2015-01-05 9:48 ` [PATCH 3/3] ASoC: Intel: Select RT5672 ASRC clock source on Cherrytrail and Braswell mengdong.lin
2015-01-05 18:17 ` [PATCH 1/3] ASoC: rt5670: fix bit definition for ASRC control Mark Brown
2015-01-06 2:08 ` Bard Liao
2015-01-06 11:03 ` Mark Brown [this message]
2015-01-07 2:16 ` Lin, Mengdong
2015-01-07 2:19 ` [PATCH v2 1/3] ASoC: rt5670: redefine ASRC control registers 0x84 and 0x85 mengdong.lin
2015-01-07 17:42 ` Mark Brown
2015-01-07 2:19 ` [PATCH v2 2/3] ASoC: rt5670: add API to select ASRC clock source mengdong.lin
2015-01-07 2:19 ` [PATCH v2 3/3] ASoC: Intel: Select RT5672 ASRC clock source on Cherrytrail and Braswell mengdong.lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150106110325.GU2634@sirena.org.uk \
--to=broonie@kernel.org \
--cc=alsa-devel@alsa-project.org \
--cc=bardliao@realtek.com \
--cc=mengdong.lin@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.