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From: Marc Zyngier <marc.zyngier@arm.com>
To: David Daney <ddaney.cavm@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	linux-kernel@vger.kernel.org, Andrew Pinski <apinski@cavium.com>,
	David Daney <david.daney@cavium.com>
Subject: Re: [PATCH] arm64: Add workaround for Cavium erratum 27456
Date: Tue, 9 Feb 2016 19:52:22 +0000	[thread overview]
Message-ID: <20160209195222.0882d7f7@arm.com> (raw)
In-Reply-To: <1455046156-10582-1-git-send-email-ddaney.cavm@gmail.com>

On Tue,  9 Feb 2016 11:29:16 -0800
David Daney <ddaney.cavm@gmail.com> wrote:

Hi David,

> From: Andrew Pinski <apinski@cavium.com>
> 
> On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
> instructions may cause the icache to become invalid if it contains
> data for a non-current ASID.
> 
> This patch implements the workaround (which flushes the local icache
> when switching the mm) by using code patching.
> 
> Signed-off-by: Andrew Pinski <apinski@cavium.com>
> Signed-off-by: David Daney <david.daney@cavium.com>
> ---
>  arch/arm64/Kconfig                  | 11 +++++++++++
>  arch/arm64/include/asm/cpufeature.h |  3 ++-
>  arch/arm64/kernel/cpu_errata.c      |  9 +++++++++
>  arch/arm64/mm/proc.S                | 12 ++++++++++++
>  4 files changed, 34 insertions(+), 1 deletion(-)

It would be good to update Documentation/arm64/silicon-errata.txt to
reflect the fact that there is a workaround available for this erratum.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny.

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: Add workaround for Cavium erratum 27456
Date: Tue, 9 Feb 2016 19:52:22 +0000	[thread overview]
Message-ID: <20160209195222.0882d7f7@arm.com> (raw)
In-Reply-To: <1455046156-10582-1-git-send-email-ddaney.cavm@gmail.com>

On Tue,  9 Feb 2016 11:29:16 -0800
David Daney <ddaney.cavm@gmail.com> wrote:

Hi David,

> From: Andrew Pinski <apinski@cavium.com>
> 
> On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
> instructions may cause the icache to become invalid if it contains
> data for a non-current ASID.
> 
> This patch implements the workaround (which flushes the local icache
> when switching the mm) by using code patching.
> 
> Signed-off-by: Andrew Pinski <apinski@cavium.com>
> Signed-off-by: David Daney <david.daney@cavium.com>
> ---
>  arch/arm64/Kconfig                  | 11 +++++++++++
>  arch/arm64/include/asm/cpufeature.h |  3 ++-
>  arch/arm64/kernel/cpu_errata.c      |  9 +++++++++
>  arch/arm64/mm/proc.S                | 12 ++++++++++++
>  4 files changed, 34 insertions(+), 1 deletion(-)

It would be good to update Documentation/arm64/silicon-errata.txt to
reflect the fact that there is a workaround available for this erratum.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny.

  reply	other threads:[~2016-02-09 19:52 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-09 19:29 [PATCH] arm64: Add workaround for Cavium erratum 27456 David Daney
2016-02-09 19:29 ` David Daney
2016-02-09 19:52 ` Marc Zyngier [this message]
2016-02-09 19:52   ` Marc Zyngier
2016-02-09 19:59   ` David Daney
2016-02-09 19:59     ` David Daney
2016-02-09 20:07     ` Marc Zyngier
2016-02-09 20:07       ` Marc Zyngier
2016-02-10  9:28 ` Will Deacon
2016-02-10  9:28   ` Will Deacon
2016-02-10 18:08   ` David Daney
2016-02-10 18:08     ` David Daney
2016-02-10 18:15     ` Will Deacon
2016-02-10 18:15       ` Will Deacon
2016-02-10 18:42       ` David Daney
2016-02-10 18:42         ` David Daney
2016-02-11 13:07         ` Will Deacon
2016-02-11 13:07           ` Will Deacon

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