From: Christopher Covington <cov@codeaurora.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>,
"Christoffer Dall" <christoffer.dall@linaro.org>,
"Marc Zyngier" <marc.zyngier@arm.com>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will.deacon@arm.com>,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
shankerd@codeaurora.org, timur@codeaurora.org
Cc: Mark Langsdorf <mlangsdo@redhat.com>,
Mark Salter <msalter@redhat.com>, Jon Masters <jcm@redhat.com>,
Neil Leeder <nleeder@codeaurora.org>,
Christopher Covington <cov@codeaurora.org>
Subject: [PATCH v4 3/4] arm64: Use __tlbi() macros in KVM code
Date: Wed, 25 Jan 2017 10:52:31 -0500 [thread overview]
Message-ID: <20170125155232.10277-3-cov@codeaurora.org> (raw)
In-Reply-To: <20170125155232.10277-1-cov@codeaurora.org>
Refactor the KVM code to use the __tlbi macros, which will allow an errata
workaround that repeats tlbi dsb sequences to only change one location.
This is not intended to change the generated assembly and comparing before
and after vmlinux objdump shows no functional changes.
Signed-off-by: Christopher Covington <cov@codeaurora.org>
---
arch/arm64/kvm/hyp/tlb.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c
index 88e2f2b938f0..e8e7ba2bc11f 100644
--- a/arch/arm64/kvm/hyp/tlb.c
+++ b/arch/arm64/kvm/hyp/tlb.c
@@ -16,6 +16,7 @@
*/
#include <asm/kvm_hyp.h>
+#include <asm/tlbflush.h>
void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
{
@@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
* whole of Stage-1. Weep...
*/
ipa >>= 12;
- asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa));
+ __tlbi(ipas2e1is, ipa);
/*
* We have to ensure completion of the invalidation at Stage-2,
@@ -41,7 +42,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
* the Stage-1 invalidation happened first.
*/
dsb(ish);
- asm volatile("tlbi vmalle1is" : : );
+ __tlbi(vmalle1is);
dsb(ish);
isb();
@@ -57,7 +58,7 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
write_sysreg(kvm->arch.vttbr, vttbr_el2);
isb();
- asm volatile("tlbi vmalls12e1is" : : );
+ __tlbi(vmalls12e1is);
dsb(ish);
isb();
@@ -72,7 +73,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
write_sysreg(kvm->arch.vttbr, vttbr_el2);
isb();
- asm volatile("tlbi vmalle1" : : );
+ __tlbi(vmalle1);
dsb(nsh);
isb();
@@ -82,7 +83,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
void __hyp_text __kvm_flush_vm_context(void)
{
dsb(ishst);
- asm volatile("tlbi alle1is \n"
- "ic ialluis ": : );
+ __tlbi(alle1is);
+ asm volatile("ic ialluis" : : );
dsb(ish);
}
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora
Forum, a Linux Foundation Collaborative Project.
WARNING: multiple messages have this Message-ID (diff)
From: Christopher Covington <cov@codeaurora.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>,
"Christoffer Dall" <christoffer.dall@linaro.org>,
"Marc Zyngier" <marc.zyngier@arm.com>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will.deacon@arm.com>,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
shankerd@codeaurora.org, timur@codeaurora.org
Cc: Jon Masters <jcm@redhat.com>,
Neil Leeder <nleeder@codeaurora.org>,
Mark Langsdorf <mlangsdo@redhat.com>
Subject: [PATCH v4 3/4] arm64: Use __tlbi() macros in KVM code
Date: Wed, 25 Jan 2017 10:52:31 -0500 [thread overview]
Message-ID: <20170125155232.10277-3-cov@codeaurora.org> (raw)
In-Reply-To: <20170125155232.10277-1-cov@codeaurora.org>
Refactor the KVM code to use the __tlbi macros, which will allow an errata
workaround that repeats tlbi dsb sequences to only change one location.
This is not intended to change the generated assembly and comparing before
and after vmlinux objdump shows no functional changes.
Signed-off-by: Christopher Covington <cov@codeaurora.org>
---
arch/arm64/kvm/hyp/tlb.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c
index 88e2f2b938f0..e8e7ba2bc11f 100644
--- a/arch/arm64/kvm/hyp/tlb.c
+++ b/arch/arm64/kvm/hyp/tlb.c
@@ -16,6 +16,7 @@
*/
#include <asm/kvm_hyp.h>
+#include <asm/tlbflush.h>
void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
{
@@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
* whole of Stage-1. Weep...
*/
ipa >>= 12;
- asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa));
+ __tlbi(ipas2e1is, ipa);
/*
* We have to ensure completion of the invalidation at Stage-2,
@@ -41,7 +42,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
* the Stage-1 invalidation happened first.
*/
dsb(ish);
- asm volatile("tlbi vmalle1is" : : );
+ __tlbi(vmalle1is);
dsb(ish);
isb();
@@ -57,7 +58,7 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
write_sysreg(kvm->arch.vttbr, vttbr_el2);
isb();
- asm volatile("tlbi vmalls12e1is" : : );
+ __tlbi(vmalls12e1is);
dsb(ish);
isb();
@@ -72,7 +73,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
write_sysreg(kvm->arch.vttbr, vttbr_el2);
isb();
- asm volatile("tlbi vmalle1" : : );
+ __tlbi(vmalle1);
dsb(nsh);
isb();
@@ -82,7 +83,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
void __hyp_text __kvm_flush_vm_context(void)
{
dsb(ishst);
- asm volatile("tlbi alle1is \n"
- "ic ialluis ": : );
+ __tlbi(alle1is);
+ asm volatile("ic ialluis" : : );
dsb(ish);
}
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora
Forum, a Linux Foundation Collaborative Project.
WARNING: multiple messages have this Message-ID (diff)
From: cov@codeaurora.org (Christopher Covington)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 3/4] arm64: Use __tlbi() macros in KVM code
Date: Wed, 25 Jan 2017 10:52:31 -0500 [thread overview]
Message-ID: <20170125155232.10277-3-cov@codeaurora.org> (raw)
In-Reply-To: <20170125155232.10277-1-cov@codeaurora.org>
Refactor the KVM code to use the __tlbi macros, which will allow an errata
workaround that repeats tlbi dsb sequences to only change one location.
This is not intended to change the generated assembly and comparing before
and after vmlinux objdump shows no functional changes.
Signed-off-by: Christopher Covington <cov@codeaurora.org>
---
arch/arm64/kvm/hyp/tlb.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c
index 88e2f2b938f0..e8e7ba2bc11f 100644
--- a/arch/arm64/kvm/hyp/tlb.c
+++ b/arch/arm64/kvm/hyp/tlb.c
@@ -16,6 +16,7 @@
*/
#include <asm/kvm_hyp.h>
+#include <asm/tlbflush.h>
void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
{
@@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
* whole of Stage-1. Weep...
*/
ipa >>= 12;
- asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa));
+ __tlbi(ipas2e1is, ipa);
/*
* We have to ensure completion of the invalidation at Stage-2,
@@ -41,7 +42,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
* the Stage-1 invalidation happened first.
*/
dsb(ish);
- asm volatile("tlbi vmalle1is" : : );
+ __tlbi(vmalle1is);
dsb(ish);
isb();
@@ -57,7 +58,7 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
write_sysreg(kvm->arch.vttbr, vttbr_el2);
isb();
- asm volatile("tlbi vmalls12e1is" : : );
+ __tlbi(vmalls12e1is);
dsb(ish);
isb();
@@ -72,7 +73,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
write_sysreg(kvm->arch.vttbr, vttbr_el2);
isb();
- asm volatile("tlbi vmalle1" : : );
+ __tlbi(vmalle1);
dsb(nsh);
isb();
@@ -82,7 +83,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
void __hyp_text __kvm_flush_vm_context(void)
{
dsb(ishst);
- asm volatile("tlbi alle1is \n"
- "ic ialluis ": : );
+ __tlbi(alle1is);
+ asm volatile("ic ialluis" : : );
dsb(ish);
}
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora
Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2017-01-25 15:52 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-25 15:52 [PATCH v4 1/4] arm64: Define Falkor v1 CPU Christopher Covington
2017-01-25 15:52 ` Christopher Covington
2017-01-25 15:52 ` Christopher Covington
2017-01-25 15:52 ` [PATCH v4 2/4] arm64: Work around Falkor erratum 1003 Christopher Covington
2017-01-25 15:52 ` Christopher Covington
2017-01-25 15:52 ` Christopher Covington
2017-01-27 14:38 ` Mark Rutland
2017-01-27 14:38 ` Mark Rutland
2017-01-27 14:38 ` Mark Rutland
2017-01-27 14:43 ` Mark Rutland
2017-01-27 14:43 ` Mark Rutland
2017-01-27 14:43 ` Mark Rutland
2017-01-27 21:52 ` Christopher Covington
2017-01-27 21:52 ` Christopher Covington
2017-01-27 21:52 ` Christopher Covington
2017-01-30 10:56 ` Mark Rutland
2017-01-30 10:56 ` Mark Rutland
2017-01-30 10:56 ` Mark Rutland
2017-01-30 22:09 ` Christopher Covington
2017-01-30 22:09 ` Christopher Covington
2017-01-30 22:09 ` Christopher Covington
2017-01-27 19:18 ` Timur Tabi
2017-01-27 19:18 ` Timur Tabi
2017-01-27 19:18 ` Timur Tabi
2017-01-31 12:37 ` Mark Rutland
2017-01-31 12:37 ` Mark Rutland
2017-01-31 12:37 ` Mark Rutland
2017-01-31 17:48 ` Christopher Covington
2017-01-31 17:48 ` Christopher Covington
2017-01-31 17:48 ` Christopher Covington
2017-01-31 17:56 ` Marc Zyngier
2017-01-31 17:56 ` Marc Zyngier
2017-01-31 17:56 ` Marc Zyngier
2017-02-01 16:29 ` Christopher Covington
2017-02-01 16:29 ` Christopher Covington
2017-02-01 16:33 ` Will Deacon
2017-02-01 16:33 ` Will Deacon
2017-02-01 16:33 ` Will Deacon
2017-02-01 17:36 ` Catalin Marinas
2017-02-01 17:36 ` Catalin Marinas
2017-02-01 17:41 ` Will Deacon
2017-02-01 17:41 ` Will Deacon
2017-02-01 17:41 ` Will Deacon
2017-02-01 17:49 ` Catalin Marinas
2017-02-01 17:49 ` Catalin Marinas
2017-02-01 17:49 ` Catalin Marinas
2017-02-01 17:51 ` Catalin Marinas
2017-02-01 17:51 ` Catalin Marinas
2017-02-01 17:59 ` Will Deacon
2017-02-01 17:59 ` Will Deacon
2017-02-01 18:22 ` Catalin Marinas
2017-02-01 18:22 ` Catalin Marinas
2017-02-01 18:34 ` Will Deacon
2017-02-01 18:34 ` Will Deacon
2017-02-01 18:34 ` Will Deacon
2017-02-01 18:38 ` Catalin Marinas
2017-02-01 18:38 ` Catalin Marinas
2017-02-08 0:36 ` Christopher Covington
2017-02-08 0:36 ` Christopher Covington
2017-02-08 0:36 ` Christopher Covington
2017-01-25 15:52 ` Christopher Covington [this message]
2017-01-25 15:52 ` [PATCH v4 3/4] arm64: Use __tlbi() macros in KVM code Christopher Covington
2017-01-25 15:52 ` Christopher Covington
2017-01-25 19:39 ` Christoffer Dall
2017-01-25 19:39 ` Christoffer Dall
2017-01-27 13:53 ` Will Deacon
2017-01-27 13:53 ` Will Deacon
2017-01-27 13:53 ` Will Deacon
2017-02-01 17:02 ` Punit Agrawal
2017-02-01 17:02 ` Punit Agrawal
2017-02-01 17:02 ` Punit Agrawal
2017-02-01 17:08 ` Will Deacon
2017-02-01 17:08 ` Will Deacon
2017-02-01 17:08 ` Will Deacon
2017-02-01 17:14 ` Punit Agrawal
2017-02-01 17:14 ` Punit Agrawal
2017-02-01 17:14 ` Punit Agrawal
2017-01-27 15:03 ` Will Deacon
2017-01-27 15:03 ` Will Deacon
2017-01-27 15:03 ` Will Deacon
2017-01-25 15:52 ` [PATCH v4 4/4] arm64: Work around Falkor erratum 1009 Christopher Covington
2017-01-25 15:52 ` Christopher Covington
2017-01-25 15:52 ` Christopher Covington
2017-01-27 15:07 ` Will Deacon
2017-01-27 15:07 ` Will Deacon
2017-01-27 15:07 ` Will Deacon
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