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From: Jerome Brunet <jbrunet@baylibre.com>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Carlo Caione <carlo@caione.org>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
	linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 6/9] clk: meson: gxbb: mpll: use rw operation
Date: Thu,  9 Mar 2017 11:41:51 +0100	[thread overview]
Message-ID: <20170309104154.28295-7-jbrunet@baylibre.com> (raw)
In-Reply-To: <20170309104154.28295-1-jbrunet@baylibre.com>

Use read/write operations for the mpll clocks instead of the
read-only ones.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/gxbb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 79fb8989f8dd..5059c7bbdbb3 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -459,7 +459,7 @@ static struct meson_clk_mpll gxbb_mpll0 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll0",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
@@ -489,7 +489,7 @@ static struct meson_clk_mpll gxbb_mpll1 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll1",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
@@ -519,7 +519,7 @@ static struct meson_clk_mpll gxbb_mpll2 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll2",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
-- 
2.9.3

WARNING: multiple messages have this Message-ID (diff)
From: jbrunet@baylibre.com (Jerome Brunet)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2 6/9] clk: meson: gxbb: mpll: use rw operation
Date: Thu,  9 Mar 2017 11:41:51 +0100	[thread overview]
Message-ID: <20170309104154.28295-7-jbrunet@baylibre.com> (raw)
In-Reply-To: <20170309104154.28295-1-jbrunet@baylibre.com>

Use read/write operations for the mpll clocks instead of the
read-only ones.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/gxbb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 79fb8989f8dd..5059c7bbdbb3 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -459,7 +459,7 @@ static struct meson_clk_mpll gxbb_mpll0 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll0",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
@@ -489,7 +489,7 @@ static struct meson_clk_mpll gxbb_mpll1 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll1",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
@@ -519,7 +519,7 @@ static struct meson_clk_mpll gxbb_mpll2 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll2",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
-- 
2.9.3

  parent reply	other threads:[~2017-03-09 10:50 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-09 10:41 [PATCH v2 0/9] clk: meson: update clock controller for audio support Jerome Brunet
2017-03-09 10:41 ` Jerome Brunet
2017-03-09 10:41 ` [PATCH v2 1/9] clk: meson: fix SET_PARM macro Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-09 10:41 ` [PATCH v2 2/9] clk: meson: add missing const qualifiers on gate arrays Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-09 10:41 ` [PATCH v2 3/9] clk: meson8b: put dividers and muxes in tables Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-21 23:10   ` Michael Turquette
2017-03-21 23:10     ` Michael Turquette
2017-03-21 23:10     ` Michael Turquette
2017-03-09 10:41 ` [PATCH v2 4/9] clk: gxbb: " Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-21 23:10   ` Michael Turquette
2017-03-21 23:10     ` Michael Turquette
2017-03-21 23:10     ` Michael Turquette
2017-03-09 10:41 ` [PATCH v2 5/9] clk: meson: mpll: add rw operation Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-21 23:19   ` Michael Turquette
2017-03-21 23:19     ` Michael Turquette
2017-03-21 23:19     ` Michael Turquette
2017-03-09 10:41 ` Jerome Brunet [this message]
2017-03-09 10:41   ` [PATCH v2 6/9] clk: meson: gxbb: mpll: use " Jerome Brunet
2017-03-21 23:20   ` Michael Turquette
2017-03-21 23:20     ` Michael Turquette
2017-03-21 23:20     ` Michael Turquette
2017-03-09 10:41 ` [PATCH v2 7/9] clk: meson8b: add the mplls clocks 0, 1 and 2 Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-21 23:21   ` Michael Turquette
2017-03-21 23:21     ` Michael Turquette
2017-03-21 23:21     ` Michael Turquette
2017-03-09 10:41 ` [PATCH v2 8/9] clk: meson: mpll: correct N2 maximum value Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-09 10:41 ` [PATCH v2 9/9] dt-bindings: clk: gxbb: expose i2s output clock gates Jerome Brunet
2017-03-09 10:41   ` Jerome Brunet
2017-03-11  0:39 ` [PATCH v2 0/9] clk: meson: update clock controller for audio support Kevin Hilman
2017-03-11  0:39   ` Kevin Hilman
2017-03-11  0:39   ` Kevin Hilman
2017-03-27 19:52   ` Michael Turquette
2017-03-27 19:52     ` Michael Turquette
2017-03-27 19:52     ` Michael Turquette
2017-03-27 19:52     ` Michael Turquette

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