* [PATCH] Use LRU mapping policy for SDMA engines
@ 2017-03-17 18:52 Andres Rodriguez
[not found] ` <20170317185249.2952-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 8+ messages in thread
From: Andres Rodriguez @ 2017-03-17 18:52 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q, andresx7-Re5JQEeQqe8AvxtiuMwx3w
Previously we discussed some issues with applying the LRU mapping policy
to the SDMA engines. Mainly, if both ring ids end up aliased to the same
HW block, the total transfer bandwith an application can achieve will be
severely impacted. E.g. an app uses one SDMA ring for upload and one for
download.
This small series prevents ring id aliasing and enables LRU mapping for the
DMA ip blocks.
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^ permalink raw reply [flat|nested] 8+ messages in thread[parent not found: <20170317185249.2952-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU [not found] ` <20170317185249.2952-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2017-03-17 18:52 ` Andres Rodriguez [not found] ` <20170317185249.2952-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2017-03-17 18:52 ` [PATCH 2/2] drm/amdgpu: use LRU mapping policy for SDMA engines Andres Rodriguez 1 sibling, 1 reply; 8+ messages in thread From: Andres Rodriguez @ 2017-03-17 18:52 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q, andresx7-Re5JQEeQqe8AvxtiuMwx3w Depending on usage patterns, the current LRU policy may create a non-injective mapping between userspace ring ids and kernel rings. This behaviour is undesired as apps that attempt to fill all HW blocks would be unable to reach some of them. This change forces the LRU policy to create bijective mappings only. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 15 ++++++++++-- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 33 +++++++++++++++++++++------ drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- 3 files changed, 41 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c index 054d750..2cffb0e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c @@ -108,24 +108,35 @@ static enum amdgpu_ring_type amdgpu_hw_ip_to_ring_type(int hw_ip) DRM_ERROR("Invalid HW IP specified %d\n", hw_ip); return -1; } } static int amdgpu_lru_map(struct amdgpu_device *adev, struct amdgpu_queue_mapper *mapper, int user_ring, struct amdgpu_ring **out_ring) { - int r; + int r, i; int ring_type = amdgpu_hw_ip_to_ring_type(mapper->hw_ip); + int ring_blacklist[AMDGPU_MAX_RINGS]; + struct amdgpu_ring *ring; + + for (i = 0; i < AMDGPU_MAX_RINGS; i++) { + ring = mapper->queue_map[i]; + if (!ring) + ring_blacklist[i] = -1; + else + ring_blacklist[i] = ring->idx; + } - r = amdgpu_ring_lru_get(adev, ring_type, out_ring); + r = amdgpu_ring_lru_get(adev, ring_type, ring_blacklist, + AMDGPU_MAX_RINGS, out_ring); if (r) return r; return amdgpu_update_cached_map(mapper, user_ring, *out_ring); } /** * amdgpu_queue_mgr_init - init an amdgpu_queue_mgr struct * * @adev: amdgpu_device pointer diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c index ca41b3a..0db07b0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c @@ -393,46 +393,65 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring) ring->adev->rings[ring->idx] = NULL; } static void amdgpu_ring_lru_touch_locked(struct amdgpu_device *adev, struct amdgpu_ring *ring) { /* list_move_tail handles the case where ring isn't part of the list */ list_move_tail(&ring->lru_list, &adev->ring_lru_list); } +static bool amdgpu_ring_is_blacklisted(struct amdgpu_ring *ring, + int *blacklist, int num_blacklist) +{ + int i; + + for (i = 0; i < num_blacklist; i++) { + if (ring->idx == blacklist[i]) + return true; + } + + return false; +} + /** * amdgpu_ring_lru_get - get the least recently used ring for a HW IP block * * @adev: amdgpu_device pointer * @type: amdgpu_ring_type enum + * @blacklist: blacklisted ring ids array + * @num_blacklist: number of entries in @blacklist * @ring: output ring * * Retrieve the amdgpu_ring structure for the least recently used ring of * a specific IP block (all asics). * Returns 0 on success, error on failure. */ -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, - struct amdgpu_ring **ring) +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, + int num_blacklist, struct amdgpu_ring **ring) { struct amdgpu_ring *entry; /* List is sorted in LRU order, find first entry corresponding * to the desired HW IP */ *ring = NULL; spin_lock(&adev->ring_lru_list_lock); list_for_each_entry(entry, &adev->ring_lru_list, lru_list) { - if (entry->funcs->type == type) { - *ring = entry; - amdgpu_ring_lru_touch_locked(adev, *ring); - break; - } + if (entry->funcs->type != type) + continue; + + if (amdgpu_ring_is_blacklisted(entry, blacklist, num_blacklist)) + continue; + + *ring = entry; + amdgpu_ring_lru_touch_locked(adev, *ring); + break; } spin_unlock(&adev->ring_lru_list_lock); if (!*ring) { DRM_ERROR("Ring LRU contains no entries for ring type:%d\n", type); return -EINVAL; } return 0; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 2c801a5..811d76a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -195,15 +195,15 @@ void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib); void amdgpu_ring_commit(struct amdgpu_ring *ring); void amdgpu_ring_undo(struct amdgpu_ring *ring); int amdgpu_ring_priority_get(struct amdgpu_ring *ring, enum amd_sched_priority priority); void amdgpu_ring_priority_put(struct amdgpu_ring *ring, enum amd_sched_priority priority); int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned ring_size, struct amdgpu_irq_src *irq_src, unsigned irq_type); void amdgpu_ring_fini(struct amdgpu_ring *ring); -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int hw_ip, - struct amdgpu_ring **ring); +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, + int num_blacklist, struct amdgpu_ring **ring); void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring); #endif -- 2.9.3 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
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* Re: [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU [not found] ` <20170317185249.2952-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2017-03-23 12:02 ` Nicolai Hähnle [not found] ` <0d2d7a16-2666-eb6a-aca9-814a49969f89-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 0 siblings, 1 reply; 8+ messages in thread From: Nicolai Hähnle @ 2017-03-23 12:02 UTC (permalink / raw) To: Andres Rodriguez, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q On 17.03.2017 19:52, Andres Rodriguez wrote: > Depending on usage patterns, the current LRU policy may create a > non-injective mapping between userspace ring ids and kernel rings. > > This behaviour is undesired as apps that attempt to fill all HW blocks > would be unable to reach some of them. > > This change forces the LRU policy to create bijective mappings only. > > Signed-off-by: Andres Rodriguez <andresx7@gmail.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 15 ++++++++++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 33 +++++++++++++++++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > 3 files changed, 41 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > index 054d750..2cffb0e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > @@ -108,24 +108,35 @@ static enum amdgpu_ring_type amdgpu_hw_ip_to_ring_type(int hw_ip) > DRM_ERROR("Invalid HW IP specified %d\n", hw_ip); > return -1; > } > } > > static int amdgpu_lru_map(struct amdgpu_device *adev, > struct amdgpu_queue_mapper *mapper, > int user_ring, > struct amdgpu_ring **out_ring) > { > - int r; > + int r, i; > int ring_type = amdgpu_hw_ip_to_ring_type(mapper->hw_ip); > + int ring_blacklist[AMDGPU_MAX_RINGS]; > + struct amdgpu_ring *ring; > + > + for (i = 0; i < AMDGPU_MAX_RINGS; i++) { > + ring = mapper->queue_map[i]; > + if (!ring) > + ring_blacklist[i] = -1; > + else > + ring_blacklist[i] = ring->idx; > + } Given how ring_blacklist is used, I'd suggest to "compress" its entries instead of introducing -1 gaps. The rest of the patch looks good to me. Cheers, Nicolai > > - r = amdgpu_ring_lru_get(adev, ring_type, out_ring); > + r = amdgpu_ring_lru_get(adev, ring_type, ring_blacklist, > + AMDGPU_MAX_RINGS, out_ring); > if (r) > return r; > > return amdgpu_update_cached_map(mapper, user_ring, *out_ring); > } > > /** > * amdgpu_queue_mgr_init - init an amdgpu_queue_mgr struct > * > * @adev: amdgpu_device pointer > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > index ca41b3a..0db07b0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > @@ -393,46 +393,65 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring) > ring->adev->rings[ring->idx] = NULL; > } > > static void amdgpu_ring_lru_touch_locked(struct amdgpu_device *adev, > struct amdgpu_ring *ring) > { > /* list_move_tail handles the case where ring isn't part of the list */ > list_move_tail(&ring->lru_list, &adev->ring_lru_list); > } > > +static bool amdgpu_ring_is_blacklisted(struct amdgpu_ring *ring, > + int *blacklist, int num_blacklist) > +{ > + int i; > + > + for (i = 0; i < num_blacklist; i++) { > + if (ring->idx == blacklist[i]) > + return true; > + } > + > + return false; > +} > + > /** > * amdgpu_ring_lru_get - get the least recently used ring for a HW IP block > * > * @adev: amdgpu_device pointer > * @type: amdgpu_ring_type enum > + * @blacklist: blacklisted ring ids array > + * @num_blacklist: number of entries in @blacklist > * @ring: output ring > * > * Retrieve the amdgpu_ring structure for the least recently used ring of > * a specific IP block (all asics). > * Returns 0 on success, error on failure. > */ > -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, > - struct amdgpu_ring **ring) > +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, > + int num_blacklist, struct amdgpu_ring **ring) > { > struct amdgpu_ring *entry; > > /* List is sorted in LRU order, find first entry corresponding > * to the desired HW IP */ > *ring = NULL; > spin_lock(&adev->ring_lru_list_lock); > list_for_each_entry(entry, &adev->ring_lru_list, lru_list) { > - if (entry->funcs->type == type) { > - *ring = entry; > - amdgpu_ring_lru_touch_locked(adev, *ring); > - break; > - } > + if (entry->funcs->type != type) > + continue; > + > + if (amdgpu_ring_is_blacklisted(entry, blacklist, num_blacklist)) > + continue; > + > + *ring = entry; > + amdgpu_ring_lru_touch_locked(adev, *ring); > + break; > } > spin_unlock(&adev->ring_lru_list_lock); > > if (!*ring) { > DRM_ERROR("Ring LRU contains no entries for ring type:%d\n", type); > return -EINVAL; > } > > return 0; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 2c801a5..811d76a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -195,15 +195,15 @@ void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib); > void amdgpu_ring_commit(struct amdgpu_ring *ring); > void amdgpu_ring_undo(struct amdgpu_ring *ring); > int amdgpu_ring_priority_get(struct amdgpu_ring *ring, > enum amd_sched_priority priority); > void amdgpu_ring_priority_put(struct amdgpu_ring *ring, > enum amd_sched_priority priority); > int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, > unsigned ring_size, struct amdgpu_irq_src *irq_src, > unsigned irq_type); > void amdgpu_ring_fini(struct amdgpu_ring *ring); > -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int hw_ip, > - struct amdgpu_ring **ring); > +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, > + int num_blacklist, struct amdgpu_ring **ring); > void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring); > > #endif > -- Lerne, wie die Welt wirklich ist, Aber vergiss niemals, wie sie sein sollte. _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
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* Re: [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU [not found] ` <0d2d7a16-2666-eb6a-aca9-814a49969f89-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2017-03-27 22:35 ` Andres Rodriguez 0 siblings, 0 replies; 8+ messages in thread From: Andres Rodriguez @ 2017-03-27 22:35 UTC (permalink / raw) To: Nicolai Hähnle, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q On 2017-03-23 08:02 AM, Nicolai Hähnle wrote: > On 17.03.2017 19:52, Andres Rodriguez wrote: >> Depending on usage patterns, the current LRU policy may create a >> non-injective mapping between userspace ring ids and kernel rings. >> >> This behaviour is undesired as apps that attempt to fill all HW blocks >> would be unable to reach some of them. >> >> This change forces the LRU policy to create bijective mappings only. >> >> Signed-off-by: Andres Rodriguez <andresx7@gmail.com> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 15 ++++++++++-- >> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 33 >> +++++++++++++++++++++------ >> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- >> 3 files changed, 41 insertions(+), 11 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c >> index 054d750..2cffb0e 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c >> @@ -108,24 +108,35 @@ static enum amdgpu_ring_type >> amdgpu_hw_ip_to_ring_type(int hw_ip) >> DRM_ERROR("Invalid HW IP specified %d\n", hw_ip); >> return -1; >> } >> } >> >> static int amdgpu_lru_map(struct amdgpu_device *adev, >> struct amdgpu_queue_mapper *mapper, >> int user_ring, >> struct amdgpu_ring **out_ring) >> { >> - int r; >> + int r, i; >> int ring_type = amdgpu_hw_ip_to_ring_type(mapper->hw_ip); >> + int ring_blacklist[AMDGPU_MAX_RINGS]; >> + struct amdgpu_ring *ring; >> + >> + for (i = 0; i < AMDGPU_MAX_RINGS; i++) { >> + ring = mapper->queue_map[i]; >> + if (!ring) >> + ring_blacklist[i] = -1; >> + else >> + ring_blacklist[i] = ring->idx; >> + } > > Given how ring_blacklist is used, I'd suggest to "compress" its > entries instead of introducing -1 gaps. > > The rest of the patch looks good to me. > > Cheers, > Nicolai > Can do. > >> >> - r = amdgpu_ring_lru_get(adev, ring_type, out_ring); >> + r = amdgpu_ring_lru_get(adev, ring_type, ring_blacklist, >> + AMDGPU_MAX_RINGS, out_ring); >> if (r) >> return r; >> >> return amdgpu_update_cached_map(mapper, user_ring, *out_ring); >> } >> >> /** >> * amdgpu_queue_mgr_init - init an amdgpu_queue_mgr struct >> * >> * @adev: amdgpu_device pointer >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c >> index ca41b3a..0db07b0 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c >> @@ -393,46 +393,65 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring) >> ring->adev->rings[ring->idx] = NULL; >> } >> >> static void amdgpu_ring_lru_touch_locked(struct amdgpu_device *adev, >> struct amdgpu_ring *ring) >> { >> /* list_move_tail handles the case where ring isn't part of the >> list */ >> list_move_tail(&ring->lru_list, &adev->ring_lru_list); >> } >> >> +static bool amdgpu_ring_is_blacklisted(struct amdgpu_ring *ring, >> + int *blacklist, int num_blacklist) >> +{ >> + int i; >> + >> + for (i = 0; i < num_blacklist; i++) { >> + if (ring->idx == blacklist[i]) >> + return true; >> + } >> + >> + return false; >> +} >> + >> /** >> * amdgpu_ring_lru_get - get the least recently used ring for a HW >> IP block >> * >> * @adev: amdgpu_device pointer >> * @type: amdgpu_ring_type enum >> + * @blacklist: blacklisted ring ids array >> + * @num_blacklist: number of entries in @blacklist >> * @ring: output ring >> * >> * Retrieve the amdgpu_ring structure for the least recently used >> ring of >> * a specific IP block (all asics). >> * Returns 0 on success, error on failure. >> */ >> -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, >> - struct amdgpu_ring **ring) >> +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int >> *blacklist, >> + int num_blacklist, struct amdgpu_ring **ring) >> { >> struct amdgpu_ring *entry; >> >> /* List is sorted in LRU order, find first entry corresponding >> * to the desired HW IP */ >> *ring = NULL; >> spin_lock(&adev->ring_lru_list_lock); >> list_for_each_entry(entry, &adev->ring_lru_list, lru_list) { >> - if (entry->funcs->type == type) { >> - *ring = entry; >> - amdgpu_ring_lru_touch_locked(adev, *ring); >> - break; >> - } >> + if (entry->funcs->type != type) >> + continue; >> + >> + if (amdgpu_ring_is_blacklisted(entry, blacklist, >> num_blacklist)) >> + continue; >> + >> + *ring = entry; >> + amdgpu_ring_lru_touch_locked(adev, *ring); >> + break; >> } >> spin_unlock(&adev->ring_lru_list_lock); >> >> if (!*ring) { >> DRM_ERROR("Ring LRU contains no entries for ring type:%d\n", >> type); >> return -EINVAL; >> } >> >> return 0; >> } >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> index 2c801a5..811d76a 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h >> @@ -195,15 +195,15 @@ void amdgpu_ring_generic_pad_ib(struct >> amdgpu_ring *ring, struct amdgpu_ib *ib); >> void amdgpu_ring_commit(struct amdgpu_ring *ring); >> void amdgpu_ring_undo(struct amdgpu_ring *ring); >> int amdgpu_ring_priority_get(struct amdgpu_ring *ring, >> enum amd_sched_priority priority); >> void amdgpu_ring_priority_put(struct amdgpu_ring *ring, >> enum amd_sched_priority priority); >> int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring >> *ring, >> unsigned ring_size, struct amdgpu_irq_src *irq_src, >> unsigned irq_type); >> void amdgpu_ring_fini(struct amdgpu_ring *ring); >> -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int hw_ip, >> - struct amdgpu_ring **ring); >> +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int >> *blacklist, >> + int num_blacklist, struct amdgpu_ring **ring); >> void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct >> amdgpu_ring *ring); >> >> #endif >> > > _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/amdgpu: use LRU mapping policy for SDMA engines [not found] ` <20170317185249.2952-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2017-03-17 18:52 ` [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU Andres Rodriguez @ 2017-03-17 18:52 ` Andres Rodriguez 1 sibling, 0 replies; 8+ messages in thread From: Andres Rodriguez @ 2017-03-17 18:52 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q, andresx7-Re5JQEeQqe8AvxtiuMwx3w Spreading the load across multiple SDMA engines can increase memory transfer performance. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c index 2cffb0e..3243f1a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c @@ -250,25 +250,25 @@ int amdgpu_queue_mgr_map(struct amdgpu_device *adev, *out_ring = amdgpu_get_cached_map(mapper, ring); if (*out_ring) { /* cache hit */ r = 0; goto out_unlock; } switch (mapper->hw_ip) { case AMDGPU_HW_IP_GFX: - case AMDGPU_HW_IP_DMA: case AMDGPU_HW_IP_UVD: case AMDGPU_HW_IP_VCE: r = amdgpu_identity_map(adev, mapper, ring, out_ring); break; + case AMDGPU_HW_IP_DMA: case AMDGPU_HW_IP_COMPUTE: r = amdgpu_lru_map(adev, mapper, ring, out_ring); break; default: *out_ring = NULL; r = -EINVAL; DRM_ERROR("unknown HW IP type: %d\n", mapper->hw_ip); } out_unlock: -- 2.9.3 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH] Use LRU mapping policy for SDMA engines v2
@ 2017-03-27 22:36 Andres Rodriguez
[not found] ` <20170327223607.2878-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 8+ messages in thread
From: Andres Rodriguez @ 2017-03-27 22:36 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q,
nhaehnle-Re5JQEeQqe8AvxtiuMwx3w, andresx7-Re5JQEeQqe8AvxtiuMwx3w
Previously we discussed some issues with applying the LRU mapping policy
to the SDMA engines. Mainly, if both ring ids end up aliased to the same
HW block, the total transfer bandwith an application can achieve will be
severely impacted. E.g. an app uses one SDMA ring for upload and one for
download.
This small series prevents ring id aliasing and enables LRU mapping for the
DMA ip blocks.
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread[parent not found: <20170327223607.2878-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU [not found] ` <20170327223607.2878-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2017-03-27 22:36 ` Andres Rodriguez [not found] ` <20170327223607.2878-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 0 siblings, 1 reply; 8+ messages in thread From: Andres Rodriguez @ 2017-03-27 22:36 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q, nhaehnle-Re5JQEeQqe8AvxtiuMwx3w, andresx7-Re5JQEeQqe8AvxtiuMwx3w Depending on usage patterns, the current LRU policy may create a non-injective mapping between userspace ring ids and kernel rings. This behaviour is undesired as apps that attempt to fill all HW blocks would be unable to reach some of them. This change forces the LRU policy to create bijective mappings only. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 16 +++++++++++-- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 33 +++++++++++++++++++++------ drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- 3 files changed, 42 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c index 054d750..c6275b4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c @@ -108,24 +108,36 @@ static enum amdgpu_ring_type amdgpu_hw_ip_to_ring_type(int hw_ip) DRM_ERROR("Invalid HW IP specified %d\n", hw_ip); return -1; } } static int amdgpu_lru_map(struct amdgpu_device *adev, struct amdgpu_queue_mapper *mapper, int user_ring, struct amdgpu_ring **out_ring) { - int r; + int r, i, j; int ring_type = amdgpu_hw_ip_to_ring_type(mapper->hw_ip); + int ring_blacklist[AMDGPU_MAX_RINGS]; + struct amdgpu_ring *ring; - r = amdgpu_ring_lru_get(adev, ring_type, out_ring); + /* 0 is a valid ring index, so initialize to -1 */ + memset(ring_blacklist, 0xff, sizeof(ring_blacklist)); + + for (i = 0, j = 0; i < AMDGPU_MAX_RINGS; i++) { + ring = mapper->queue_map[i]; + if (ring) + ring_blacklist[j++] = ring->idx; + } + + r = amdgpu_ring_lru_get(adev, ring_type, ring_blacklist, + AMDGPU_MAX_RINGS, out_ring); if (r) return r; return amdgpu_update_cached_map(mapper, user_ring, *out_ring); } /** * amdgpu_queue_mgr_init - init an amdgpu_queue_mgr struct * * @adev: amdgpu_device pointer diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c index ca41b3a..22c5b28 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c @@ -393,46 +393,65 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring) ring->adev->rings[ring->idx] = NULL; } static void amdgpu_ring_lru_touch_locked(struct amdgpu_device *adev, struct amdgpu_ring *ring) { /* list_move_tail handles the case where ring isn't part of the list */ list_move_tail(&ring->lru_list, &adev->ring_lru_list); } +static bool amdgpu_ring_is_blacklisted(struct amdgpu_ring *ring, + int *blacklist, int num_blacklist) +{ + int i; + + for (i = 0; i < num_blacklist && blacklist[i] != -1; i++) { + if (ring->idx == blacklist[i]) + return true; + } + + return false; +} + /** * amdgpu_ring_lru_get - get the least recently used ring for a HW IP block * * @adev: amdgpu_device pointer * @type: amdgpu_ring_type enum + * @blacklist: blacklisted ring ids array + * @num_blacklist: number of entries in @blacklist * @ring: output ring * * Retrieve the amdgpu_ring structure for the least recently used ring of * a specific IP block (all asics). * Returns 0 on success, error on failure. */ -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, - struct amdgpu_ring **ring) +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, + int num_blacklist, struct amdgpu_ring **ring) { struct amdgpu_ring *entry; /* List is sorted in LRU order, find first entry corresponding * to the desired HW IP */ *ring = NULL; spin_lock(&adev->ring_lru_list_lock); list_for_each_entry(entry, &adev->ring_lru_list, lru_list) { - if (entry->funcs->type == type) { - *ring = entry; - amdgpu_ring_lru_touch_locked(adev, *ring); - break; - } + if (entry->funcs->type != type) + continue; + + if (amdgpu_ring_is_blacklisted(entry, blacklist, num_blacklist)) + continue; + + *ring = entry; + amdgpu_ring_lru_touch_locked(adev, *ring); + break; } spin_unlock(&adev->ring_lru_list_lock); if (!*ring) { DRM_ERROR("Ring LRU contains no entries for ring type:%d\n", type); return -EINVAL; } return 0; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 2c801a5..811d76a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -195,15 +195,15 @@ void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib); void amdgpu_ring_commit(struct amdgpu_ring *ring); void amdgpu_ring_undo(struct amdgpu_ring *ring); int amdgpu_ring_priority_get(struct amdgpu_ring *ring, enum amd_sched_priority priority); void amdgpu_ring_priority_put(struct amdgpu_ring *ring, enum amd_sched_priority priority); int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned ring_size, struct amdgpu_irq_src *irq_src, unsigned irq_type); void amdgpu_ring_fini(struct amdgpu_ring *ring); -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int hw_ip, - struct amdgpu_ring **ring); +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, + int num_blacklist, struct amdgpu_ring **ring); void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring); #endif -- 2.9.3 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
[parent not found: <20170327223607.2878-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU [not found] ` <20170327223607.2878-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2017-03-27 23:18 ` Andres Rodriguez 2017-03-28 15:22 ` Nicolai Hähnle 1 sibling, 0 replies; 8+ messages in thread From: Andres Rodriguez @ 2017-03-27 23:18 UTC (permalink / raw) To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q, nhaehnle-Re5JQEeQqe8AvxtiuMwx3w Forgot to add v2: compressed ring_blacklist (nha) On 2017-03-27 06:36 PM, Andres Rodriguez wrote: > Depending on usage patterns, the current LRU policy may create a > non-injective mapping between userspace ring ids and kernel rings. > > This behaviour is undesired as apps that attempt to fill all HW blocks > would be unable to reach some of them. > > This change forces the LRU policy to create bijective mappings only. > > Signed-off-by: Andres Rodriguez <andresx7@gmail.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 16 +++++++++++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 33 +++++++++++++++++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > 3 files changed, 42 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > index 054d750..c6275b4 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > @@ -108,24 +108,36 @@ static enum amdgpu_ring_type amdgpu_hw_ip_to_ring_type(int hw_ip) > DRM_ERROR("Invalid HW IP specified %d\n", hw_ip); > return -1; > } > } > > static int amdgpu_lru_map(struct amdgpu_device *adev, > struct amdgpu_queue_mapper *mapper, > int user_ring, > struct amdgpu_ring **out_ring) > { > - int r; > + int r, i, j; > int ring_type = amdgpu_hw_ip_to_ring_type(mapper->hw_ip); > + int ring_blacklist[AMDGPU_MAX_RINGS]; > + struct amdgpu_ring *ring; > > - r = amdgpu_ring_lru_get(adev, ring_type, out_ring); > + /* 0 is a valid ring index, so initialize to -1 */ > + memset(ring_blacklist, 0xff, sizeof(ring_blacklist)); > + > + for (i = 0, j = 0; i < AMDGPU_MAX_RINGS; i++) { > + ring = mapper->queue_map[i]; > + if (ring) > + ring_blacklist[j++] = ring->idx; > + } > + > + r = amdgpu_ring_lru_get(adev, ring_type, ring_blacklist, > + AMDGPU_MAX_RINGS, out_ring); > if (r) > return r; > > return amdgpu_update_cached_map(mapper, user_ring, *out_ring); > } > > /** > * amdgpu_queue_mgr_init - init an amdgpu_queue_mgr struct > * > * @adev: amdgpu_device pointer > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > index ca41b3a..22c5b28 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > @@ -393,46 +393,65 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring) > ring->adev->rings[ring->idx] = NULL; > } > > static void amdgpu_ring_lru_touch_locked(struct amdgpu_device *adev, > struct amdgpu_ring *ring) > { > /* list_move_tail handles the case where ring isn't part of the list */ > list_move_tail(&ring->lru_list, &adev->ring_lru_list); > } > > +static bool amdgpu_ring_is_blacklisted(struct amdgpu_ring *ring, > + int *blacklist, int num_blacklist) > +{ > + int i; > + > + for (i = 0; i < num_blacklist && blacklist[i] != -1; i++) { > + if (ring->idx == blacklist[i]) > + return true; > + } > + > + return false; > +} > + > /** > * amdgpu_ring_lru_get - get the least recently used ring for a HW IP block > * > * @adev: amdgpu_device pointer > * @type: amdgpu_ring_type enum > + * @blacklist: blacklisted ring ids array > + * @num_blacklist: number of entries in @blacklist > * @ring: output ring > * > * Retrieve the amdgpu_ring structure for the least recently used ring of > * a specific IP block (all asics). > * Returns 0 on success, error on failure. > */ > -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, > - struct amdgpu_ring **ring) > +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, > + int num_blacklist, struct amdgpu_ring **ring) > { > struct amdgpu_ring *entry; > > /* List is sorted in LRU order, find first entry corresponding > * to the desired HW IP */ > *ring = NULL; > spin_lock(&adev->ring_lru_list_lock); > list_for_each_entry(entry, &adev->ring_lru_list, lru_list) { > - if (entry->funcs->type == type) { > - *ring = entry; > - amdgpu_ring_lru_touch_locked(adev, *ring); > - break; > - } > + if (entry->funcs->type != type) > + continue; > + > + if (amdgpu_ring_is_blacklisted(entry, blacklist, num_blacklist)) > + continue; > + > + *ring = entry; > + amdgpu_ring_lru_touch_locked(adev, *ring); > + break; > } > spin_unlock(&adev->ring_lru_list_lock); > > if (!*ring) { > DRM_ERROR("Ring LRU contains no entries for ring type:%d\n", type); > return -EINVAL; > } > > return 0; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 2c801a5..811d76a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -195,15 +195,15 @@ void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib); > void amdgpu_ring_commit(struct amdgpu_ring *ring); > void amdgpu_ring_undo(struct amdgpu_ring *ring); > int amdgpu_ring_priority_get(struct amdgpu_ring *ring, > enum amd_sched_priority priority); > void amdgpu_ring_priority_put(struct amdgpu_ring *ring, > enum amd_sched_priority priority); > int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, > unsigned ring_size, struct amdgpu_irq_src *irq_src, > unsigned irq_type); > void amdgpu_ring_fini(struct amdgpu_ring *ring); > -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int hw_ip, > - struct amdgpu_ring **ring); > +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, > + int num_blacklist, struct amdgpu_ring **ring); > void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring); > > #endif > _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU [not found] ` <20170327223607.2878-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2017-03-27 23:18 ` Andres Rodriguez @ 2017-03-28 15:22 ` Nicolai Hähnle 1 sibling, 0 replies; 8+ messages in thread From: Nicolai Hähnle @ 2017-03-28 15:22 UTC (permalink / raw) To: Andres Rodriguez, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW Cc: deathsimple-ANTagKRnAhcb1SvskN2V4Q On 28.03.2017 00:36, Andres Rodriguez wrote: > Depending on usage patterns, the current LRU policy may create a > non-injective mapping between userspace ring ids and kernel rings. > > This behaviour is undesired as apps that attempt to fill all HW blocks > would be unable to reach some of them. > > This change forces the LRU policy to create bijective mappings only. > > Signed-off-by: Andres Rodriguez <andresx7@gmail.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 16 +++++++++++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 33 +++++++++++++++++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++-- > 3 files changed, 42 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > index 054d750..c6275b4 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c > @@ -108,24 +108,36 @@ static enum amdgpu_ring_type amdgpu_hw_ip_to_ring_type(int hw_ip) > DRM_ERROR("Invalid HW IP specified %d\n", hw_ip); > return -1; > } > } > > static int amdgpu_lru_map(struct amdgpu_device *adev, > struct amdgpu_queue_mapper *mapper, > int user_ring, > struct amdgpu_ring **out_ring) > { > - int r; > + int r, i, j; > int ring_type = amdgpu_hw_ip_to_ring_type(mapper->hw_ip); > + int ring_blacklist[AMDGPU_MAX_RINGS]; > + struct amdgpu_ring *ring; > > - r = amdgpu_ring_lru_get(adev, ring_type, out_ring); > + /* 0 is a valid ring index, so initialize to -1 */ > + memset(ring_blacklist, 0xff, sizeof(ring_blacklist)); Unless I'm mistaken, you don't need this if ... > + > + for (i = 0, j = 0; i < AMDGPU_MAX_RINGS; i++) { > + ring = mapper->queue_map[i]; > + if (ring) > + ring_blacklist[j++] = ring->idx; > + } > + > + r = amdgpu_ring_lru_get(adev, ring_type, ring_blacklist, > + AMDGPU_MAX_RINGS, out_ring); ... you s/AMDGPU_MAX_RINGS/j/ here. > if (r) > return r; > > return amdgpu_update_cached_map(mapper, user_ring, *out_ring); > } > > /** > * amdgpu_queue_mgr_init - init an amdgpu_queue_mgr struct > * > * @adev: amdgpu_device pointer > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > index ca41b3a..22c5b28 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > @@ -393,46 +393,65 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring) > ring->adev->rings[ring->idx] = NULL; > } > > static void amdgpu_ring_lru_touch_locked(struct amdgpu_device *adev, > struct amdgpu_ring *ring) > { > /* list_move_tail handles the case where ring isn't part of the list */ > list_move_tail(&ring->lru_list, &adev->ring_lru_list); > } > > +static bool amdgpu_ring_is_blacklisted(struct amdgpu_ring *ring, > + int *blacklist, int num_blacklist) > +{ > + int i; > + > + for (i = 0; i < num_blacklist && blacklist[i] != -1; i++) { ... and then you can also drop the blacklist[i] != -1 here. With those changes: Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> > + if (ring->idx == blacklist[i]) > + return true; > + } > + > + return false; > +} > + > /** > * amdgpu_ring_lru_get - get the least recently used ring for a HW IP block > * > * @adev: amdgpu_device pointer > * @type: amdgpu_ring_type enum > + * @blacklist: blacklisted ring ids array > + * @num_blacklist: number of entries in @blacklist > * @ring: output ring > * > * Retrieve the amdgpu_ring structure for the least recently used ring of > * a specific IP block (all asics). > * Returns 0 on success, error on failure. > */ > -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, > - struct amdgpu_ring **ring) > +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, > + int num_blacklist, struct amdgpu_ring **ring) > { > struct amdgpu_ring *entry; > > /* List is sorted in LRU order, find first entry corresponding > * to the desired HW IP */ > *ring = NULL; > spin_lock(&adev->ring_lru_list_lock); > list_for_each_entry(entry, &adev->ring_lru_list, lru_list) { > - if (entry->funcs->type == type) { > - *ring = entry; > - amdgpu_ring_lru_touch_locked(adev, *ring); > - break; > - } > + if (entry->funcs->type != type) > + continue; > + > + if (amdgpu_ring_is_blacklisted(entry, blacklist, num_blacklist)) > + continue; > + > + *ring = entry; > + amdgpu_ring_lru_touch_locked(adev, *ring); > + break; > } > spin_unlock(&adev->ring_lru_list_lock); > > if (!*ring) { > DRM_ERROR("Ring LRU contains no entries for ring type:%d\n", type); > return -EINVAL; > } > > return 0; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 2c801a5..811d76a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -195,15 +195,15 @@ void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib); > void amdgpu_ring_commit(struct amdgpu_ring *ring); > void amdgpu_ring_undo(struct amdgpu_ring *ring); > int amdgpu_ring_priority_get(struct amdgpu_ring *ring, > enum amd_sched_priority priority); > void amdgpu_ring_priority_put(struct amdgpu_ring *ring, > enum amd_sched_priority priority); > int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, > unsigned ring_size, struct amdgpu_irq_src *irq_src, > unsigned irq_type); > void amdgpu_ring_fini(struct amdgpu_ring *ring); > -int amdgpu_ring_lru_get(struct amdgpu_device *adev, int hw_ip, > - struct amdgpu_ring **ring); > +int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, int *blacklist, > + int num_blacklist, struct amdgpu_ring **ring); > void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring); > > #endif > -- Lerne, wie die Welt wirklich ist, Aber vergiss niemals, wie sie sein sollte. _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-03-28 15:22 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
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2017-03-17 18:52 [PATCH] Use LRU mapping policy for SDMA engines Andres Rodriguez
[not found] ` <20170317185249.2952-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-17 18:52 ` [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU Andres Rodriguez
[not found] ` <20170317185249.2952-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-23 12:02 ` Nicolai Hähnle
[not found] ` <0d2d7a16-2666-eb6a-aca9-814a49969f89-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-27 22:35 ` Andres Rodriguez
2017-03-17 18:52 ` [PATCH 2/2] drm/amdgpu: use LRU mapping policy for SDMA engines Andres Rodriguez
2017-03-27 22:36 [PATCH] Use LRU mapping policy for SDMA engines v2 Andres Rodriguez
[not found] ` <20170327223607.2878-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-27 22:36 ` [PATCH 1/2] drm/amdgpu: guarantee bijective mapping of ring ids for LRU Andres Rodriguez
[not found] ` <20170327223607.2878-2-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-27 23:18 ` Andres Rodriguez
2017-03-28 15:22 ` Nicolai Hähnle
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