From: Marc Zyngier <marc.zyngier@arm.com> To: Christoffer Dall <christoffer.dall@linaro.org> Cc: kvm@vger.kernel.org, David Daney <david.daney@cavium.com>, Catalin Marinas <catalin.marinas@arm.com>, Robert Richter <rrichter@cavium.com>, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: [PATCH 15/31] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler Date: Wed, 3 May 2017 11:45:50 +0100 [thread overview] Message-ID: <20170503104606.19342-16-marc.zyngier@arm.com> (raw) In-Reply-To: <20170503104606.19342-1-marc.zyngier@arm.com> Add a handler for reading/writing the guest's view of the ICV_AP1Rn_EL1 registers. We just map them to the corresponding ICH_AP1Rn_EL2 registers. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm64/include/asm/sysreg.h | 1 + virt/kvm/arm/hyp/vgic-v3-sr.c | 94 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 95 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 15c142ce991c..aad46b8eea5e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -180,6 +180,7 @@ #define SYS_VBAR_EL1 sys_reg(3, 0, 12, 0, 0) +#define SYS_ICC_AP1Rn_EL1(n) sys_reg(3, 0, 12, 9, n) #define SYS_ICC_DIR_EL1 sys_reg(3, 0, 12, 11, 1) #define SYS_ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5) #define SYS_ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0) diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c index a76351b3ad66..b6803989da1f 100644 --- a/virt/kvm/arm/hyp/vgic-v3-sr.c +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c @@ -684,6 +684,76 @@ static void __hyp_text __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int __vgic_v3_write_vmcr(vmcr); } +static void __hyp_text __vgic_v3_read_apxrn(struct kvm_vcpu *vcpu, int rt, int n) +{ + u32 val; + + if (!__vgic_v3_get_group(vcpu)) + val = __vgic_v3_read_ap0rn(n); + else + val = __vgic_v3_read_ap1rn(n); + + vcpu_set_reg(vcpu, rt, val); +} + +static void __hyp_text __vgic_v3_write_apxrn(struct kvm_vcpu *vcpu, int rt, int n) +{ + u32 val = vcpu_get_reg(vcpu, rt); + + if (!__vgic_v3_get_group(vcpu)) + __vgic_v3_write_ap0rn(val, n); + else + __vgic_v3_write_ap1rn(val, n); +} + +static void __hyp_text __vgic_v3_read_apxr0(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 0); +} + +static void __hyp_text __vgic_v3_read_apxr1(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 1); +} + +static void __hyp_text __vgic_v3_read_apxr2(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 2); +} + +static void __hyp_text __vgic_v3_read_apxr3(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 3); +} + +static void __hyp_text __vgic_v3_write_apxr0(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 0); +} + +static void __hyp_text __vgic_v3_write_apxr1(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 1); +} + +static void __hyp_text __vgic_v3_write_apxr2(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 2); +} + +static void __hyp_text __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 3); +} + int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) { int rt = kvm_vcpu_sys_get_rt(vcpu); @@ -722,6 +792,30 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) else fn = __vgic_v3_write_bpr1; break; + case SYS_ICC_AP1Rn_EL1(0): + if (is_read) + fn = __vgic_v3_read_apxr0; + else + fn = __vgic_v3_write_apxr0; + break; + case SYS_ICC_AP1Rn_EL1(1): + if (is_read) + fn = __vgic_v3_read_apxr1; + else + fn = __vgic_v3_write_apxr1; + break; + case SYS_ICC_AP1Rn_EL1(2): + if (is_read) + fn = __vgic_v3_read_apxr2; + else + fn = __vgic_v3_write_apxr2; + break; + case SYS_ICC_AP1Rn_EL1(3): + if (is_read) + fn = __vgic_v3_read_apxr3; + else + fn = __vgic_v3_write_apxr3; + break; default: return 0; } -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 15/31] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler Date: Wed, 3 May 2017 11:45:50 +0100 [thread overview] Message-ID: <20170503104606.19342-16-marc.zyngier@arm.com> (raw) In-Reply-To: <20170503104606.19342-1-marc.zyngier@arm.com> Add a handler for reading/writing the guest's view of the ICV_AP1Rn_EL1 registers. We just map them to the corresponding ICH_AP1Rn_EL2 registers. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> --- arch/arm64/include/asm/sysreg.h | 1 + virt/kvm/arm/hyp/vgic-v3-sr.c | 94 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 95 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 15c142ce991c..aad46b8eea5e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -180,6 +180,7 @@ #define SYS_VBAR_EL1 sys_reg(3, 0, 12, 0, 0) +#define SYS_ICC_AP1Rn_EL1(n) sys_reg(3, 0, 12, 9, n) #define SYS_ICC_DIR_EL1 sys_reg(3, 0, 12, 11, 1) #define SYS_ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5) #define SYS_ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0) diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c index a76351b3ad66..b6803989da1f 100644 --- a/virt/kvm/arm/hyp/vgic-v3-sr.c +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c @@ -684,6 +684,76 @@ static void __hyp_text __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int __vgic_v3_write_vmcr(vmcr); } +static void __hyp_text __vgic_v3_read_apxrn(struct kvm_vcpu *vcpu, int rt, int n) +{ + u32 val; + + if (!__vgic_v3_get_group(vcpu)) + val = __vgic_v3_read_ap0rn(n); + else + val = __vgic_v3_read_ap1rn(n); + + vcpu_set_reg(vcpu, rt, val); +} + +static void __hyp_text __vgic_v3_write_apxrn(struct kvm_vcpu *vcpu, int rt, int n) +{ + u32 val = vcpu_get_reg(vcpu, rt); + + if (!__vgic_v3_get_group(vcpu)) + __vgic_v3_write_ap0rn(val, n); + else + __vgic_v3_write_ap1rn(val, n); +} + +static void __hyp_text __vgic_v3_read_apxr0(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 0); +} + +static void __hyp_text __vgic_v3_read_apxr1(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 1); +} + +static void __hyp_text __vgic_v3_read_apxr2(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 2); +} + +static void __hyp_text __vgic_v3_read_apxr3(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_read_apxrn(vcpu, rt, 3); +} + +static void __hyp_text __vgic_v3_write_apxr0(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 0); +} + +static void __hyp_text __vgic_v3_write_apxr1(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 1); +} + +static void __hyp_text __vgic_v3_write_apxr2(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 2); +} + +static void __hyp_text __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu, + u32 vmcr, int rt) +{ + __vgic_v3_write_apxrn(vcpu, rt, 3); +} + int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) { int rt = kvm_vcpu_sys_get_rt(vcpu); @@ -722,6 +792,30 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) else fn = __vgic_v3_write_bpr1; break; + case SYS_ICC_AP1Rn_EL1(0): + if (is_read) + fn = __vgic_v3_read_apxr0; + else + fn = __vgic_v3_write_apxr0; + break; + case SYS_ICC_AP1Rn_EL1(1): + if (is_read) + fn = __vgic_v3_read_apxr1; + else + fn = __vgic_v3_write_apxr1; + break; + case SYS_ICC_AP1Rn_EL1(2): + if (is_read) + fn = __vgic_v3_read_apxr2; + else + fn = __vgic_v3_write_apxr2; + break; + case SYS_ICC_AP1Rn_EL1(3): + if (is_read) + fn = __vgic_v3_read_apxr3; + else + fn = __vgic_v3_write_apxr3; + break; default: return 0; } -- 2.11.0
next prev parent reply other threads:[~2017-05-03 10:45 UTC|newest] Thread overview: 162+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-05-03 10:45 [PATCH 00/31] arm64: KVM: Mediate access to GICv3 sysregs at EL2 Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 01/31] arm64: KVM: Fix decoding of Rt/Rt2 when trapping AArch32 CP accesses Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 02/31] arm64: KVM: Do not use stack-protector to compile EL2 code Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 03/31] arm: KVM: Do not use stack-protector to compile HYP code Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 04/31] KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 05/31] KVM: arm/arm64: vgic-v3: " Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 06/31] KVM: arm/arm64: vgic-v3: Use PREbits to infer the number of ICH_APxRn_EL2 registers Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 07/31] KVM: arm/arm64: vgic-v3: Add accessors for the " Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 15:32 ` Mark Rutland 2017-05-03 15:32 ` Mark Rutland 2017-05-03 15:58 ` Marc Zyngier 2017-05-03 15:58 ` Marc Zyngier 2017-05-30 16:17 ` Marc Zyngier 2017-05-30 16:17 ` Marc Zyngier 2017-05-30 16:42 ` Mark Rutland 2017-05-30 16:42 ` Mark Rutland 2017-05-17 9:54 ` Auger Eric 2017-05-17 9:54 ` Auger Eric 2017-05-22 18:52 ` Marc Zyngier 2017-05-22 18:52 ` Marc Zyngier 2017-05-22 18:52 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 08/31] arm64: Add a facility to turn an ESR syndrome into a sysreg encoding Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 15:35 ` Mark Rutland 2017-05-03 15:35 ` Mark Rutland 2017-05-17 9:54 ` Auger Eric 2017-05-17 9:54 ` Auger Eric 2017-06-09 10:38 ` Catalin Marinas 2017-06-09 10:38 ` Catalin Marinas 2017-05-03 10:45 ` [PATCH 09/31] KVM: arm64: Make kvm_condition_valid32() accessible from EL2 Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-17 9:54 ` Auger Eric 2017-05-17 9:54 ` Auger Eric 2017-05-03 10:45 ` [PATCH 10/31] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-17 9:54 ` Auger Eric 2017-05-17 9:54 ` Auger Eric 2017-05-03 10:45 ` [PATCH 11/31] KVM: arm64: vgic-v3: Add ICV_BPR1_EL1 handler Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-17 15:39 ` Auger Eric 2017-05-17 15:39 ` Auger Eric 2017-05-03 10:45 ` [PATCH 12/31] KVM: arm64: vgic-v3: Add ICV_IGRPEN1_EL1 handler Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-17 15:39 ` Auger Eric 2017-05-17 15:39 ` Auger Eric 2017-05-03 10:45 ` [PATCH 13/31] KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-18 7:41 ` Auger Eric 2017-05-18 7:41 ` Auger Eric 2017-05-22 17:52 ` Marc Zyngier 2017-05-22 17:52 ` Marc Zyngier 2017-05-23 7:22 ` Auger Eric 2017-05-23 7:22 ` Auger Eric 2017-05-23 9:26 ` Marc Zyngier 2017-05-23 9:26 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 14/31] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 7:48 ` Auger Eric 2017-05-30 7:48 ` Auger Eric 2017-05-30 14:24 ` Marc Zyngier 2017-05-30 14:24 ` Marc Zyngier 2017-05-31 6:33 ` Auger Eric 2017-05-31 6:33 ` Auger Eric 2017-05-31 6:46 ` Marc Zyngier 2017-05-31 6:46 ` Marc Zyngier 2017-05-31 6:46 ` Marc Zyngier 2017-05-31 7:26 ` Auger Eric 2017-05-31 7:26 ` Auger Eric 2017-05-31 7:54 ` Marc Zyngier 2017-05-31 7:54 ` Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier [this message] 2017-05-03 10:45 ` [PATCH 15/31] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler Marc Zyngier 2017-05-30 7:48 ` Auger Eric 2017-05-30 7:48 ` Auger Eric 2017-05-30 8:02 ` Auger Eric 2017-05-30 8:02 ` Auger Eric 2017-05-30 14:21 ` Marc Zyngier 2017-05-30 14:21 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 16/31] KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 8:05 ` Auger Eric 2017-05-30 8:05 ` Auger Eric 2017-05-03 10:45 ` [PATCH 17/31] KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 9:07 ` Auger Eric 2017-05-30 9:07 ` Auger Eric 2017-05-30 14:32 ` Marc Zyngier 2017-05-30 14:32 ` Marc Zyngier 2017-05-31 6:43 ` Auger Eric 2017-05-31 6:43 ` Auger Eric 2017-05-03 10:45 ` [PATCH 18/31] KVM: arm64: Enable GICv3 Group-1 sysreg trapping via command-line Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 19/31] KVM: arm64: vgic-v3: Add ICV_BPR0_EL1 handler Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 9:48 ` Auger Eric 2017-05-30 9:48 ` Auger Eric 2017-05-03 10:45 ` [PATCH 20/31] KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 9:48 ` Auger Eric 2017-05-30 9:48 ` Auger Eric 2017-05-03 10:45 ` [PATCH 21/31] KVM: arm64: vgic-v3: Add misc Group-0 handlers Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 9:48 ` Auger Eric 2017-05-30 9:48 ` Auger Eric 2017-05-03 10:45 ` [PATCH 22/31] KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 9:48 ` Auger Eric 2017-05-30 9:48 ` Auger Eric 2017-05-03 10:45 ` [PATCH 23/31] KVM: arm64: Enable GICv3 Group-0 sysreg trapping via command-line Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-03 10:45 ` [PATCH 24/31] arm64: Add MIDR values for Cavium cn83XX SoCs Marc Zyngier 2017-05-03 10:45 ` Marc Zyngier 2017-05-30 9:56 ` Auger Eric 2017-05-30 9:56 ` Auger Eric 2017-06-09 10:39 ` Catalin Marinas 2017-06-09 10:39 ` Catalin Marinas 2017-05-03 10:46 ` [PATCH 25/31] arm64: Add workaround for Cavium Thunder erratum 30115 Marc Zyngier 2017-05-03 10:46 ` Marc Zyngier 2017-05-30 9:56 ` Auger Eric 2017-05-30 9:56 ` Auger Eric 2017-06-09 10:43 ` Catalin Marinas 2017-06-09 10:43 ` Catalin Marinas 2017-05-03 10:46 ` [PATCH 26/31] KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler Marc Zyngier 2017-05-03 10:46 ` Marc Zyngier 2017-05-30 10:15 ` Auger Eric 2017-05-30 10:15 ` Auger Eric 2017-05-30 14:45 ` Marc Zyngier 2017-05-30 14:45 ` Marc Zyngier 2017-05-03 10:46 ` [PATCH 27/31] KVM: arm64: vgic-v3: Add ICV_RPR_EL1 handler Marc Zyngier 2017-05-03 10:46 ` Marc Zyngier 2017-05-30 10:16 ` Auger Eric 2017-05-30 10:16 ` Auger Eric 2017-05-03 10:46 ` [PATCH 28/31] KVM: arm64: vgic-v3: Add ICV_CTLR_EL1 handler Marc Zyngier 2017-05-03 10:46 ` Marc Zyngier 2017-05-30 10:27 ` Auger Eric 2017-05-30 10:27 ` Auger Eric 2017-05-03 10:46 ` [PATCH 29/31] KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler Marc Zyngier 2017-05-03 10:46 ` Marc Zyngier 2017-05-30 10:34 ` Auger Eric 2017-05-30 10:34 ` Auger Eric 2017-05-03 10:46 ` [PATCH 30/31] KVM: arm64: Enable GICv3 common sysreg trapping via command-line Marc Zyngier 2017-05-03 10:46 ` Marc Zyngier 2017-05-30 9:56 ` Auger Eric 2017-05-30 9:56 ` Auger Eric 2017-05-30 14:41 ` Marc Zyngier 2017-05-30 14:41 ` Marc Zyngier 2017-05-03 10:46 ` [PATCH 31/31] KVM: arm64: vgic-v3: Log which GICv3 system registers are trapped Marc Zyngier 2017-05-03 10:46 ` Marc Zyngier 2017-05-30 9:56 ` Auger Eric 2017-05-30 9:56 ` Auger Eric 2017-05-09 0:05 ` [PATCH 00/31] arm64: KVM: Mediate access to GICv3 sysregs at EL2 David Daney 2017-05-09 0:05 ` David Daney 2017-05-09 17:39 ` Marc Zyngier 2017-05-09 17:39 ` Marc Zyngier
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