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From: Marc Zyngier <marc.zyngier@arm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>,
	David Daney <david.daney@cavium.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Robert Richter <rrichter@cavium.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 07/31] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers
Date: Tue, 30 May 2017 17:17:01 +0100	[thread overview]
Message-ID: <dcf371d4-f3d7-be1c-789a-22eb5509a729@arm.com> (raw)
In-Reply-To: <3b9ed468-71ac-786c-b587-27968c3f3af9@arm.com>

On 03/05/17 16:58, Marc Zyngier wrote:
> On 03/05/17 16:32, Mark Rutland wrote:
>> On Wed, May 03, 2017 at 11:45:42AM +0100, Marc Zyngier wrote:
>>> As we're about to access the Active Priority registers a lot more,
>>> let's define accessors that take the register number as a parameter.
>>>
>>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>>> ---
>>>  virt/kvm/arm/hyp/vgic-v3-sr.c | 116 ++++++++++++++++++++++++++++++++++++------
>>>  1 file changed, 100 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
>>> index 32c3295929b0..990d9d1e85d0 100644
>>> --- a/virt/kvm/arm/hyp/vgic-v3-sr.c
>>> +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
>>> @@ -118,6 +118,90 @@ static void __hyp_text __gic_v3_set_lr(u64 val, int lr)
>>>  	}
>>>  }
>>>  
>>> +static void __hyp_text __vgic_v3_write_ap0rn(u32 val, int n)
>>> +{
>>> +	switch (n) {
>>> +	case 0:
>>> +		write_gicreg(val, ICH_AP0R0_EL2);
>>> +		break;
>>> +	case 1:
>>> +		write_gicreg(val, ICH_AP0R1_EL2);
>>> +		break;
>>> +	case 2:
>>> +		write_gicreg(val, ICH_AP0R2_EL2);
>>> +		break;
>>> +	case 3:
>>> +		write_gicreg(val, ICH_AP0R3_EL2);
>>> +		break;
>>> +	}
>>
>> Is there any way we can get a build or runtime failure for an
>> out-of-bounds n value?
> 
> I'd rather avoid runtime failure on this path, because that's pretty
> terminal. Build-time is a possibility, to some extent.
> 
>>
>>> +}
>>
>> Given this is used with a constant n, you could make this:
>>
>> #define __vgic_v3_write_ap0rn(v, n) \
>> 	write_gicreg(v, ICH_AP0R##n##_EL2)
>>
>> ... which should also give you a warning for an out-of-bounds n.
>>
>> Similar could apply for the other helpers here.
>>
>> That would require some function -> macro conversion in later patches
>> though, so I can understand if you're not keen on that.
> 
> I don't mind reworking this if that makes it safer. But the real problem
> is that the register number and the group are not necessarily constants
> (see how this is used in __vgic_v3_get_highest_active_priority).
> 
> I'll have a look at how I can make that look a bit better.

So I had another look at that, and I'm not sure there is any way to make
it really nicer, other than expanding all of the apxrn accessors to deal
with non constant x and n (which makes the code look really awful).

I'm pretty confident that it is nigh impossible to get x or n out of
bounds so unless someone shouts, I plan on keeping this code mostly
unchanged for the next repost.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 07/31] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers
Date: Tue, 30 May 2017 17:17:01 +0100	[thread overview]
Message-ID: <dcf371d4-f3d7-be1c-789a-22eb5509a729@arm.com> (raw)
In-Reply-To: <3b9ed468-71ac-786c-b587-27968c3f3af9@arm.com>

On 03/05/17 16:58, Marc Zyngier wrote:
> On 03/05/17 16:32, Mark Rutland wrote:
>> On Wed, May 03, 2017 at 11:45:42AM +0100, Marc Zyngier wrote:
>>> As we're about to access the Active Priority registers a lot more,
>>> let's define accessors that take the register number as a parameter.
>>>
>>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>>> ---
>>>  virt/kvm/arm/hyp/vgic-v3-sr.c | 116 ++++++++++++++++++++++++++++++++++++------
>>>  1 file changed, 100 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
>>> index 32c3295929b0..990d9d1e85d0 100644
>>> --- a/virt/kvm/arm/hyp/vgic-v3-sr.c
>>> +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
>>> @@ -118,6 +118,90 @@ static void __hyp_text __gic_v3_set_lr(u64 val, int lr)
>>>  	}
>>>  }
>>>  
>>> +static void __hyp_text __vgic_v3_write_ap0rn(u32 val, int n)
>>> +{
>>> +	switch (n) {
>>> +	case 0:
>>> +		write_gicreg(val, ICH_AP0R0_EL2);
>>> +		break;
>>> +	case 1:
>>> +		write_gicreg(val, ICH_AP0R1_EL2);
>>> +		break;
>>> +	case 2:
>>> +		write_gicreg(val, ICH_AP0R2_EL2);
>>> +		break;
>>> +	case 3:
>>> +		write_gicreg(val, ICH_AP0R3_EL2);
>>> +		break;
>>> +	}
>>
>> Is there any way we can get a build or runtime failure for an
>> out-of-bounds n value?
> 
> I'd rather avoid runtime failure on this path, because that's pretty
> terminal. Build-time is a possibility, to some extent.
> 
>>
>>> +}
>>
>> Given this is used with a constant n, you could make this:
>>
>> #define __vgic_v3_write_ap0rn(v, n) \
>> 	write_gicreg(v, ICH_AP0R##n##_EL2)
>>
>> ... which should also give you a warning for an out-of-bounds n.
>>
>> Similar could apply for the other helpers here.
>>
>> That would require some function -> macro conversion in later patches
>> though, so I can understand if you're not keen on that.
> 
> I don't mind reworking this if that makes it safer. But the real problem
> is that the register number and the group are not necessarily constants
> (see how this is used in __vgic_v3_get_highest_active_priority).
> 
> I'll have a look at how I can make that look a bit better.

So I had another look at that, and I'm not sure there is any way to make
it really nicer, other than expanding all of the apxrn accessors to deal
with non constant x and n (which makes the code look really awful).

I'm pretty confident that it is nigh impossible to get x or n out of
bounds so unless someone shouts, I plan on keeping this code mostly
unchanged for the next repost.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2017-05-30 16:17 UTC|newest]

Thread overview: 162+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-03 10:45 [PATCH 00/31] arm64: KVM: Mediate access to GICv3 sysregs at EL2 Marc Zyngier
2017-05-03 10:45 ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 01/31] arm64: KVM: Fix decoding of Rt/Rt2 when trapping AArch32 CP accesses Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 02/31] arm64: KVM: Do not use stack-protector to compile EL2 code Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 03/31] arm: KVM: Do not use stack-protector to compile HYP code Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 04/31] KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 05/31] KVM: arm/arm64: vgic-v3: " Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 06/31] KVM: arm/arm64: vgic-v3: Use PREbits to infer the number of ICH_APxRn_EL2 registers Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 07/31] KVM: arm/arm64: vgic-v3: Add accessors for the " Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 15:32   ` Mark Rutland
2017-05-03 15:32     ` Mark Rutland
2017-05-03 15:58     ` Marc Zyngier
2017-05-03 15:58       ` Marc Zyngier
2017-05-30 16:17       ` Marc Zyngier [this message]
2017-05-30 16:17         ` Marc Zyngier
2017-05-30 16:42         ` Mark Rutland
2017-05-30 16:42           ` Mark Rutland
2017-05-17  9:54   ` Auger Eric
2017-05-17  9:54     ` Auger Eric
2017-05-22 18:52     ` Marc Zyngier
2017-05-22 18:52       ` Marc Zyngier
2017-05-22 18:52       ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 08/31] arm64: Add a facility to turn an ESR syndrome into a sysreg encoding Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 15:35   ` Mark Rutland
2017-05-03 15:35     ` Mark Rutland
2017-05-17  9:54   ` Auger Eric
2017-05-17  9:54     ` Auger Eric
2017-06-09 10:38   ` Catalin Marinas
2017-06-09 10:38     ` Catalin Marinas
2017-05-03 10:45 ` [PATCH 09/31] KVM: arm64: Make kvm_condition_valid32() accessible from EL2 Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-17  9:54   ` Auger Eric
2017-05-17  9:54     ` Auger Eric
2017-05-03 10:45 ` [PATCH 10/31] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-17  9:54   ` Auger Eric
2017-05-17  9:54     ` Auger Eric
2017-05-03 10:45 ` [PATCH 11/31] KVM: arm64: vgic-v3: Add ICV_BPR1_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-17 15:39   ` Auger Eric
2017-05-17 15:39     ` Auger Eric
2017-05-03 10:45 ` [PATCH 12/31] KVM: arm64: vgic-v3: Add ICV_IGRPEN1_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-17 15:39   ` Auger Eric
2017-05-17 15:39     ` Auger Eric
2017-05-03 10:45 ` [PATCH 13/31] KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-18  7:41   ` Auger Eric
2017-05-18  7:41     ` Auger Eric
2017-05-22 17:52     ` Marc Zyngier
2017-05-22 17:52       ` Marc Zyngier
2017-05-23  7:22       ` Auger Eric
2017-05-23  7:22         ` Auger Eric
2017-05-23  9:26         ` Marc Zyngier
2017-05-23  9:26           ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 14/31] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  7:48   ` Auger Eric
2017-05-30  7:48     ` Auger Eric
2017-05-30 14:24     ` Marc Zyngier
2017-05-30 14:24       ` Marc Zyngier
2017-05-31  6:33       ` Auger Eric
2017-05-31  6:33         ` Auger Eric
2017-05-31  6:46         ` Marc Zyngier
2017-05-31  6:46           ` Marc Zyngier
2017-05-31  6:46           ` Marc Zyngier
2017-05-31  7:26           ` Auger Eric
2017-05-31  7:26             ` Auger Eric
2017-05-31  7:54             ` Marc Zyngier
2017-05-31  7:54               ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 15/31] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  7:48   ` Auger Eric
2017-05-30  7:48     ` Auger Eric
2017-05-30  8:02     ` Auger Eric
2017-05-30  8:02       ` Auger Eric
2017-05-30 14:21       ` Marc Zyngier
2017-05-30 14:21         ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 16/31] KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  8:05   ` Auger Eric
2017-05-30  8:05     ` Auger Eric
2017-05-03 10:45 ` [PATCH 17/31] KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  9:07   ` Auger Eric
2017-05-30  9:07     ` Auger Eric
2017-05-30 14:32     ` Marc Zyngier
2017-05-30 14:32       ` Marc Zyngier
2017-05-31  6:43       ` Auger Eric
2017-05-31  6:43         ` Auger Eric
2017-05-03 10:45 ` [PATCH 18/31] KVM: arm64: Enable GICv3 Group-1 sysreg trapping via command-line Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 19/31] KVM: arm64: vgic-v3: Add ICV_BPR0_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  9:48   ` Auger Eric
2017-05-30  9:48     ` Auger Eric
2017-05-03 10:45 ` [PATCH 20/31] KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  9:48   ` Auger Eric
2017-05-30  9:48     ` Auger Eric
2017-05-03 10:45 ` [PATCH 21/31] KVM: arm64: vgic-v3: Add misc Group-0 handlers Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  9:48   ` Auger Eric
2017-05-30  9:48     ` Auger Eric
2017-05-03 10:45 ` [PATCH 22/31] KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  9:48   ` Auger Eric
2017-05-30  9:48     ` Auger Eric
2017-05-03 10:45 ` [PATCH 23/31] KVM: arm64: Enable GICv3 Group-0 sysreg trapping via command-line Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-03 10:45 ` [PATCH 24/31] arm64: Add MIDR values for Cavium cn83XX SoCs Marc Zyngier
2017-05-03 10:45   ` Marc Zyngier
2017-05-30  9:56   ` Auger Eric
2017-05-30  9:56     ` Auger Eric
2017-06-09 10:39   ` Catalin Marinas
2017-06-09 10:39     ` Catalin Marinas
2017-05-03 10:46 ` [PATCH 25/31] arm64: Add workaround for Cavium Thunder erratum 30115 Marc Zyngier
2017-05-03 10:46   ` Marc Zyngier
2017-05-30  9:56   ` Auger Eric
2017-05-30  9:56     ` Auger Eric
2017-06-09 10:43   ` Catalin Marinas
2017-06-09 10:43     ` Catalin Marinas
2017-05-03 10:46 ` [PATCH 26/31] KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler Marc Zyngier
2017-05-03 10:46   ` Marc Zyngier
2017-05-30 10:15   ` Auger Eric
2017-05-30 10:15     ` Auger Eric
2017-05-30 14:45     ` Marc Zyngier
2017-05-30 14:45       ` Marc Zyngier
2017-05-03 10:46 ` [PATCH 27/31] KVM: arm64: vgic-v3: Add ICV_RPR_EL1 handler Marc Zyngier
2017-05-03 10:46   ` Marc Zyngier
2017-05-30 10:16   ` Auger Eric
2017-05-30 10:16     ` Auger Eric
2017-05-03 10:46 ` [PATCH 28/31] KVM: arm64: vgic-v3: Add ICV_CTLR_EL1 handler Marc Zyngier
2017-05-03 10:46   ` Marc Zyngier
2017-05-30 10:27   ` Auger Eric
2017-05-30 10:27     ` Auger Eric
2017-05-03 10:46 ` [PATCH 29/31] KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler Marc Zyngier
2017-05-03 10:46   ` Marc Zyngier
2017-05-30 10:34   ` Auger Eric
2017-05-30 10:34     ` Auger Eric
2017-05-03 10:46 ` [PATCH 30/31] KVM: arm64: Enable GICv3 common sysreg trapping via command-line Marc Zyngier
2017-05-03 10:46   ` Marc Zyngier
2017-05-30  9:56   ` Auger Eric
2017-05-30  9:56     ` Auger Eric
2017-05-30 14:41     ` Marc Zyngier
2017-05-30 14:41       ` Marc Zyngier
2017-05-03 10:46 ` [PATCH 31/31] KVM: arm64: vgic-v3: Log which GICv3 system registers are trapped Marc Zyngier
2017-05-03 10:46   ` Marc Zyngier
2017-05-30  9:56   ` Auger Eric
2017-05-30  9:56     ` Auger Eric
2017-05-09  0:05 ` [PATCH 00/31] arm64: KVM: Mediate access to GICv3 sysregs at EL2 David Daney
2017-05-09  0:05   ` David Daney
2017-05-09 17:39   ` Marc Zyngier
2017-05-09 17:39     ` Marc Zyngier

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