From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/12] drm: Add DP PSR2 sink enable bit
Date: Thu, 22 Mar 2018 16:19:37 -0700 [thread overview]
Message-ID: <20180322231935.GN2557@intel.com> (raw)
In-Reply-To: <20180322214848.28022-1-jose.souza@intel.com>
On Thu, Mar 22, 2018 at 02:48:37PM -0700, José Roberto de Souza wrote:
> To comply with eDP1.4a this bit should be set when enabling PSR2.
>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm/drm_dp_helper.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 62903bae0221..0bac0c7d0dec 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -478,6 +478,7 @@
> # define DP_PSR_FRAME_CAPTURE (1 << 3)
> # define DP_PSR_SELECTIVE_UPDATE (1 << 4)
> # define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5)
> +# define DP_PSR_ENABLE_PSR2 (1 << 6) /* eDP 1.4a */
>
> #define DP_ADAPTER_CTRL 0x1a0
> # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0)
> --
> 2.16.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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prev parent reply other threads:[~2018-03-22 23:19 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-22 21:48 [PATCH 01/12] drm: Add DP PSR2 sink enable bit José Roberto de Souza
2018-03-22 21:48 ` [PATCH 02/12] drm: Add DP last received PSR SDP VSC register and bits José Roberto de Souza
2018-03-22 23:23 ` Rodrigo Vivi
2018-03-23 0:59 ` Souza, Jose
2018-03-23 5:40 ` Rodrigo Vivi
2018-03-22 21:48 ` [PATCH 03/12] drm/i915/psr: Nuke aux frame sync José Roberto de Souza
2018-03-22 22:57 ` Rodrigo Vivi
2018-03-23 0:53 ` Souza, Jose
2018-03-23 22:14 ` Pandiyan, Dhinakaran
2018-03-23 23:49 ` Souza, Jose
2018-03-24 2:16 ` Pandiyan, Dhinakaran
2018-03-27 0:11 ` Souza, Jose
2018-03-22 21:48 ` [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement José Roberto de Souza
2018-03-22 23:09 ` Rodrigo Vivi
2018-03-22 23:16 ` Souza, Jose
2018-03-23 22:59 ` Pandiyan, Dhinakaran
2018-03-23 23:51 ` Souza, Jose
2018-03-24 2:34 ` Pandiyan, Dhinakaran
2018-03-27 21:36 ` Rodrigo Vivi
2018-03-28 3:35 ` Nagaraju, Vathsala
2018-03-22 21:48 ` [PATCH 05/12] drm/i915/psr/cnl: Enable Y-coordinate support in source José Roberto de Souza
2018-03-22 21:48 ` [PATCH 06/12] drm/i915/psr: Do not override PSR2 sink support José Roberto de Souza
2018-03-22 21:48 ` [PATCH 07/12] drm/i915/psr: Use PSR2 macro for PSR2 José Roberto de Souza
2018-03-22 23:12 ` Rodrigo Vivi
2018-03-22 21:48 ` [PATCH 08/12] drm/i915/psr: Cache sink synchronization latency José Roberto de Souza
2018-03-22 23:15 ` Rodrigo Vivi
2018-03-23 0:21 ` Souza, Jose
2018-03-22 21:48 ` [PATCH 09/12] drm/i915/psr: Set DPCD PSR2 enable bit when needed José Roberto de Souza
2018-03-22 23:20 ` Rodrigo Vivi
2018-03-22 21:48 ` [PATCH 10/12] drm/i915/debugfs: Print sink PSR state and debug info José Roberto de Souza
2018-03-22 23:31 ` Rodrigo Vivi
2018-03-23 0:06 ` Souza, Jose
2018-03-23 0:11 ` Rodrigo Vivi
2018-03-24 3:23 ` Pandiyan, Dhinakaran
2018-03-22 21:48 ` [PATCH 11/12] drm/i915/debugfs: Print information about what caused a PSR exit José Roberto de Souza
2018-03-22 23:27 ` Rodrigo Vivi
2018-03-22 23:43 ` Pandiyan, Dhinakaran
2018-03-23 0:16 ` Souza, Jose
2018-03-23 0:22 ` Pandiyan, Dhinakaran
2018-03-22 21:48 ` [PATCH 12/12] drm/i915/debugfs: Print how many blocks were sent in a selective update José Roberto de Souza
2018-03-22 23:46 ` Rodrigo Vivi
2018-03-23 0:52 ` Souza, Jose
2018-03-22 21:56 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm: Add DP PSR2 sink enable bit Patchwork
2018-03-22 22:14 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-03-22 23:19 ` Rodrigo Vivi [this message]
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