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From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Cc: "Suraj Jitindar Singh" <sjitindarsingh@gmail.com>,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [Qemu-devel] [PATCH v4 1/5] target/ppc: return a nil HPT base address on sPAPR machines
Date: Tue, 24 Apr 2018 13:30:41 +0200	[thread overview]
Message-ID: <20180424113045.25687-2-clg@kaod.org> (raw)
In-Reply-To: <20180424113045.25687-1-clg@kaod.org>

commit e57ca75ce3b2 ("target/ppc: Manage external HPT via virtual
hypervisor") exported a set of methods to manipulate the HPT from the
core hash MMU. But SPR_SDR1 is still used under some circumstances to
get the base address of the HPT, which is incorrect for the sPAPR
machines.

Only the logging should be impacted.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---

 Changes since v3:

 - removed spapr_hpt_base() ops and just return zero instead

 target/ppc/mmu-hash64.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h
index f23b78d78754..53dcec5b9316 100644
--- a/target/ppc/mmu-hash64.h
+++ b/target/ppc/mmu-hash64.h
@@ -101,6 +101,9 @@ void ppc_hash64_finalize(PowerPCCPU *cpu);
 
 static inline hwaddr ppc_hash64_hpt_base(PowerPCCPU *cpu)
 {
+    if (cpu->vhyp) {
+        return 0;
+    }
     return cpu->env.spr[SPR_SDR1] & SDR_64_HTABORG;
 }
 
-- 
2.13.6

  reply	other threads:[~2018-04-24 11:31 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-24 11:30 [Qemu-devel] [PATCH v4 0/5] target/ppc: add hash MMU support for the POWER9 PowerNV machine Cédric Le Goater
2018-04-24 11:30 ` Cédric Le Goater [this message]
2018-05-02 14:59   ` [Qemu-devel] [PATCH v4 1/5] target/ppc: return a nil HPT base address on sPAPR machines David Gibson
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 2/5] target/ppc: add basic support for PTCR on POWER9 Cédric Le Goater
2018-05-02 15:00   ` David Gibson
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 3/5] target/ppc: add hash MMU definitions for ISA v3.0 Cédric Le Goater
2018-05-03  0:48   ` David Gibson
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 4/5] target/ppc: add hash MMU support for PowerNV POWER9 machines Cédric Le Goater
2018-04-24 12:03   ` Cédric Le Goater
2018-04-24 12:41     ` Cédric Le Goater
2018-05-03  0:58       ` David Gibson
2018-05-03  5:52         ` Cédric Le Goater
2018-05-03  6:36           ` David Gibson
2018-05-03  8:05             ` Cédric Le Goater
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 5/5] target/ppc: generalize check on radix when in HV mode Cédric Le Goater

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