Re: [Qemu-devel] [PATCH v4 4/5] target/ppc: add hash MMU support for PowerNV POWER9 machines

From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Cc: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v4 4/5] target/ppc: add hash MMU support for PowerNV POWER9 machines
Date: Tue, 24 Apr 2018 14:03:14 +0200	[thread overview]
Message-ID: <f949a056-23c2-fcfa-d9e0-6a2cb1142051@kaod.org> (raw)
In-Reply-To: <20180424113045.25687-5-clg@kaod.org>

> +hwaddr ppc_hash64_hpt_reg(PowerPCCPU *cpu)
> +{
> +    CPUPPCState *env = &cpu->env;
> +
> +    /* We should not reach this routine on sPAPR machines */
> +    assert(!cpu->vhyp);
> +
> +    /* PowerNV machine */
> +    if (msr_hv) {
> +        if (env->mmu_model & POWERPC_MMU_3_00) {
> +            return ppc64_v3_get_patbe0(cpu);
> +        } else {
> +            return cpu->env.spr[SPR_SDR1];
> +        }
> +    } else {
> +        error_report("PowerNV guest support Unimplemented");
> +        exit(1);

I just noticed that this breaks 970 CPUs ...

C.

> +    }
> +}