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From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v4 1/5] target/ppc: return a nil HPT base address on sPAPR machines
Date: Thu, 3 May 2018 00:59:35 +1000	[thread overview]
Message-ID: <20180502145935.GA13229@umbus.fritz.box> (raw)
In-Reply-To: <20180424113045.25687-2-clg@kaod.org>

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On Tue, Apr 24, 2018 at 01:30:41PM +0200, Cédric Le Goater wrote:
> commit e57ca75ce3b2 ("target/ppc: Manage external HPT via virtual
> hypervisor") exported a set of methods to manipulate the HPT from the
> core hash MMU. But SPR_SDR1 is still used under some circumstances to
> get the base address of the HPT, which is incorrect for the sPAPR
> machines.
> 
> Only the logging should be impacted.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Even better would be having an asserT(!vhyp) here, but that would
require some irritating fiddling with the callers.

This is a fine interim step, applued.

> ---
> 
>  Changes since v3:
> 
>  - removed spapr_hpt_base() ops and just return zero instead
> 
>  target/ppc/mmu-hash64.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h
> index f23b78d78754..53dcec5b9316 100644
> --- a/target/ppc/mmu-hash64.h
> +++ b/target/ppc/mmu-hash64.h
> @@ -101,6 +101,9 @@ void ppc_hash64_finalize(PowerPCCPU *cpu);
>  
>  static inline hwaddr ppc_hash64_hpt_base(PowerPCCPU *cpu)
>  {
> +    if (cpu->vhyp) {
> +        return 0;
> +    }
>      return cpu->env.spr[SPR_SDR1] & SDR_64_HTABORG;
>  }
>  

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2018-05-02 15:04 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-24 11:30 [Qemu-devel] [PATCH v4 0/5] target/ppc: add hash MMU support for the POWER9 PowerNV machine Cédric Le Goater
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 1/5] target/ppc: return a nil HPT base address on sPAPR machines Cédric Le Goater
2018-05-02 14:59   ` David Gibson [this message]
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 2/5] target/ppc: add basic support for PTCR on POWER9 Cédric Le Goater
2018-05-02 15:00   ` David Gibson
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 3/5] target/ppc: add hash MMU definitions for ISA v3.0 Cédric Le Goater
2018-05-03  0:48   ` David Gibson
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 4/5] target/ppc: add hash MMU support for PowerNV POWER9 machines Cédric Le Goater
2018-04-24 12:03   ` Cédric Le Goater
2018-04-24 12:41     ` Cédric Le Goater
2018-05-03  0:58       ` David Gibson
2018-05-03  5:52         ` Cédric Le Goater
2018-05-03  6:36           ` David Gibson
2018-05-03  8:05             ` Cédric Le Goater
2018-04-24 11:30 ` [Qemu-devel] [PATCH v4 5/5] target/ppc: generalize check on radix when in HV mode Cédric Le Goater

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