From: Sebastian Reichel <sebastian.reichel@collabora.co.uk> To: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de>, Fabio Estevam <fabio.estevam@nxp.com>, Will Deacon <will.deacon@arm.com>, Mark Rutland <mark.rutland@arm.com>, Russell King <linux@armlinux.org.uk>, Ian Ray <ian.ray@ge.com>, Nandor Han <nandor.han@ge.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCHv4 1/2] ARM: imx53: add secure-reg-access support for PMU Date: Mon, 28 May 2018 08:41:31 +0200 [thread overview] Message-ID: <20180528064131.y5burm5kakiazaq4@earth.universe> (raw) In-Reply-To: <20180528022652.GA3143@dragon> [-- Attachment #1: Type: text/plain, Size: 2728 bytes --] Hi, On Mon, May 28, 2018 at 10:26:54AM +0800, Shawn Guo wrote: > On Tue, Feb 27, 2018 at 11:17:12AM +0100, Sebastian Reichel wrote: > > Hi, > > > > On Tue, Feb 27, 2018 at 09:10:34AM +0800, Shawn Guo wrote: > > > On Mon, Feb 26, 2018 at 02:47:41PM +0100, Sebastian Reichel wrote: > > > > On Sat, Feb 24, 2018 at 03:45:44PM +0800, Shawn Guo wrote: > > > > > On Mon, Feb 12, 2018 at 01:39:44PM +0100, Sebastian Reichel wrote: > > > > > > On i.MX53 it is necessary to set the DBG_EN bit in the > > > > > > platform GPC register to enable access to PMU counters > > > > > > other than the cycle counter. > > > > > > > > > > > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> > > > > > > --- > > > > > > arch/arm/mach-imx/mach-imx53.c | 39 ++++++++++++++++++++++++++++++++++++++- > > > > > > 1 file changed, 38 insertions(+), 1 deletion(-) > > > > > > > > > > > > diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c > > > > > > index 07c2e8dca494..658e28604dca 100644 > > > > > > --- a/arch/arm/mach-imx/mach-imx53.c > > > > > > +++ b/arch/arm/mach-imx/mach-imx53.c > > > > > > @@ -28,10 +28,47 @@ static void __init imx53_init_early(void) > > > > > > mxc_set_cpu_type(MXC_CPU_MX53); > > > > > > } > > > > > > > > > > > > +#define MXC_CORTEXA8_PLAT_GPC 0x63fa0004 > > > > > > > > > > The base address should be retrieved from device tree. > > > > > > > > DT has no entry for 0x63fa0000-0x63fa3fff. iMX53 TRM lists it as "ARM Platform" > > > > with 8 platform specific 32 bit registers. Do you think it's worth the trouble > > > > adding a new binding? Do you have a suggestion for a compatible value? > > > > > > Looking at it more closely, I feel that patching every single platform > > > which needs to set up additional register for secure-reg-access support > > > doesn't really scale. Can we have pmu driver do it with a phandle in > > > DT pointing to the register and bit that need to be configured? > > > > The PMU driver used to have a feature for initialising platform > > specific bits, but it is currently being removed to make the PMU > > code more maintainable. My understanding is, that it's very uncommon > > to require platform specific setup to get secure-reg-access working. > > I.e. it is not needed for newer iMX platforms. > > Are you saying this is a very specific setup required by i.MX53 only? Yes, all other SoCs supported by Linux ARM PMU counters driver can just use the registers without having to enable platform specific bits first. > In that case, I can live with it. What about the DT node? I did not add it, since this is a i.MX53 specific workaround anyways. -- Sebastian [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: sebastian.reichel@collabora.co.uk (Sebastian Reichel) To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv4 1/2] ARM: imx53: add secure-reg-access support for PMU Date: Mon, 28 May 2018 08:41:31 +0200 [thread overview] Message-ID: <20180528064131.y5burm5kakiazaq4@earth.universe> (raw) In-Reply-To: <20180528022652.GA3143@dragon> Hi, On Mon, May 28, 2018 at 10:26:54AM +0800, Shawn Guo wrote: > On Tue, Feb 27, 2018 at 11:17:12AM +0100, Sebastian Reichel wrote: > > Hi, > > > > On Tue, Feb 27, 2018 at 09:10:34AM +0800, Shawn Guo wrote: > > > On Mon, Feb 26, 2018 at 02:47:41PM +0100, Sebastian Reichel wrote: > > > > On Sat, Feb 24, 2018 at 03:45:44PM +0800, Shawn Guo wrote: > > > > > On Mon, Feb 12, 2018 at 01:39:44PM +0100, Sebastian Reichel wrote: > > > > > > On i.MX53 it is necessary to set the DBG_EN bit in the > > > > > > platform GPC register to enable access to PMU counters > > > > > > other than the cycle counter. > > > > > > > > > > > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> > > > > > > --- > > > > > > arch/arm/mach-imx/mach-imx53.c | 39 ++++++++++++++++++++++++++++++++++++++- > > > > > > 1 file changed, 38 insertions(+), 1 deletion(-) > > > > > > > > > > > > diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c > > > > > > index 07c2e8dca494..658e28604dca 100644 > > > > > > --- a/arch/arm/mach-imx/mach-imx53.c > > > > > > +++ b/arch/arm/mach-imx/mach-imx53.c > > > > > > @@ -28,10 +28,47 @@ static void __init imx53_init_early(void) > > > > > > mxc_set_cpu_type(MXC_CPU_MX53); > > > > > > } > > > > > > > > > > > > +#define MXC_CORTEXA8_PLAT_GPC 0x63fa0004 > > > > > > > > > > The base address should be retrieved from device tree. > > > > > > > > DT has no entry for 0x63fa0000-0x63fa3fff. iMX53 TRM lists it as "ARM Platform" > > > > with 8 platform specific 32 bit registers. Do you think it's worth the trouble > > > > adding a new binding? Do you have a suggestion for a compatible value? > > > > > > Looking at it more closely, I feel that patching every single platform > > > which needs to set up additional register for secure-reg-access support > > > doesn't really scale. Can we have pmu driver do it with a phandle in > > > DT pointing to the register and bit that need to be configured? > > > > The PMU driver used to have a feature for initialising platform > > specific bits, but it is currently being removed to make the PMU > > code more maintainable. My understanding is, that it's very uncommon > > to require platform specific setup to get secure-reg-access working. > > I.e. it is not needed for newer iMX platforms. > > Are you saying this is a very specific setup required by i.MX53 only? Yes, all other SoCs supported by Linux ARM PMU counters driver can just use the registers without having to enable platform specific bits first. > In that case, I can live with it. What about the DT node? I did not add it, since this is a i.MX53 specific workaround anyways. -- Sebastian -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20180528/03b956df/attachment-0001.sig>
next prev parent reply other threads:[~2018-05-28 6:41 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-02-12 12:39 [PATCHv4 0/2] Improved perf support for imx53/ppd Sebastian Reichel 2018-02-12 12:39 ` Sebastian Reichel 2018-02-12 12:39 ` [PATCHv4 1/2] ARM: imx53: add secure-reg-access support for PMU Sebastian Reichel 2018-02-12 12:39 ` Sebastian Reichel 2018-02-12 12:48 ` Fabio Estevam 2018-02-12 12:48 ` Fabio Estevam 2018-02-24 7:45 ` Shawn Guo 2018-02-24 7:45 ` Shawn Guo 2018-02-26 13:47 ` Sebastian Reichel 2018-02-26 13:47 ` Sebastian Reichel 2018-02-27 1:10 ` Shawn Guo 2018-02-27 1:10 ` Shawn Guo 2018-02-27 10:17 ` Sebastian Reichel 2018-02-27 10:17 ` Sebastian Reichel 2018-05-25 15:45 ` Sebastian Reichel 2018-05-25 15:45 ` Sebastian Reichel 2018-05-28 2:26 ` Shawn Guo 2018-05-28 2:26 ` Shawn Guo 2018-05-28 6:41 ` Sebastian Reichel [this message] 2018-05-28 6:41 ` Sebastian Reichel 2018-05-28 7:20 ` Shawn Guo 2018-05-28 7:20 ` Shawn Guo 2018-05-28 15:50 ` Sebastian Reichel 2018-05-28 15:50 ` Sebastian Reichel 2018-06-18 4:00 ` Fabio Estevam 2018-06-18 4:00 ` Fabio Estevam 2018-02-12 12:39 ` [PATCHv4 2/2] ARM: dts: imx53: PPD: Enable secure-reg-access Sebastian Reichel 2018-02-12 12:39 ` Sebastian Reichel
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