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From: Sudeep Holla <sudeep.holla@arm.com>
To: Georgi Djakov <georgi.djakov@linaro.org>
Cc: Rob Herring <robh@kernel.org>,
	linux-pm@vger.kernel.org, gregkh@linuxfoundation.org,
	rjw@rjwysocki.net, mturquette@baylibre.com, khilman@baylibre.com,
	vincent.guittot@linaro.org, skannan@codeaurora.org,
	bjorn.andersson@linaro.org, amit.kucheria@linaro.org,
	seansw@qti.qualcomm.com, daidavid1@codeaurora.org,
	evgreen@chromium.org, mark.rutland@arm.com,
	lorenzo.pieralisi@arm.com, abailon@baylibre.com,
	maxime.ripard@bootlin.com, arnd@arndb.de,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v9 2/8] dt-bindings: Introduce interconnect binding
Date: Wed, 26 Sep 2018 15:48:30 +0100	[thread overview]
Message-ID: <20180926144830.GB25838@e107155-lin> (raw)
In-Reply-To: <b67253fb-d86d-2ddd-6c30-0833d6ed62ad@linaro.org>

On Wed, Sep 26, 2018 at 05:42:15PM +0300, Georgi Djakov wrote:
> Hi Rob,
> 
> Thanks for the comments!
> 
> On 09/25/2018 09:02 PM, Rob Herring wrote:
> > On Fri, Aug 31, 2018 at 05:01:45PM +0300, Georgi Djakov wrote:
> >> This binding is intended to represent the relations between the interconnect
> >> controllers (providers) and consumer device nodes. It will allow creating links
> >> between consumers and interconnect paths (exposed by interconnect providers).
> > 
> > As I mentioned in person, I want to see other SoC families using this 
> > before accepting. They don't have to be ready for upstream, but WIP 
> > patches or even just a "yes, this works for us and we're going to use 
> > this binding on X".
> 
> Other than the 3 Qualcomm SoCs (msm8916, msm8996, sdm845) that are
> currently using this binding, there is ongoing work from at least two
> other vendors that would be using this same binding. I will check on
> what is their progress so far.
> 
> > Also, I think the QCom GPU use of this should be fully sorted out. Or 
> > more generically how this fits into OPP binding which seems to be never 
> > ending extended...
> 
> I see this as a further step. It could be OPP binding which include
> bandwidth values or some separate DT property. Jordan has already
> proposed something, do you have any initial comments on that?

I am curious as how this fits into new systems which have firmware driven
CPUFreq and other DVFS. I would like to avoid using this in such systems
and leave it upto the firmware to scale the bus/interconnect based on the
other components that are connected to it and active.

--
Regards,
Sudeep

WARNING: multiple messages have this Message-ID (diff)
From: sudeep.holla@arm.com (Sudeep Holla)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 2/8] dt-bindings: Introduce interconnect binding
Date: Wed, 26 Sep 2018 15:48:30 +0100	[thread overview]
Message-ID: <20180926144830.GB25838@e107155-lin> (raw)
In-Reply-To: <b67253fb-d86d-2ddd-6c30-0833d6ed62ad@linaro.org>

On Wed, Sep 26, 2018 at 05:42:15PM +0300, Georgi Djakov wrote:
> Hi Rob,
> 
> Thanks for the comments!
> 
> On 09/25/2018 09:02 PM, Rob Herring wrote:
> > On Fri, Aug 31, 2018 at 05:01:45PM +0300, Georgi Djakov wrote:
> >> This binding is intended to represent the relations between the interconnect
> >> controllers (providers) and consumer device nodes. It will allow creating links
> >> between consumers and interconnect paths (exposed by interconnect providers).
> > 
> > As I mentioned in person, I want to see other SoC families using this 
> > before accepting. They don't have to be ready for upstream, but WIP 
> > patches or even just a "yes, this works for us and we're going to use 
> > this binding on X".
> 
> Other than the 3 Qualcomm SoCs (msm8916, msm8996, sdm845) that are
> currently using this binding, there is ongoing work from at least two
> other vendors that would be using this same binding. I will check on
> what is their progress so far.
> 
> > Also, I think the QCom GPU use of this should be fully sorted out. Or 
> > more generically how this fits into OPP binding which seems to be never 
> > ending extended...
> 
> I see this as a further step. It could be OPP binding which include
> bandwidth values or some separate DT property. Jordan has already
> proposed something, do you have any initial comments on that?

I am curious as how this fits into new systems which have firmware driven
CPUFreq and other DVFS. I would like to avoid using this in such systems
and leave it upto the firmware to scale the bus/interconnect based on the
other components that are connected to it and active.

--
Regards,
Sudeep

  reply	other threads:[~2018-09-26 14:48 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-31 14:01 [PATCH v9 0/8] Introduce on-chip interconnect API Georgi Djakov
2018-08-31 14:01 ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 1/8] interconnect: Add generic " Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 2/8] dt-bindings: Introduce interconnect binding Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-09-25 18:02   ` Rob Herring
2018-09-25 18:02     ` Rob Herring
2018-09-26 14:34     ` Jordan Crouse
2018-09-26 14:34       ` Jordan Crouse
2018-10-01 20:56       ` Saravana Kannan
2018-10-01 20:56         ` Saravana Kannan
2018-10-01 21:26         ` Jordan Crouse
2018-10-01 21:26           ` Jordan Crouse
2018-10-01 21:51           ` Saravana Kannan
2018-10-01 21:51             ` Saravana Kannan
2018-09-26 14:42     ` Georgi Djakov
2018-09-26 14:42       ` Georgi Djakov
2018-09-26 14:48       ` Sudeep Holla [this message]
2018-09-26 14:48         ` Sudeep Holla
2018-09-26 15:03         ` Georgi Djakov
2018-09-26 15:03           ` Georgi Djakov
2018-10-01 23:49         ` Saravana Kannan
2018-10-01 23:49           ` Saravana Kannan
2018-10-02 11:17           ` Sudeep Holla
2018-10-02 11:17             ` Sudeep Holla
2018-10-02 18:56             ` Saravana Kannan
2018-10-02 18:56               ` Saravana Kannan
2018-10-03  9:33               ` Sudeep Holla
2018-10-03  9:33                 ` Sudeep Holla
2018-10-03 18:06                 ` Saravana Kannan
2018-10-03 18:06                   ` Saravana Kannan
2018-10-10 15:02                   ` Sudeep Holla
2018-10-10 15:02                     ` Sudeep Holla
2018-11-27 18:05       ` Georgi Djakov
2018-11-27 18:05         ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 3/8] interconnect: Allow endpoints translation via DT Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 4/8] interconnect: Add debugfs support Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 5/8] interconnect: qcom: Add RPM communication Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-09-25 18:17   ` Rob Herring
2018-09-25 18:17     ` Rob Herring
2018-10-02 11:02     ` Georgi Djakov
2018-10-02 11:02       ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 6/8] dt-bindings: interconnect: Document qcom,msm8916 NoC bindings Georgi Djakov
2018-08-31 14:01   ` [PATCH v9 6/8] dt-bindings: interconnect: Document qcom, msm8916 " Georgi Djakov
2018-09-25 18:22   ` [PATCH v9 6/8] dt-bindings: interconnect: Document qcom,msm8916 " Rob Herring
2018-09-25 18:22     ` Rob Herring
2018-10-02 11:02     ` Georgi Djakov
2018-10-02 11:02       ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 7/8] interconnect: qcom: Add msm8916 interconnect provider driver Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 8/8] MAINTAINERS: add a maintainer for the interconnect API Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-09-04 10:24 ` [PATCH v9 0/8] Introduce on-chip " Amit Kucheria
2018-09-04 10:24   ` Amit Kucheria
2018-09-04 10:24   ` Amit Kucheria
2018-09-04 23:36   ` Stephen Rothwell
2018-09-04 23:36     ` Stephen Rothwell
2018-09-04 23:36     ` Stephen Rothwell
2018-09-05 14:50     ` Georgi Djakov
2018-09-05 14:50       ` Georgi Djakov
2018-09-05 14:50       ` Georgi Djakov
2018-09-05 15:05       ` Stephen Rothwell
2018-09-05 15:05         ` Stephen Rothwell
2018-09-05 15:05         ` Stephen Rothwell

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