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From: Georgi Djakov <georgi.djakov@linaro.org>
To: Rob Herring <robh@kernel.org>
Cc: linux-pm@vger.kernel.org, gregkh@linuxfoundation.org,
	rjw@rjwysocki.net, mturquette@baylibre.com, khilman@baylibre.com,
	vincent.guittot@linaro.org, skannan@codeaurora.org,
	bjorn.andersson@linaro.org, amit.kucheria@linaro.org,
	seansw@qti.qualcomm.com, daidavid1@codeaurora.org,
	evgreen@chromium.org, mark.rutland@arm.com,
	lorenzo.pieralisi@arm.com, abailon@baylibre.com,
	maxime.ripard@bootlin.com, arnd@arndb.de,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v9 5/8] interconnect: qcom: Add RPM communication
Date: Tue, 2 Oct 2018 14:02:42 +0300	[thread overview]
Message-ID: <ab1db6d6-3eff-0fec-6647-3bc1910bc8b2@linaro.org> (raw)
In-Reply-To: <20180925181735.GA28385@bogus>

Hi Rob,

On 09/25/2018 09:17 PM, Rob Herring wrote:
> On Fri, Aug 31, 2018 at 05:01:48PM +0300, Georgi Djakov wrote:
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other CPUs express their needs
>> by communicating with this processor. Add a driver to handle communication
>> with this remote processor.
> 
> I don't think you should have a binding nor a separate driver for this. 
> It's not actually an interconnect provider, so it doesn't belong in 
> bindings/interconnect. And it just looks like abuse of DT to instantiate 
> some driver.

The idea of this binding here is to represent the remote processor, that
is also in control of some of the shared interconnect paths. The
bandwidth needs of the DSPs and modem are also reported to this remote
processor. It also takes over some of the bandwidth management while the
application CPU is powered down. So yes, it is also a kind of an
interconnect provider, so IMO it should be in DT.
We already have similar DT sub-nodes for remote regulator and clock
resources and this is just adding another sub-node for the interconnect
bandwidth related subsystem.

This, together with each separate NoC hardware block (in patch 6/8) are
building up the whole topology. The configuration of interconnect paths
consists of a combination of register writes, clock scaling and sending
a message to the remote processor.

> All the driver amounts to is a 1 function wrapper for RPM_KEY_BW 
> messages. Can't this be part of the parent?

I am re-using this part for other SoCs and have separated it to avoid
duplication.

Thanks,
Georgi

WARNING: multiple messages have this Message-ID (diff)
From: georgi.djakov@linaro.org (Georgi Djakov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 5/8] interconnect: qcom: Add RPM communication
Date: Tue, 2 Oct 2018 14:02:42 +0300	[thread overview]
Message-ID: <ab1db6d6-3eff-0fec-6647-3bc1910bc8b2@linaro.org> (raw)
In-Reply-To: <20180925181735.GA28385@bogus>

Hi Rob,

On 09/25/2018 09:17 PM, Rob Herring wrote:
> On Fri, Aug 31, 2018 at 05:01:48PM +0300, Georgi Djakov wrote:
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other CPUs express their needs
>> by communicating with this processor. Add a driver to handle communication
>> with this remote processor.
> 
> I don't think you should have a binding nor a separate driver for this. 
> It's not actually an interconnect provider, so it doesn't belong in 
> bindings/interconnect. And it just looks like abuse of DT to instantiate 
> some driver.

The idea of this binding here is to represent the remote processor, that
is also in control of some of the shared interconnect paths. The
bandwidth needs of the DSPs and modem are also reported to this remote
processor. It also takes over some of the bandwidth management while the
application CPU is powered down. So yes, it is also a kind of an
interconnect provider, so IMO it should be in DT.
We already have similar DT sub-nodes for remote regulator and clock
resources and this is just adding another sub-node for the interconnect
bandwidth related subsystem.

This, together with each separate NoC hardware block (in patch 6/8) are
building up the whole topology. The configuration of interconnect paths
consists of a combination of register writes, clock scaling and sending
a message to the remote processor.

> All the driver amounts to is a 1 function wrapper for RPM_KEY_BW 
> messages. Can't this be part of the parent?

I am re-using this part for other SoCs and have separated it to avoid
duplication.

Thanks,
Georgi

  reply	other threads:[~2018-10-02 11:02 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-31 14:01 [PATCH v9 0/8] Introduce on-chip interconnect API Georgi Djakov
2018-08-31 14:01 ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 1/8] interconnect: Add generic " Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 2/8] dt-bindings: Introduce interconnect binding Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-09-25 18:02   ` Rob Herring
2018-09-25 18:02     ` Rob Herring
2018-09-26 14:34     ` Jordan Crouse
2018-09-26 14:34       ` Jordan Crouse
2018-10-01 20:56       ` Saravana Kannan
2018-10-01 20:56         ` Saravana Kannan
2018-10-01 21:26         ` Jordan Crouse
2018-10-01 21:26           ` Jordan Crouse
2018-10-01 21:51           ` Saravana Kannan
2018-10-01 21:51             ` Saravana Kannan
2018-09-26 14:42     ` Georgi Djakov
2018-09-26 14:42       ` Georgi Djakov
2018-09-26 14:48       ` Sudeep Holla
2018-09-26 14:48         ` Sudeep Holla
2018-09-26 15:03         ` Georgi Djakov
2018-09-26 15:03           ` Georgi Djakov
2018-10-01 23:49         ` Saravana Kannan
2018-10-01 23:49           ` Saravana Kannan
2018-10-02 11:17           ` Sudeep Holla
2018-10-02 11:17             ` Sudeep Holla
2018-10-02 18:56             ` Saravana Kannan
2018-10-02 18:56               ` Saravana Kannan
2018-10-03  9:33               ` Sudeep Holla
2018-10-03  9:33                 ` Sudeep Holla
2018-10-03 18:06                 ` Saravana Kannan
2018-10-03 18:06                   ` Saravana Kannan
2018-10-10 15:02                   ` Sudeep Holla
2018-10-10 15:02                     ` Sudeep Holla
2018-11-27 18:05       ` Georgi Djakov
2018-11-27 18:05         ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 3/8] interconnect: Allow endpoints translation via DT Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 4/8] interconnect: Add debugfs support Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 5/8] interconnect: qcom: Add RPM communication Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-09-25 18:17   ` Rob Herring
2018-09-25 18:17     ` Rob Herring
2018-10-02 11:02     ` Georgi Djakov [this message]
2018-10-02 11:02       ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 6/8] dt-bindings: interconnect: Document qcom,msm8916 NoC bindings Georgi Djakov
2018-08-31 14:01   ` [PATCH v9 6/8] dt-bindings: interconnect: Document qcom, msm8916 " Georgi Djakov
2018-09-25 18:22   ` [PATCH v9 6/8] dt-bindings: interconnect: Document qcom,msm8916 " Rob Herring
2018-09-25 18:22     ` Rob Herring
2018-10-02 11:02     ` Georgi Djakov
2018-10-02 11:02       ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 7/8] interconnect: qcom: Add msm8916 interconnect provider driver Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-08-31 14:01 ` [PATCH v9 8/8] MAINTAINERS: add a maintainer for the interconnect API Georgi Djakov
2018-08-31 14:01   ` Georgi Djakov
2018-09-04 10:24 ` [PATCH v9 0/8] Introduce on-chip " Amit Kucheria
2018-09-04 10:24   ` Amit Kucheria
2018-09-04 10:24   ` Amit Kucheria
2018-09-04 23:36   ` Stephen Rothwell
2018-09-04 23:36     ` Stephen Rothwell
2018-09-04 23:36     ` Stephen Rothwell
2018-09-05 14:50     ` Georgi Djakov
2018-09-05 14:50       ` Georgi Djakov
2018-09-05 14:50       ` Georgi Djakov
2018-09-05 15:05       ` Stephen Rothwell
2018-09-05 15:05         ` Stephen Rothwell
2018-09-05 15:05         ` Stephen Rothwell

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