From: Jacob Pan <jacob.jun.pan@linux.intel.com> To: Joerg Roedel <joro@8bytes.org> Cc: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>, Lu Baolu <baolu.lu@linux.intel.com>, "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>, "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "jcrouse@codeaurora.org" <jcrouse@codeaurora.org>, "alex.williamson@redhat.com" <alex.williamson@redhat.com>, "Jonathan.Cameron@huawei.com" <Jonathan.Cameron@huawei.com>, "christian.koenig@amd.com" <christian.koenig@amd.com>, "eric.auger@redhat.com" <eric.auger@redhat.com>, "kevin.tian@intel.com" <kevin.tian@intel.com>, "yi.l.liu@intel.com" <yi.l.liu@intel.com>, Andrew Murray <Andrew.Murray@arm.com>, Will Deacon <Will.Deacon@arm.com>, Robin Murphy <Robin.Murphy@arm.com>, "ashok.raj@intel.com" <ashok.raj@intel.com>, "xuzaibo@huawei.com" <xuzaibo@huawei.com>, "liguozhu@hisilicon.com" <liguozhu@hisilicon.com>, "okaya@codeaurora.org" <okaya@codeaurora.org>, "bharatku@xilinx.com" <bharatku@xilinx.com>, "ilias.apalodimas@linaro.org" <ilias.apalodimas@linaro.org>, "shunyong.yang@hxt-semitech.com" <shunyong.yang@hxt-semitech.com>, jacob.jun.pan@linux.intel.com Subject: Re: [PATCH v3 03/10] iommu/sva: Manage process address spaces Date: Wed, 26 Sep 2018 15:58:22 -0700 [thread overview] Message-ID: <20180926155822.167cccb3@jacob-builder> (raw) In-Reply-To: <20180926124527.GD18287@8bytes.org> On Wed, 26 Sep 2018 14:45:27 +0200 Joerg Roedel <joro@8bytes.org> wrote: > On Wed, Sep 26, 2018 at 11:20:34AM +0100, Jean-Philippe Brucker wrote: > > Yes, at the moment it's difficult to guess what device drivers will > > want, but I can imagine some driver offering SVA to userspace, while > > keeping a few PASIDs for themselves to map kernel memory. Or create > > mdev devices for virtualization while also allowing bare-metal SVA. > > So I think we should aim at enabling these use-cases in parallel, > > even if it doesn't necessarily need to be possible right now. > > Yeah okay, but allowing these use-cases in parallel basically > disallows giving any guest control over a device's pasid-table, no? > For VT-d 3 (which is the only revision to support PASID), PASID table is always controlled by the host driver. Guest SVA usage would bind PASID with gCR3. But I thought ARM (https://lkml.org/lkml/2018/9/18/1082) is using bind PASID table approach which gives guest control of the device PASID table. I don't know if that is intended for any parallel use of PASID on the same device. > I am just asking because I want to make up my mind about the necessary > extensions to the IOMMU-API. > One extension, we will need and being developed is bind_guest_pasid() for guest SVA usage. Usage: 1. guest allocate a system wide PASID for SVA 2. guest write PASID to its PASID table 3. PASID cache flush results in bind PASID (from guest) to device 4. Host IOMMU driver install gCR3s of the PASID to device PASID table (ops.bind_guest_pasid) Thanks, Jacob > > Regards, > > Joerg > [Jacob Pan]
WARNING: multiple messages have this Message-ID (diff)
From: Jacob Pan <jacob.jun.pan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> To: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> Cc: "linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" <linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org>, "okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org" <okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>, "ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org" <ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>, Jean-Philippe Brucker <jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>, "kevin.tian-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org" <kevin.tian-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>, "alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org" <alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>, Robin Murphy <Robin.Murphy-5wv7dgnIgG8@public.gmane.org>, "ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" <ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>, "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>, "liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org" <liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>, "christian.koenig-5C7GfCeVMHo@public.gmane.org" <christian.koenig-5C7GfCeVMHo@public.gmane.org> Subject: Re: [PATCH v3 03/10] iommu/sva: Manage process address spaces Date: Wed, 26 Sep 2018 15:58:22 -0700 [thread overview] Message-ID: <20180926155822.167cccb3@jacob-builder> (raw) In-Reply-To: <20180926124527.GD18287-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> On Wed, 26 Sep 2018 14:45:27 +0200 Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> wrote: > On Wed, Sep 26, 2018 at 11:20:34AM +0100, Jean-Philippe Brucker wrote: > > Yes, at the moment it's difficult to guess what device drivers will > > want, but I can imagine some driver offering SVA to userspace, while > > keeping a few PASIDs for themselves to map kernel memory. Or create > > mdev devices for virtualization while also allowing bare-metal SVA. > > So I think we should aim at enabling these use-cases in parallel, > > even if it doesn't necessarily need to be possible right now. > > Yeah okay, but allowing these use-cases in parallel basically > disallows giving any guest control over a device's pasid-table, no? > For VT-d 3 (which is the only revision to support PASID), PASID table is always controlled by the host driver. Guest SVA usage would bind PASID with gCR3. But I thought ARM (https://lkml.org/lkml/2018/9/18/1082) is using bind PASID table approach which gives guest control of the device PASID table. I don't know if that is intended for any parallel use of PASID on the same device. > I am just asking because I want to make up my mind about the necessary > extensions to the IOMMU-API. > One extension, we will need and being developed is bind_guest_pasid() for guest SVA usage. Usage: 1. guest allocate a system wide PASID for SVA 2. guest write PASID to its PASID table 3. PASID cache flush results in bind PASID (from guest) to device 4. Host IOMMU driver install gCR3s of the PASID to device PASID table (ops.bind_guest_pasid) Thanks, Jacob > > Regards, > > Joerg > [Jacob Pan]
next prev parent reply other threads:[~2018-09-26 22:57 UTC|newest] Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-09-20 17:00 [PATCH v3 00/10] Shared Virtual Addressing for the IOMMU Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-20 17:00 ` [PATCH v3 01/10] iommu: Introduce Shared Virtual Addressing API Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker [not found] ` <20180920170046.20154-2-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org> 2018-09-23 2:39 ` Lu Baolu 2018-09-24 12:07 ` Jean-Philippe Brucker 2018-09-24 12:07 ` Jean-Philippe Brucker 2018-09-25 13:16 ` Joerg Roedel 2018-09-25 13:16 ` Joerg Roedel 2018-09-25 22:46 ` Jacob Pan 2018-09-25 22:46 ` Jacob Pan 2018-09-26 10:14 ` Jean-Philippe Brucker 2018-09-26 10:14 ` Jean-Philippe Brucker 2018-09-26 12:48 ` Joerg Roedel 2018-09-26 12:48 ` Joerg Roedel 2018-09-20 17:00 ` [PATCH v3 02/10] iommu/sva: Bind process address spaces to devices Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-23 3:05 ` Lu Baolu 2018-09-23 3:05 ` Lu Baolu 2018-09-24 12:07 ` Jean-Philippe Brucker 2018-09-24 12:07 ` Jean-Philippe Brucker 2018-09-26 18:01 ` Jacob Pan 2018-09-26 18:01 ` Jacob Pan 2018-09-27 15:06 ` Jean-Philippe Brucker 2018-09-27 15:06 ` Jean-Philippe Brucker 2018-09-28 1:14 ` Tian, Kevin 2018-09-28 1:14 ` Tian, Kevin 2018-09-20 17:00 ` [PATCH v3 03/10] iommu/sva: Manage process address spaces Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-25 3:15 ` Lu Baolu 2018-09-25 3:15 ` Lu Baolu 2018-09-25 10:32 ` Jean-Philippe Brucker 2018-09-25 10:32 ` Jean-Philippe Brucker 2018-09-26 3:12 ` Lu Baolu 2018-09-26 3:12 ` Lu Baolu 2018-09-25 13:26 ` Joerg Roedel 2018-09-25 13:26 ` Joerg Roedel 2018-09-25 23:33 ` Lu Baolu 2018-09-25 23:33 ` Lu Baolu 2018-09-26 10:20 ` Jean-Philippe Brucker 2018-09-26 10:20 ` Jean-Philippe Brucker 2018-09-26 12:45 ` Joerg Roedel 2018-09-26 12:45 ` Joerg Roedel 2018-09-26 13:50 ` Jean-Philippe Brucker 2018-09-26 13:50 ` Jean-Philippe Brucker 2018-09-27 3:22 ` Liu, Yi L 2018-09-27 3:22 ` Liu, Yi L 2018-09-27 13:37 ` Jean-Philippe Brucker 2018-09-27 13:37 ` Jean-Philippe Brucker 2018-10-08 8:29 ` Liu, Yi L 2018-10-08 8:29 ` Liu, Yi L 2018-09-26 22:58 ` Jacob Pan [this message] 2018-09-26 22:58 ` Jacob Pan 2018-09-26 22:35 ` Jacob Pan 2018-09-26 22:35 ` Jacob Pan 2018-10-03 17:52 ` Jean-Philippe Brucker 2018-10-03 17:52 ` Jean-Philippe Brucker 2018-10-15 20:53 ` Jacob Pan 2018-10-15 20:53 ` Jacob Pan 2018-09-20 17:00 ` [PATCH v3 04/10] iommu/sva: Add a mm_exit callback for device drivers Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-20 17:00 ` [PATCH v3 05/10] iommu/sva: Track mm changes with an MMU notifier Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-20 17:00 ` [PATCH v3 06/10] iommu/sva: Search mm by PASID Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-25 4:59 ` Lu Baolu 2018-09-25 4:59 ` Lu Baolu 2018-09-20 17:00 ` [PATCH v3 07/10] iommu: Add a page fault handler Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-27 20:37 ` Jacob Pan 2018-09-27 20:37 ` Jacob Pan 2018-10-03 17:46 ` Jean-Philippe Brucker 2018-10-03 17:46 ` Jean-Philippe Brucker 2018-09-20 17:00 ` [PATCH v3 08/10] iommu/iopf: Handle mm faults Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-20 17:00 ` [PATCH v3 09/10] iommu/sva: Register page fault handler Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-09-20 17:00 ` [RFC PATCH v3 10/10] iommu/sva: Add support for private PASIDs Jean-Philippe Brucker 2018-09-20 17:00 ` Jean-Philippe Brucker 2018-10-12 14:32 ` Jordan Crouse 2018-10-12 14:32 ` Jordan Crouse 2018-10-17 14:21 ` Jean-Philippe Brucker 2018-10-17 14:21 ` Jean-Philippe Brucker 2018-10-17 14:24 ` Jean-Philippe Brucker 2018-10-17 14:24 ` Jean-Philippe Brucker 2018-10-17 15:07 ` Jordan Crouse 2018-10-17 15:07 ` Jordan Crouse
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20180926155822.167cccb3@jacob-builder \ --to=jacob.jun.pan@linux.intel.com \ --cc=Andrew.Murray@arm.com \ --cc=Jonathan.Cameron@huawei.com \ --cc=Robin.Murphy@arm.com \ --cc=Will.Deacon@arm.com \ --cc=alex.williamson@redhat.com \ --cc=ashok.raj@intel.com \ --cc=baolu.lu@linux.intel.com \ --cc=bharatku@xilinx.com \ --cc=christian.koenig@amd.com \ --cc=eric.auger@redhat.com \ --cc=ilias.apalodimas@linaro.org \ --cc=iommu@lists.linux-foundation.org \ --cc=jcrouse@codeaurora.org \ --cc=jean-philippe.brucker@arm.com \ --cc=joro@8bytes.org \ --cc=kevin.tian@intel.com \ --cc=liguozhu@hisilicon.com \ --cc=linux-pci@vger.kernel.org \ --cc=okaya@codeaurora.org \ --cc=shunyong.yang@hxt-semitech.com \ --cc=xuzaibo@huawei.com \ --cc=yi.l.liu@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.