From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Hao Zhang <hao5781286-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org,
wens-jdAy2FN1RRM@public.gmane.org,
mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
Date: Thu, 20 Dec 2018 18:50:09 +0100 [thread overview]
Message-ID: <20181220175009.GF9408@ulmo> (raw)
In-Reply-To: <20181125161859.GA5277@arx-s1>
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On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
Why do you need this? In the cover letter you say:
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."
Why does this need to be specified in the DT?
Thierry
WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Hao Zhang <hao5781286@gmail.com>
Cc: robh+dt@kernel.org, mark.rutland@arm.com,
maxime.ripard@bootlin.com, wens@csie.org,
mturquette@baylibre.com, sboyd@kernel.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-pwm@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
Date: Thu, 20 Dec 2018 18:50:09 +0100 [thread overview]
Message-ID: <20181220175009.GF9408@ulmo> (raw)
In-Reply-To: <20181125161859.GA5277@arx-s1>
[-- Attachment #1: Type: text/plain, Size: 1289 bytes --]
On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
Why do you need this? In the cover letter you say:
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."
Why does this need to be specified in the DT?
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Hao Zhang <hao5781286@gmail.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, maxime.ripard@bootlin.com,
mturquette@baylibre.com, linux-sunxi@googlegroups.com,
linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,
sboyd@kernel.org, wens@csie.org, robh+dt@kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
Date: Thu, 20 Dec 2018 18:50:09 +0100 [thread overview]
Message-ID: <20181220175009.GF9408@ulmo> (raw)
In-Reply-To: <20181125161859.GA5277@arx-s1>
[-- Attachment #1.1: Type: text/plain, Size: 1289 bytes --]
On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
Why do you need this? In the cover letter you say:
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."
Why does this need to be specified in the DT?
Thierry
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next prev parent reply other threads:[~2018-12-20 17:50 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-25 16:18 [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i Hao Zhang
2018-11-25 16:18 ` Hao Zhang
2018-11-25 16:18 ` Hao Zhang
2018-11-27 1:57 ` Rob Herring
2018-11-27 1:57 ` Rob Herring
2018-11-27 1:57 ` Rob Herring
2018-11-27 7:04 ` Uwe Kleine-König
2018-11-27 7:04 ` Uwe Kleine-König
2018-11-27 7:52 ` Maxime Ripard
2018-11-27 7:52 ` Maxime Ripard
2018-11-27 7:52 ` Maxime Ripard
2018-11-27 8:35 ` Uwe Kleine-König
2018-11-27 8:35 ` Uwe Kleine-König
[not found] ` <20181127083523.pciie2gyaplrwiey-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2018-11-27 10:32 ` Maxime Ripard
2018-11-27 10:32 ` Maxime Ripard
2018-11-27 10:32 ` Maxime Ripard
[not found] ` <CAJeuY79RRzTqLpaXSe5d8TuNKGeQeYLbXraRVrZk9HBMYBf1+A@mail.gmail.com>
[not found] ` <CAJeuY79RRzTqLpaXSe5d8TuNKGeQeYLbXraRVrZk9HBMYBf1+A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-12-03 9:28 ` Maxime Ripard
2018-12-03 9:28 ` Maxime Ripard
2018-12-03 9:28 ` Maxime Ripard
2018-12-20 17:50 ` Thierry Reding [this message]
2018-12-20 17:50 ` Thierry Reding
2018-12-20 17:50 ` Thierry Reding
[not found] ` <CAJeuY7-StNNDpBPyw1JH5Jmc-NhDw67F6Veh0S2tBTmENCTY8Q@mail.gmail.com>
[not found] ` <CAJeuY7-StNNDpBPyw1JH5Jmc-NhDw67F6Veh0S2tBTmENCTY8Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-03-12 5:03 ` Fwd: " Hao Zhang
2019-03-12 5:03 ` Hao Zhang
2019-03-12 5:03 ` Hao Zhang
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