* [PATCH 1/2] drm/i915: Use mul_u32_u32() more
@ 2019-04-08 15:27 Ville Syrjala
2019-04-08 15:27 ` [PATCH 2/2] drm/i915: Simplify some icl pll calculations Ville Syrjala
` (8 more replies)
0 siblings, 9 replies; 18+ messages in thread
From: Ville Syrjala @ 2019-04-08 15:27 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We have a lot of '(u64)foo * bar' everywhere. Replace with
mul_u32_u32() to avoid gcc failing to use a regular 32x32->64
multiply for this.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_fixed.h | 6 +++---
drivers/gpu/drm/i915/intel_display.c | 10 +++++-----
drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 ++--
drivers/gpu/drm/i915/intel_pm.c | 2 +-
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_fixed.h b/drivers/gpu/drm/i915/i915_fixed.h
index 591dd89ba7af..6621595fe74c 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -71,7 +71,7 @@ static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul)
{
u64 tmp;
- tmp = (u64)val * mul.val;
+ tmp = mul_u32_u32(val, mul.val);
tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16);
WARN_ON(tmp > U32_MAX);
@@ -83,7 +83,7 @@ static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
{
u64 tmp;
- tmp = (u64)val.val * mul.val;
+ tmp = mul_u32_u32(val.val, mul.val);
tmp = tmp >> 16;
return clamp_u64_to_fixed16(tmp);
@@ -114,7 +114,7 @@ static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul
{
u64 tmp;
- tmp = (u64)val * mul.val;
+ tmp = mul_u32_u32(val, mul.val);
return clamp_u64_to_fixed16(tmp);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index cb7f99618f02..f10ea27d1fc8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -550,7 +550,7 @@ int chv_calc_dpll_params(int refclk, struct dpll *clock)
clock->p = clock->p1 * clock->p2;
if (WARN_ON(clock->n == 0 || clock->p == 0))
return 0;
- clock->vco = DIV_ROUND_CLOSEST_ULL((u64)refclk * clock->m,
+ clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m),
clock->n << 22);
clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
@@ -935,8 +935,8 @@ chv_find_best_dpll(const struct intel_limit *limit,
clock.p = clock.p1 * clock.p2;
- m2 = DIV_ROUND_CLOSEST_ULL(((u64)target * clock.p *
- clock.n) << 22, refclk * clock.m1);
+ m2 = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(target, clock.p * clock.n) << 22,
+ refclk * clock.m1);
if (m2 > INT_MAX/clock.m1)
continue;
@@ -6871,7 +6871,7 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config)
if (WARN_ON(!pfit_w || !pfit_h))
return pixel_rate;
- pixel_rate = div_u64((u64)pixel_rate * pipe_w * pipe_h,
+ pixel_rate = div_u64(mul_u32_u32(pixel_rate, pipe_w * pipe_h),
pfit_w * pfit_h);
}
@@ -6991,7 +6991,7 @@ static void compute_m_n(unsigned int m, unsigned int n,
else
*ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
- *ret_m = div_u64((u64)m * *ret_n, n);
+ *ret_m = div_u64(mul_u32_u32(m, *ret_n), n);
intel_reduce_m_n_ratio(ret_m, ret_n);
}
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e01c057ce50b..29edc369920b 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2741,11 +2741,11 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state)
}
if (use_ssc) {
- tmp = (u64)dco_khz * 47 * 32;
+ tmp = mul_u32_u32(dco_khz, 47 * 32);
do_div(tmp, refclk_khz * m1div * 10000);
ssc_stepsize = tmp;
- tmp = (u64)dco_khz * 1000;
+ tmp = mul_u32_u32(dco_khz, 1000);
ssc_steplen = DIV_ROUND_UP_ULL(tmp, 32 * 2 * 32);
} else {
ssc_stepsize = 0;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bba477e62a12..31c03673697e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -675,7 +675,7 @@ static unsigned int intel_wm_method1(unsigned int pixel_rate,
{
u64 ret;
- ret = (u64)pixel_rate * cpp * latency;
+ ret = mul_u32_u32(pixel_rate, cpp * latency);
ret = DIV_ROUND_UP_ULL(ret, 10000);
return ret;
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
@ 2019-04-08 15:27 ` Ville Syrjala
2019-04-08 15:49 ` Chris Wilson
2019-04-08 15:40 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more Patchwork
` (7 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjala @ 2019-04-08 15:27 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Write some icl pll calculations in a more straightforward way.
We have just enough bits for the full divisor.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_ddi.c | 15 ++++-----------
drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +-
2 files changed, 5 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 720de7a3f5e6..0a24608ce49b 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1386,8 +1386,7 @@ static int icl_calc_tbt_pll_link(struct drm_i915_private *dev_priv,
static int icl_calc_mg_pll_link(struct drm_i915_private *dev_priv,
const struct intel_dpll_hw_state *pll_state)
{
- u32 m1, m2_int, m2_frac, div1, div2, ref_clock;
- u64 tmp;
+ u32 m1, m2, m2_int, m2_frac, div1, div2, ref_clock;
ref_clock = dev_priv->cdclk.hw.ref;
@@ -1396,6 +1395,7 @@ static int icl_calc_mg_pll_link(struct drm_i915_private *dev_priv,
m2_frac = (pll_state->mg_pll_div0 & MG_PLL_DIV0_FRACNEN_H) ?
(pll_state->mg_pll_div0 & MG_PLL_DIV0_FBDIV_FRAC_MASK) >>
MG_PLL_DIV0_FBDIV_FRAC_SHIFT : 0;
+ m2 = (m2_int << 22) | m2_frac;
switch (pll_state->mg_clktop2_hsclkctl &
MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_MASK) {
@@ -1424,15 +1424,8 @@ static int icl_calc_mg_pll_link(struct drm_i915_private *dev_priv,
if (div2 == 0)
div2 = 1;
- /*
- * Adjust the original formula to delay the division by 2^22 in order to
- * minimize possible rounding errors.
- */
- tmp = (u64)m1 * m2_int * ref_clock +
- (((u64)m1 * m2_frac * ref_clock) >> 22);
- tmp = div_u64(tmp, 5 * div1 * div2);
-
- return tmp;
+ return div_u64(mul_u32_u32(ref_clock * m1, m2),
+ (5 * div1 * div2) << 22);
}
static void ddi_dotclock_get(struct intel_crtc_state *pipe_config)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 29edc369920b..3098c783a615 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2682,7 +2682,7 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state)
}
m2div_rem = dco_khz % (refclk_khz * m1div);
- tmp = (u64)m2div_rem * (1 << 22);
+ tmp = (u64)m2div_rem << 22;
do_div(tmp, refclk_khz * m1div);
m2div_frac = tmp;
--
2.21.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-08 15:27 ` [PATCH 2/2] drm/i915: Simplify some icl pll calculations Ville Syrjala
@ 2019-04-08 15:49 ` Chris Wilson
2019-04-08 16:06 ` Ville Syrjälä
0 siblings, 1 reply; 18+ messages in thread
From: Chris Wilson @ 2019-04-08 15:49 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2019-04-08 16:27:02)
> - /*
> - * Adjust the original formula to delay the division by 2^22 in order to
> - * minimize possible rounding errors.
> - */
> - tmp = (u64)m1 * m2_int * ref_clock +
> - (((u64)m1 * m2_frac * ref_clock) >> 22);
> - tmp = div_u64(tmp, 5 * div1 * div2);
> -
> - return tmp;
> + return div_u64(mul_u32_u32(ref_clock * m1, m2),
> + (5 * div1 * div2) << 22);
You say the denominator here is a u64, so do you not need to cast
(u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
Aiui d1, d2 are u32 here.
-Chris
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-08 15:49 ` Chris Wilson
@ 2019-04-08 16:06 ` Ville Syrjälä
2019-04-08 16:14 ` Chris Wilson
2019-04-08 17:05 ` Chris Wilson
0 siblings, 2 replies; 18+ messages in thread
From: Ville Syrjälä @ 2019-04-08 16:06 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Mon, Apr 08, 2019 at 04:49:13PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2019-04-08 16:27:02)
> > - /*
> > - * Adjust the original formula to delay the division by 2^22 in order to
> > - * minimize possible rounding errors.
> > - */
> > - tmp = (u64)m1 * m2_int * ref_clock +
> > - (((u64)m1 * m2_frac * ref_clock) >> 22);
> > - tmp = div_u64(tmp, 5 * div1 * div2);
> > -
> > - return tmp;
> > + return div_u64(mul_u32_u32(ref_clock * m1, m2),
> > + (5 * div1 * div2) << 22);
>
> You say the denominator here is a u64, so do you not need to cast
> (u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
It should fit into u32. The maximum value should be
<= (5*0xf*0x7)<<22 based on the number of bits available
for div1/2.
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-08 16:06 ` Ville Syrjälä
@ 2019-04-08 16:14 ` Chris Wilson
2019-04-08 17:05 ` Chris Wilson
1 sibling, 0 replies; 18+ messages in thread
From: Chris Wilson @ 2019-04-08 16:14 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2019-04-08 17:06:01)
> On Mon, Apr 08, 2019 at 04:49:13PM +0100, Chris Wilson wrote:
> > Quoting Ville Syrjala (2019-04-08 16:27:02)
> > > - /*
> > > - * Adjust the original formula to delay the division by 2^22 in order to
> > > - * minimize possible rounding errors.
> > > - */
> > > - tmp = (u64)m1 * m2_int * ref_clock +
> > > - (((u64)m1 * m2_frac * ref_clock) >> 22);
> > > - tmp = div_u64(tmp, 5 * div1 * div2);
> > > -
> > > - return tmp;
> > > + return div_u64(mul_u32_u32(ref_clock * m1, m2),
> > > + (5 * div1 * div2) << 22);
> >
> > You say the denominator here is a u64, so do you not need to cast
> > (u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
>
> It should fit into u32. The maximum value should be
> <= (5*0xf*0x7)<<22 based on the number of bits available
> for div1/2.
No worries, I was thinking div_u64 == div_u64_u64 anyway.
-Chris
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-08 16:06 ` Ville Syrjälä
2019-04-08 16:14 ` Chris Wilson
@ 2019-04-08 17:05 ` Chris Wilson
2019-04-10 17:59 ` Ville Syrjälä
1 sibling, 1 reply; 18+ messages in thread
From: Chris Wilson @ 2019-04-08 17:05 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2019-04-08 17:06:01)
> On Mon, Apr 08, 2019 at 04:49:13PM +0100, Chris Wilson wrote:
> > Quoting Ville Syrjala (2019-04-08 16:27:02)
> > > - /*
> > > - * Adjust the original formula to delay the division by 2^22 in order to
> > > - * minimize possible rounding errors.
> > > - */
> > > - tmp = (u64)m1 * m2_int * ref_clock +
> > > - (((u64)m1 * m2_frac * ref_clock) >> 22);
> > > - tmp = div_u64(tmp, 5 * div1 * div2);
> > > -
> > > - return tmp;
> > > + return div_u64(mul_u32_u32(ref_clock * m1, m2),
> > > + (5 * div1 * div2) << 22);
> >
> > You say the denominator here is a u64, so do you not need to cast
> > (u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
>
> It should fit into u32. The maximum value should be
> <= (5*0xf*0x7)<<22 based on the number of bits available
3b * 4b * 3b = 10b. So just fits.
Is it worth asserting those limits? Feels like it is running close, and
will be subject to cargo-culting.
-Chris
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-08 17:05 ` Chris Wilson
@ 2019-04-10 17:59 ` Ville Syrjälä
2019-04-10 18:13 ` Chris Wilson
0 siblings, 1 reply; 18+ messages in thread
From: Ville Syrjälä @ 2019-04-10 17:59 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Mon, Apr 08, 2019 at 06:05:06PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2019-04-08 17:06:01)
> > On Mon, Apr 08, 2019 at 04:49:13PM +0100, Chris Wilson wrote:
> > > Quoting Ville Syrjala (2019-04-08 16:27:02)
> > > > - /*
> > > > - * Adjust the original formula to delay the division by 2^22 in order to
> > > > - * minimize possible rounding errors.
> > > > - */
> > > > - tmp = (u64)m1 * m2_int * ref_clock +
> > > > - (((u64)m1 * m2_frac * ref_clock) >> 22);
> > > > - tmp = div_u64(tmp, 5 * div1 * div2);
> > > > -
> > > > - return tmp;
> > > > + return div_u64(mul_u32_u32(ref_clock * m1, m2),
> > > > + (5 * div1 * div2) << 22);
> > >
> > > You say the denominator here is a u64, so do you not need to cast
> > > (u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
> >
> > It should fit into u32. The maximum value should be
> > <= (5*0xf*0x7)<<22 based on the number of bits available
> 3b * 4b * 3b = 10b. So just fits.
>
> Is it worth asserting those limits? Feels like it is running close, and
> will be subject to cargo-culting.
I suppose checking for it might be a good idea.
Just 'WARN_ON(5 * div1 * div2 >= 1 << 10)' maybe, or were you thinking
of something fancier?
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-10 17:59 ` Ville Syrjälä
@ 2019-04-10 18:13 ` Chris Wilson
2019-04-10 18:51 ` Ville Syrjälä
0 siblings, 1 reply; 18+ messages in thread
From: Chris Wilson @ 2019-04-10 18:13 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Quoting Ville Syrjälä (2019-04-10 18:59:52)
> On Mon, Apr 08, 2019 at 06:05:06PM +0100, Chris Wilson wrote:
> > Quoting Ville Syrjälä (2019-04-08 17:06:01)
> > > On Mon, Apr 08, 2019 at 04:49:13PM +0100, Chris Wilson wrote:
> > > > Quoting Ville Syrjala (2019-04-08 16:27:02)
> > > > > - /*
> > > > > - * Adjust the original formula to delay the division by 2^22 in order to
> > > > > - * minimize possible rounding errors.
> > > > > - */
> > > > > - tmp = (u64)m1 * m2_int * ref_clock +
> > > > > - (((u64)m1 * m2_frac * ref_clock) >> 22);
> > > > > - tmp = div_u64(tmp, 5 * div1 * div2);
> > > > > -
> > > > > - return tmp;
> > > > > + return div_u64(mul_u32_u32(ref_clock * m1, m2),
> > > > > + (5 * div1 * div2) << 22);
> > > >
> > > > You say the denominator here is a u64, so do you not need to cast
> > > > (u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
> > >
> > > It should fit into u32. The maximum value should be
> > > <= (5*0xf*0x7)<<22 based on the number of bits available
> > 3b * 4b * 3b = 10b. So just fits.
> >
> > Is it worth asserting those limits? Feels like it is running close, and
> > will be subject to cargo-culting.
>
> I suppose checking for it might be a good idea.
>
> Just 'WARN_ON(5 * div1 * div2 >= 1 << 10)' maybe, or were you thinking
> of something fancier?
How about something like
struct {
unsigned int div1 : 3;
unsigned int div2 : 3;
} d;
then with a bit of luck smatch will spot an overflow, and people might
think twice when copying?
Even weirder,
add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-29 (-29)
Function old new delta
intel_ddi_get_config 2377 2348 -29
I dread to look into the function to see how that changed gcc's mind.
-Chris
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] drm/i915: Simplify some icl pll calculations
2019-04-10 18:13 ` Chris Wilson
@ 2019-04-10 18:51 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2019-04-10 18:51 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Wed, Apr 10, 2019 at 07:13:48PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2019-04-10 18:59:52)
> > On Mon, Apr 08, 2019 at 06:05:06PM +0100, Chris Wilson wrote:
> > > Quoting Ville Syrjälä (2019-04-08 17:06:01)
> > > > On Mon, Apr 08, 2019 at 04:49:13PM +0100, Chris Wilson wrote:
> > > > > Quoting Ville Syrjala (2019-04-08 16:27:02)
> > > > > > - /*
> > > > > > - * Adjust the original formula to delay the division by 2^22 in order to
> > > > > > - * minimize possible rounding errors.
> > > > > > - */
> > > > > > - tmp = (u64)m1 * m2_int * ref_clock +
> > > > > > - (((u64)m1 * m2_frac * ref_clock) >> 22);
> > > > > > - tmp = div_u64(tmp, 5 * div1 * div2);
> > > > > > -
> > > > > > - return tmp;
> > > > > > + return div_u64(mul_u32_u32(ref_clock * m1, m2),
> > > > > > + (5 * div1 * div2) << 22);
> > > > >
> > > > > You say the denominator here is a u64, so do you not need to cast
> > > > > (u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
> > > >
> > > > It should fit into u32. The maximum value should be
> > > > <= (5*0xf*0x7)<<22 based on the number of bits available
> > > 3b * 4b * 3b = 10b. So just fits.
> > >
> > > Is it worth asserting those limits? Feels like it is running close, and
> > > will be subject to cargo-culting.
> >
> > I suppose checking for it might be a good idea.
> >
> > Just 'WARN_ON(5 * div1 * div2 >= 1 << 10)' maybe, or were you thinking
> > of something fancier?
>
> How about something like
> struct {
> unsigned int div1 : 3;
> unsigned int div2 : 3;
> } d;
>
> then with a bit of luck smatch will spot an overflow, and people might
> think twice when copying?
>
> Even weirder,
> add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-29 (-29)
> Function old new delta
> intel_ddi_get_config 2377 2348 -29
>
> I dread to look into the function to see how that changed gcc's mind.
I get 48 bytes with a 32bit build, but only if I let it inline that
function. With noinline there is no change apart from a few registers
getting shuffled around. gcc works in mysterious ways.
--
Ville Syrjälä
Intel
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Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
2019-04-08 15:27 ` [PATCH 2/2] drm/i915: Simplify some icl pll calculations Ville Syrjala
@ 2019-04-08 15:40 ` Patchwork
2019-04-08 15:44 ` [PATCH 1/2] " Chris Wilson
` (6 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-08 15:40 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more
URL : https://patchwork.freedesktop.org/series/59180/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Use mul_u32_u32() more
-O:drivers/gpu/drm/i915/intel_display.c:6992:26: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_display.c:6992:26: warning: expression using sizeof(void)
Commit: drm/i915: Simplify some icl pll calculations
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] drm/i915: Use mul_u32_u32() more
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
2019-04-08 15:27 ` [PATCH 2/2] drm/i915: Simplify some icl pll calculations Ville Syrjala
2019-04-08 15:40 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more Patchwork
@ 2019-04-08 15:44 ` Chris Wilson
2019-04-10 18:24 ` Ville Syrjälä
2019-04-08 16:28 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
` (5 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Chris Wilson @ 2019-04-08 15:44 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2019-04-08 16:27:01)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We have a lot of '(u64)foo * bar' everywhere. Replace with
> mul_u32_u32() to avoid gcc failing to use a regular 32x32->64
> multiply for this.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
As a purely mechanical translation,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index e01c057ce50b..29edc369920b 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2741,11 +2741,11 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state)
> }
>
> if (use_ssc) {
> - tmp = (u64)dco_khz * 47 * 32;
> + tmp = mul_u32_u32(dco_khz, 47 * 32);
> do_div(tmp, refclk_khz * m1div * 10000);
> ssc_stepsize = tmp;
>
> - tmp = (u64)dco_khz * 1000;
> + tmp = mul_u32_u32(dco_khz, 1000);
These caught my eye, wondering if the code was better reduced if the
constant was first or itself cast to (u64).
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] drm/i915: Use mul_u32_u32() more
2019-04-08 15:44 ` [PATCH 1/2] " Chris Wilson
@ 2019-04-10 18:24 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2019-04-10 18:24 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Mon, Apr 08, 2019 at 04:44:04PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2019-04-08 16:27:01)
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We have a lot of '(u64)foo * bar' everywhere. Replace with
> > mul_u32_u32() to avoid gcc failing to use a regular 32x32->64
> > multiply for this.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> As a purely mechanical translation,
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > index e01c057ce50b..29edc369920b 100644
> > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > @@ -2741,11 +2741,11 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state)
> > }
> >
> > if (use_ssc) {
> > - tmp = (u64)dco_khz * 47 * 32;
> > + tmp = mul_u32_u32(dco_khz, 47 * 32);
> > do_div(tmp, refclk_khz * m1div * 10000);
> > ssc_stepsize = tmp;
> >
> > - tmp = (u64)dco_khz * 1000;
> > + tmp = mul_u32_u32(dco_khz, 1000);
>
> These caught my eye, wondering if the code was better reduced if the
> constant was first or itself cast to (u64).
Looks like gcc (8.2) handles these two as is actually. Or at least
the generated asm is identical both ways.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Use mul_u32_u32() more
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
` (2 preceding siblings ...)
2019-04-08 15:44 ` [PATCH 1/2] " Chris Wilson
@ 2019-04-08 16:28 ` Patchwork
2019-04-30 14:10 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2) Patchwork
` (4 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-08 16:28 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more
URL : https://patchwork.freedesktop.org/series/59180/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5888 -> Patchwork_12729
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12729 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12729, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59180/revisions/1/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12729:
### IGT changes ###
#### Possible regressions ####
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-glk-dsi: PASS -> FAIL
Known issues
------------
Here are the changes found in Patchwork_12729 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_exec@basic:
- fi-icl-y: PASS -> INCOMPLETE [fdo#107713]
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
- fi-byt-clapper: PASS -> FAIL [fdo#107362]
* igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
Participating hosts (50 -> 45)
------------------------------
Missing (5): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5888 -> Patchwork_12729
CI_DRM_5888: 381350f19ba1844d34105890169b1f1443f45879 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4932: 08cf63a8fac11e3594b57580331fb319241a0d69 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12729: 06dd4d0ada9ed636a105b66b9d6e4434c797e680 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
06dd4d0ada9e drm/i915: Simplify some icl pll calculations
e4bdf31c419a drm/i915: Use mul_u32_u32() more
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12729/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
` (3 preceding siblings ...)
2019-04-08 16:28 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
@ 2019-04-30 14:10 ` Patchwork
2019-04-30 14:25 ` ✓ Fi.CI.BAT: success " Patchwork
` (3 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-30 14:10 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
URL : https://patchwork.freedesktop.org/series/59180/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Use mul_u32_u32() more
-O:drivers/gpu/drm/i915/intel_display.c:7049:26: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_display.c:7049:26: warning: expression using sizeof(void)
Commit: drm/i915: Simplify some icl pll calculations
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
` (4 preceding siblings ...)
2019-04-30 14:10 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2) Patchwork
@ 2019-04-30 14:25 ` Patchwork
2019-05-01 4:53 ` ✗ Fi.CI.IGT: failure " Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-04-30 14:25 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
URL : https://patchwork.freedesktop.org/series/59180/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6017 -> Patchwork_12909
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/59180/revisions/2/mbox/
Known issues
------------
Here are the changes found in Patchwork_12909 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: [PASS][3] -> [INCOMPLETE][4] ([fdo#108602] / [fdo#108744])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [PASS][5] -> [DMESG-WARN][6] ([fdo#103841])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
#### Possible fixes ####
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
- fi-skl-gvtdvm: [DMESG-FAIL][9] ([fdo#110235]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
[fdo#103841]: https://bugs.freedesktop.org/show_bug.cgi?id=103841
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (53 -> 46)
------------------------------
Missing (7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper
Build changes
-------------
* Linux: CI_DRM_6017 -> Patchwork_12909
CI_DRM_6017: 69c3a37af9430650d1fc2a5555d4d0786898694d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4971: fc5e0467eb6913d21ad932aa8a31c77fdb5a9c77 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12909: 2c852563912f45b23742afe4674abc1315116070 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2c852563912f drm/i915: Simplify some icl pll calculations
a9bdced0ca89 drm/i915: Use mul_u32_u32() more
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
` (5 preceding siblings ...)
2019-04-30 14:25 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-05-01 4:53 ` Patchwork
2019-05-02 7:43 ` Patchwork
2019-05-02 8:47 ` ✓ Fi.CI.IGT: success " Patchwork
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-05-01 4:53 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
URL : https://patchwork.freedesktop.org/series/59180/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12909_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12909_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12909_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12909_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_fence_thrash@bo-write-verify-threaded-y:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl2/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
* igt@syncobj_wait@wait-for-submit-snapshot:
- shard-skl: NOTRUN -> [INCOMPLETE][3] +4 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl2/igt@syncobj_wait@wait-for-submit-snapshot.html
Known issues
------------
Here are the changes found in Patchwork_12909_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@basic-rte:
- shard-skl: [PASS][4] -> [INCOMPLETE][5] ([fdo#107807])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl2/igt@i915_pm_rpm@basic-rte.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@i915_pm_rpm@basic-rte.html
* igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled:
- shard-skl: [PASS][6] -> [FAIL][7] ([fdo#103184] / [fdo#103232])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [PASS][8] -> [INCOMPLETE][9] ([fdo#104108] / [fdo#107773])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl4/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite:
- shard-skl: [PASS][10] -> [FAIL][11] ([fdo#108040]) +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-iclb: [PASS][12] -> [FAIL][13] ([fdo#103167]) +5 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-stridechange.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-stridechange.html
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-iclb: [PASS][14] -> [INCOMPLETE][15] ([fdo#107713] / [fdo#110036 ]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb1/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [PASS][16] -> [DMESG-WARN][17] ([fdo#108566]) +2 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][18] -> [FAIL][19] ([fdo#108145])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr@psr2_basic:
- shard-iclb: [PASS][20] -> [SKIP][21] ([fdo#109441]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb2/igt@kms_psr@psr2_basic.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb6/igt@kms_psr@psr2_basic.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][22] -> [FAIL][23] ([fdo#99912])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl1/igt@kms_setmode@basic.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl1/igt@kms_setmode@basic.html
- shard-kbl: [PASS][24] -> [FAIL][25] ([fdo#99912])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-kbl4/igt@kms_setmode@basic.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-kbl1/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [DMESG-WARN][26] ([fdo#103313]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-kbl3/igt@gem_eio@in-flight-suspend.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-kbl2/igt@gem_eio@in-flight-suspend.html
- shard-skl: [INCOMPLETE][28] ([fdo#104108] / [fdo#107773]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@gem_eio@in-flight-suspend.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl5/igt@gem_eio@in-flight-suspend.html
* igt@i915_pm_rpm@debugfs-forcewake-user:
- shard-skl: [INCOMPLETE][30] ([fdo#107807]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@i915_pm_rpm@debugfs-forcewake-user.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@i915_pm_rpm@debugfs-forcewake-user.html
* igt@i915_pm_rpm@gem-execbuf:
- shard-hsw: [INCOMPLETE][32] ([fdo#103540] / [fdo#107803] / [fdo#107807]) -> [PASS][33]
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-hsw1/igt@i915_pm_rpm@gem-execbuf.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-hsw5/igt@i915_pm_rpm@gem-execbuf.html
* igt@i915_selftest@mock_fence:
- shard-iclb: [INCOMPLETE][34] ([fdo#107713]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb7/igt@i915_selftest@mock_fence.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb8/igt@i915_selftest@mock_fence.html
* igt@i915_selftest@mock_requests:
- shard-skl: [INCOMPLETE][36] ([fdo#110550]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl8/igt@i915_selftest@mock_requests.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl7/igt@i915_selftest@mock_requests.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [DMESG-WARN][38] ([fdo#108566]) -> [PASS][39] +4 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl2/igt@i915_suspend@fence-restore-untiled.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-skl: [INCOMPLETE][40] -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl3/igt@kms_cursor_crc@cursor-128x128-onscreen.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl1/igt@kms_cursor_crc@cursor-128x128-onscreen.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: [INCOMPLETE][42] ([fdo#103359] / [k.org#198133]) -> [PASS][43] +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-glk9/igt@kms_flip@2x-flip-vs-suspend.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-glk1/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-iclb: [FAIL][44] ([fdo#103167]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-skl: [INCOMPLETE][46] ([fdo#106978]) -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-glk: [SKIP][48] ([fdo#109271]) -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-glk8/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-glk9/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [SKIP][50] ([fdo#109441]) -> [PASS][51] +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_rotation_crc@multiplane-rotation:
- shard-iclb: [INCOMPLETE][52] ([fdo#107713] / [fdo#110026]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb3/igt@kms_rotation_crc@multiplane-rotation.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb4/igt@kms_rotation_crc@multiplane-rotation.html
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110026]: https://bugs.freedesktop.org/show_bug.cgi?id=110026
[fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036
[fdo#110550]: https://bugs.freedesktop.org/show_bug.cgi?id=110550
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_6017 -> Patchwork_12909
CI_DRM_6017: 69c3a37af9430650d1fc2a5555d4d0786898694d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4971: fc5e0467eb6913d21ad932aa8a31c77fdb5a9c77 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12909: 2c852563912f45b23742afe4674abc1315116070 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
` (6 preceding siblings ...)
2019-05-01 4:53 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-05-02 7:43 ` Patchwork
2019-05-02 8:47 ` ✓ Fi.CI.IGT: success " Patchwork
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-05-02 7:43 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
URL : https://patchwork.freedesktop.org/series/59180/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12909_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12909_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12909_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12909_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_fence_thrash@bo-write-verify-threaded-y:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl2/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
* igt@syncobj_wait@wait-for-submit-snapshot:
- shard-skl: NOTRUN -> [INCOMPLETE][3] +4 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl2/igt@syncobj_wait@wait-for-submit-snapshot.html
Known issues
------------
Here are the changes found in Patchwork_12909_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@basic-rte:
- shard-skl: [PASS][4] -> [INCOMPLETE][5] ([fdo#107807])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl2/igt@i915_pm_rpm@basic-rte.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@i915_pm_rpm@basic-rte.html
* igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled:
- shard-skl: [PASS][6] -> [FAIL][7] ([fdo#103184] / [fdo#103232])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [PASS][8] -> [INCOMPLETE][9] ([fdo#104108] / [fdo#107773])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl4/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite:
- shard-skl: [PASS][10] -> [FAIL][11] ([fdo#108040]) +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-iclb: [PASS][12] -> [FAIL][13] ([fdo#103167]) +5 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-stridechange.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-stridechange.html
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-iclb: [PASS][14] -> [INCOMPLETE][15] ([fdo#107713] / [fdo#110036 ]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb1/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [PASS][16] -> [DMESG-WARN][17] ([fdo#108566]) +2 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][18] -> [FAIL][19] ([fdo#108145])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr@psr2_basic:
- shard-iclb: [PASS][20] -> [SKIP][21] ([fdo#109441]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb2/igt@kms_psr@psr2_basic.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb6/igt@kms_psr@psr2_basic.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][22] -> [FAIL][23] ([fdo#99912])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl1/igt@kms_setmode@basic.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl1/igt@kms_setmode@basic.html
- shard-kbl: [PASS][24] -> [FAIL][25] ([fdo#99912])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-kbl4/igt@kms_setmode@basic.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-kbl1/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [DMESG-WARN][26] ([fdo#103313]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-kbl3/igt@gem_eio@in-flight-suspend.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-kbl2/igt@gem_eio@in-flight-suspend.html
- shard-skl: [INCOMPLETE][28] ([fdo#104108] / [fdo#107773]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@gem_eio@in-flight-suspend.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl5/igt@gem_eio@in-flight-suspend.html
* igt@i915_pm_rpm@debugfs-forcewake-user:
- shard-skl: [INCOMPLETE][30] ([fdo#107807]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@i915_pm_rpm@debugfs-forcewake-user.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@i915_pm_rpm@debugfs-forcewake-user.html
* igt@i915_pm_rpm@gem-execbuf:
- shard-hsw: [INCOMPLETE][32] ([fdo#103540] / [fdo#107803] / [fdo#107807]) -> [PASS][33]
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-hsw1/igt@i915_pm_rpm@gem-execbuf.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-hsw5/igt@i915_pm_rpm@gem-execbuf.html
* igt@i915_selftest@mock_fence:
- shard-iclb: [INCOMPLETE][34] ([fdo#107713]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb7/igt@i915_selftest@mock_fence.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb8/igt@i915_selftest@mock_fence.html
* igt@i915_selftest@mock_requests:
- shard-skl: [INCOMPLETE][36] ([fdo#110550]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl8/igt@i915_selftest@mock_requests.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl7/igt@i915_selftest@mock_requests.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [DMESG-WARN][38] ([fdo#108566]) -> [PASS][39] +4 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl2/igt@i915_suspend@fence-restore-untiled.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-skl: [INCOMPLETE][40] -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl3/igt@kms_cursor_crc@cursor-128x128-onscreen.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl1/igt@kms_cursor_crc@cursor-128x128-onscreen.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: [INCOMPLETE][42] ([fdo#103359] / [k.org#198133]) -> [PASS][43] +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-glk9/igt@kms_flip@2x-flip-vs-suspend.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-glk1/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-iclb: [FAIL][44] ([fdo#103167]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-skl: [INCOMPLETE][46] ([fdo#106978]) -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-glk: [SKIP][48] ([fdo#109271]) -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-glk8/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-glk9/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [SKIP][50] ([fdo#109441]) -> [PASS][51] +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_rotation_crc@multiplane-rotation:
- shard-iclb: [INCOMPLETE][52] ([fdo#107713] / [fdo#110026]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb3/igt@kms_rotation_crc@multiplane-rotation.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb4/igt@kms_rotation_crc@multiplane-rotation.html
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110026]: https://bugs.freedesktop.org/show_bug.cgi?id=110026
[fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036
[fdo#110550]: https://bugs.freedesktop.org/show_bug.cgi?id=110550
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_6017 -> Patchwork_12909
CI_DRM_6017: 69c3a37af9430650d1fc2a5555d4d0786898694d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4971: fc5e0467eb6913d21ad932aa8a31c77fdb5a9c77 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12909: 2c852563912f45b23742afe4674abc1315116070 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
` (7 preceding siblings ...)
2019-05-02 7:43 ` Patchwork
@ 2019-05-02 8:47 ` Patchwork
8 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2019-05-02 8:47 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
URL : https://patchwork.freedesktop.org/series/59180/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12909_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12909_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_fence_thrash@bo-write-verify-threaded-y:
- shard-skl: [PASS][1] -> [INCOMPLETE][2] ([fdo#110581])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl2/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
* igt@i915_pm_rpm@basic-rte:
- shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107807])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl2/igt@i915_pm_rpm@basic-rte.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@i915_pm_rpm@basic-rte.html
* igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled:
- shard-skl: [PASS][5] -> [FAIL][6] ([fdo#103184] / [fdo#103232])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [PASS][7] -> [INCOMPLETE][8] ([fdo#104108] / [fdo#107773])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl4/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite:
- shard-skl: [PASS][9] -> [FAIL][10] ([fdo#108040]) +2 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +5 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-stridechange.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-stridechange.html
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-iclb: [PASS][13] -> [INCOMPLETE][14] ([fdo#107713] / [fdo#110036 ]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb1/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr@psr2_basic:
- shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#109441]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb2/igt@kms_psr@psr2_basic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb6/igt@kms_psr@psr2_basic.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][21] -> [FAIL][22] ([fdo#99912])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl1/igt@kms_setmode@basic.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl1/igt@kms_setmode@basic.html
- shard-kbl: [PASS][23] -> [FAIL][24] ([fdo#99912])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-kbl4/igt@kms_setmode@basic.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-kbl1/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [DMESG-WARN][25] ([fdo#103313]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-kbl3/igt@gem_eio@in-flight-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-kbl2/igt@gem_eio@in-flight-suspend.html
- shard-skl: [INCOMPLETE][27] ([fdo#104108] / [fdo#107773]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@gem_eio@in-flight-suspend.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl5/igt@gem_eio@in-flight-suspend.html
* igt@i915_pm_rpm@debugfs-forcewake-user:
- shard-skl: [INCOMPLETE][29] ([fdo#107807]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@i915_pm_rpm@debugfs-forcewake-user.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl3/igt@i915_pm_rpm@debugfs-forcewake-user.html
* igt@i915_pm_rpm@gem-execbuf:
- shard-hsw: [INCOMPLETE][31] ([fdo#103540] / [fdo#107803] / [fdo#107807]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-hsw1/igt@i915_pm_rpm@gem-execbuf.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-hsw5/igt@i915_pm_rpm@gem-execbuf.html
* igt@i915_selftest@mock_fence:
- shard-iclb: [INCOMPLETE][33] ([fdo#107713]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb7/igt@i915_selftest@mock_fence.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb8/igt@i915_selftest@mock_fence.html
* igt@i915_selftest@mock_requests:
- shard-skl: [INCOMPLETE][35] ([fdo#110550]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl8/igt@i915_selftest@mock_requests.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl7/igt@i915_selftest@mock_requests.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [DMESG-WARN][37] ([fdo#108566]) -> [PASS][38] +4 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-apl2/igt@i915_suspend@fence-restore-untiled.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-skl: [INCOMPLETE][39] ([fdo#110581]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl3/igt@kms_cursor_crc@cursor-128x128-onscreen.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl1/igt@kms_cursor_crc@cursor-128x128-onscreen.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: [INCOMPLETE][41] ([fdo#103359] / [k.org#198133]) -> [PASS][42] +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-glk9/igt@kms_flip@2x-flip-vs-suspend.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-glk1/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-iclb: [FAIL][43] ([fdo#103167]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-skl: [INCOMPLETE][45] ([fdo#106978]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-skl2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-glk: [SKIP][47] ([fdo#109271]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-glk8/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-glk9/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [SKIP][49] ([fdo#109441]) -> [PASS][50] +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb7/igt@kms_psr@psr2_sprite_blt.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_rotation_crc@multiplane-rotation:
- shard-iclb: [INCOMPLETE][51] ([fdo#107713] / [fdo#110026]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6017/shard-iclb3/igt@kms_rotation_crc@multiplane-rotation.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/shard-iclb4/igt@kms_rotation_crc@multiplane-rotation.html
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110026]: https://bugs.freedesktop.org/show_bug.cgi?id=110026
[fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036
[fdo#110550]: https://bugs.freedesktop.org/show_bug.cgi?id=110550
[fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_6017 -> Patchwork_12909
CI_DRM_6017: 69c3a37af9430650d1fc2a5555d4d0786898694d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4971: fc5e0467eb6913d21ad932aa8a31c77fdb5a9c77 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12909: 2c852563912f45b23742afe4674abc1315116070 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12909/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2019-05-02 8:47 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-08 15:27 [PATCH 1/2] drm/i915: Use mul_u32_u32() more Ville Syrjala
2019-04-08 15:27 ` [PATCH 2/2] drm/i915: Simplify some icl pll calculations Ville Syrjala
2019-04-08 15:49 ` Chris Wilson
2019-04-08 16:06 ` Ville Syrjälä
2019-04-08 16:14 ` Chris Wilson
2019-04-08 17:05 ` Chris Wilson
2019-04-10 17:59 ` Ville Syrjälä
2019-04-10 18:13 ` Chris Wilson
2019-04-10 18:51 ` Ville Syrjälä
2019-04-08 15:40 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more Patchwork
2019-04-08 15:44 ` [PATCH 1/2] " Chris Wilson
2019-04-10 18:24 ` Ville Syrjälä
2019-04-08 16:28 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
2019-04-30 14:10 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2) Patchwork
2019-04-30 14:25 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-01 4:53 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-05-02 7:43 ` Patchwork
2019-05-02 8:47 ` ✓ Fi.CI.IGT: success " Patchwork
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