* [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY @ 2019-05-23 23:17 Rodrigo Vivi 2019-05-24 0:06 ` ✓ Fi.CI.BAT: success for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) Patchwork ` (3 more replies) 0 siblings, 4 replies; 5+ messages in thread From: Rodrigo Vivi @ 2019-05-23 23:17 UTC (permalink / raw) To: intel-gfx Suspend resume is broken if we try to enable/disable dc9 on cases with disabled displays. v2: Make checkpatch happy: - braces {} are not necessary for single statement blocks v3: Also move hsw/bdw PC8 sequences since they are related to display PM anyways. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> (v1) --- drivers/gpu/drm/i915/i915_drv.c | 117 +++++++++++++++++++++----------- 1 file changed, 76 insertions(+), 41 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 83d2eb9e74cb..bd73ce57741a 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -2118,6 +2118,17 @@ get_suspend_mode(struct drm_i915_private *dev_priv, bool hibernate) return I915_DRM_SUSPEND_MEM; } +static void intel_display_suspend_late(struct drm_i915_private *dev_priv) +{ + if (!HAS_DISPLAY(dev_priv)) + return; + + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) + bxt_enable_dc9(dev_priv); + else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) + hsw_enable_pc8(dev_priv); +} + static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) { struct drm_i915_private *dev_priv = to_i915(dev); @@ -2133,12 +2144,10 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) intel_power_domains_suspend(dev_priv, get_suspend_mode(dev_priv, hibernation)); + intel_display_suspend_late(dev_priv); + ret = 0; - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) - bxt_enable_dc9(dev_priv); - else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) - hsw_enable_pc8(dev_priv); - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) ret = vlv_suspend_complete(dev_priv); if (ret) { @@ -2266,6 +2275,19 @@ static int i915_drm_resume(struct drm_device *dev) return 0; } +static void intel_display_resume_early(struct drm_i915_private *dev_priv) +{ + if (!HAS_DISPLAY(dev_priv)) + return; + + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) { + gen9_sanitize_dc_state(dev_priv); + bxt_disable_dc9(dev_priv); + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { + hsw_disable_pc8(dev_priv); + } +} + static int i915_drm_resume_early(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); @@ -2328,12 +2350,7 @@ static int i915_drm_resume_early(struct drm_device *dev) i915_check_and_clear_faults(dev_priv); - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) { - gen9_sanitize_dc_state(dev_priv); - bxt_disable_dc9(dev_priv); - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { - hsw_disable_pc8(dev_priv); - } + intel_display_resume_early(dev_priv); intel_uncore_sanitize(dev_priv); @@ -2869,6 +2886,22 @@ static int vlv_resume_prepare(struct drm_i915_private *dev_priv, return ret; } +static void intel_runtime_display_suspend(struct drm_i915_private *dev_priv) +{ + if (!HAS_DISPLAY(dev_priv)) + return; + + if (INTEL_GEN(dev_priv) >= 11) { + icl_display_core_uninit(dev_priv); + bxt_enable_dc9(dev_priv); + } else if (IS_GEN9_LP(dev_priv)) { + bxt_display_core_uninit(dev_priv); + bxt_enable_dc9(dev_priv); + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { + hsw_enable_pc8(dev_priv); + } +} + static int intel_runtime_suspend(struct device *kdev) { struct pci_dev *pdev = to_pci_dev(kdev); @@ -2898,18 +2931,11 @@ static int intel_runtime_suspend(struct device *kdev) intel_uncore_suspend(&dev_priv->uncore); + intel_runtime_display_suspend(dev_priv); + ret = 0; - if (INTEL_GEN(dev_priv) >= 11) { - icl_display_core_uninit(dev_priv); - bxt_enable_dc9(dev_priv); - } else if (IS_GEN9_LP(dev_priv)) { - bxt_display_core_uninit(dev_priv); - bxt_enable_dc9(dev_priv); - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { - hsw_enable_pc8(dev_priv); - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) ret = vlv_suspend_complete(dev_priv); - } if (ret) { DRM_ERROR("Runtime suspend failed, disabling it (%d)\n", ret); @@ -2967,25 +2993,10 @@ static int intel_runtime_suspend(struct device *kdev) return 0; } -static int intel_runtime_resume(struct device *kdev) +static void intel_runtime_display_resume(struct drm_i915_private *dev_priv) { - struct pci_dev *pdev = to_pci_dev(kdev); - struct drm_device *dev = pci_get_drvdata(pdev); - struct drm_i915_private *dev_priv = to_i915(dev); - int ret = 0; - - if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv))) - return -ENODEV; - - DRM_DEBUG_KMS("Resuming device\n"); - - WARN_ON_ONCE(atomic_read(&dev_priv->runtime_pm.wakeref_count)); - disable_rpm_wakeref_asserts(dev_priv); - - intel_opregion_notify_adapter(dev_priv, PCI_D0); - dev_priv->runtime_pm.suspended = false; - if (intel_uncore_unclaimed_mmio(&dev_priv->uncore)) - DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n"); + if (!HAS_DISPLAY(dev_priv)) + return; if (INTEL_GEN(dev_priv) >= 11) { bxt_disable_dc9(dev_priv); @@ -3006,9 +3017,33 @@ static int intel_runtime_resume(struct device *kdev) gen9_enable_dc5(dev_priv); } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { hsw_disable_pc8(dev_priv); - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { - ret = vlv_resume_prepare(dev_priv, true); } +} + +static int intel_runtime_resume(struct device *kdev) +{ + struct pci_dev *pdev = to_pci_dev(kdev); + struct drm_device *dev = pci_get_drvdata(pdev); + struct drm_i915_private *dev_priv = to_i915(dev); + int ret = 0; + + if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv))) + return -ENODEV; + + DRM_DEBUG_KMS("Resuming device\n"); + + WARN_ON_ONCE(atomic_read(&dev_priv->runtime_pm.wakeref_count)); + disable_rpm_wakeref_asserts(dev_priv); + + intel_opregion_notify_adapter(dev_priv, PCI_D0); + dev_priv->runtime_pm.suspended = false; + if (intel_uncore_unclaimed_mmio(&dev_priv->uncore)) + DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n"); + + intel_runtime_display_resume(dev_priv); + + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) + ret = vlv_resume_prepare(dev_priv, true); intel_uncore_runtime_resume(&dev_priv->uncore); -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) 2019-05-23 23:17 [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi @ 2019-05-24 0:06 ` Patchwork 2019-05-25 9:37 ` ✓ Fi.CI.IGT: " Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2019-05-24 0:06 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx == Series Details == Series: drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) URL : https://patchwork.freedesktop.org/series/60839/ State : success == Summary == CI Bug Log - changes from CI_DRM_6137 -> Patchwork_13085 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/ Known issues ------------ Here are the changes found in Patchwork_13085 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live_contexts: - fi-skl-gvtdvm: [PASS][1] -> [DMESG-FAIL][2] ([fdo#110235]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#109485]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@i915_selftest@live_hangcheck: - {fi-icl-y}: [INCOMPLETE][5] ([fdo#107713] / [fdo#108569]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/fi-icl-y/igt@i915_selftest@live_hangcheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/fi-icl-y/igt@i915_selftest@live_hangcheck.html - {fi-icl-dsi}: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html * igt@kms_flip@basic-flip-vs-wf_vblank: - fi-pnv-d510: [FAIL][9] ([fdo#100368]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/fi-pnv-d510/igt@kms_flip@basic-flip-vs-wf_vblank.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/fi-pnv-d510/igt@kms_flip@basic-flip-vs-wf_vblank.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (44 -> 40) ------------------------------ Missing (4): fi-kbl-soraka fi-ilk-m540 fi-bsw-cyan fi-bdw-samus Build changes ------------- * Linux: CI_DRM_6137 -> Patchwork_13085 CI_DRM_6137: e0fe0a5239c1f280c1268e519dbed94e3c429d80 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5011: 7f120c5f1bff2727d50f3c392d81c0f6878b61d6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13085: 39f8afcf836114b0c4cfa6009c785d1685b24de8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 39f8afcf8361 drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) 2019-05-23 23:17 [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi 2019-05-24 0:06 ` ✓ Fi.CI.BAT: success for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) Patchwork @ 2019-05-25 9:37 ` Patchwork 2019-05-28 12:47 ` [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Jani Nikula 2019-07-10 23:29 ` Souza, Jose 3 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2019-05-25 9:37 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx == Series Details == Series: drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) URL : https://patchwork.freedesktop.org/series/60839/ State : success == Summary == CI Bug Log - changes from CI_DRM_6137_full -> Patchwork_13085_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_13085_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@vcs0-s3: - shard-kbl: [PASS][1] -> [INCOMPLETE][2] ([fdo#103665]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-kbl7/igt@gem_ctx_isolation@vcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-kbl4/igt@gem_ctx_isolation@vcs0-s3.html * igt@gem_tiled_swapping@non-threaded: - shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108686]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-kbl7/igt@gem_tiled_swapping@non-threaded.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-kbl2/igt@gem_tiled_swapping@non-threaded.html * igt@gem_workarounds@suspend-resume-context: - shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +5 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-apl2/igt@gem_workarounds@suspend-resume-context.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-apl2/igt@gem_workarounds@suspend-resume-context.html * igt@i915_pm_rpm@system-suspend-execbuf: - shard-iclb: [PASS][7] -> [INCOMPLETE][8] ([fdo#107713] / [fdo#108840]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb1/igt@i915_pm_rpm@system-suspend-execbuf.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb2/igt@i915_pm_rpm@system-suspend-execbuf.html * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109349]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb3/igt@kms_dp_dsc@basic-dsc-enable-edp.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt: - shard-skl: [PASS][11] -> [FAIL][12] ([fdo#103167]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl10/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl4/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +7 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108145]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_psr@psr2_suspend: - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb2/igt@kms_psr@psr2_suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb5/igt@kms_psr@psr2_suspend.html * igt@kms_setmode@basic: - shard-apl: [PASS][19] -> [FAIL][20] ([fdo#99912]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-apl6/igt@kms_setmode@basic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-apl3/igt@kms_setmode@basic.html #### Possible fixes #### * igt@i915_suspend@fence-restore-untiled: - shard-apl: [DMESG-WARN][21] ([fdo#108566]) -> [PASS][22] +4 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-apl5/igt@i915_suspend@fence-restore-untiled.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-apl5/igt@i915_suspend@fence-restore-untiled.html * igt@kms_cursor_crc@pipe-c-cursor-dpms: - shard-skl: [FAIL][23] ([fdo#103232]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl10/igt@kms_cursor_crc@pipe-c-cursor-dpms.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-dpms.html * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: - shard-glk: [FAIL][25] ([fdo#106509] / [fdo#107409]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-glk8/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-glk5/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html * igt@kms_draw_crc@draw-method-xrgb8888-blt-untiled: - shard-skl: [FAIL][27] ([fdo#103184] / [fdo#103232] / [fdo#108472]) -> [PASS][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl4/igt@kms_draw_crc@draw-method-xrgb8888-blt-untiled.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-blt-untiled.html * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: [FAIL][29] ([fdo#105363]) -> [PASS][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl3/igt@kms_flip@flip-vs-expired-vblank.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw: - shard-iclb: [FAIL][31] ([fdo#103167]) -> [PASS][32] +3 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc: - shard-iclb: [INCOMPLETE][33] ([fdo#106978] / [fdo#107713]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-skl: [FAIL][35] ([fdo#103191]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl9/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [FAIL][37] ([fdo#108145]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [FAIL][39] ([fdo#108145] / [fdo#110403]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: [SKIP][41] ([fdo#109441]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb3/igt@kms_psr@psr2_cursor_plane_onoff.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html * igt@perf@polling: - shard-iclb: [FAIL][43] ([fdo#110728]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb7/igt@perf@polling.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb4/igt@perf@polling.html #### Warnings #### * igt@gem_mmap_gtt@forked-big-copy-odd: - shard-iclb: [TIMEOUT][45] ([fdo#109673]) -> [INCOMPLETE][46] ([fdo#107713] / [fdo#109100]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-iclb8/igt@gem_mmap_gtt@forked-big-copy-odd.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-iclb6/igt@gem_mmap_gtt@forked-big-copy-odd.html * igt@prime_vgem@busy-bsd1: - shard-snb: [FAIL][47] -> [INCOMPLETE][48] ([fdo#105411]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6137/shard-snb7/igt@prime_vgem@busy-bsd1.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/shard-snb2/igt@prime_vgem@busy-bsd1.html [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411 [fdo#106509]: https://bugs.freedesktop.org/show_bug.cgi?id=106509 [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978 [fdo#107409]: https://bugs.freedesktop.org/show_bug.cgi?id=107409 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108472]: https://bugs.freedesktop.org/show_bug.cgi?id=108472 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673 [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (8 -> 8) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_6137 -> Patchwork_13085 CI_DRM_6137: e0fe0a5239c1f280c1268e519dbed94e3c429d80 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5011: 7f120c5f1bff2727d50f3c392d81c0f6878b61d6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13085: 39f8afcf836114b0c4cfa6009c785d1685b24de8 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13085/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY 2019-05-23 23:17 [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi 2019-05-24 0:06 ` ✓ Fi.CI.BAT: success for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) Patchwork 2019-05-25 9:37 ` ✓ Fi.CI.IGT: " Patchwork @ 2019-05-28 12:47 ` Jani Nikula 2019-07-10 23:29 ` Souza, Jose 3 siblings, 0 replies; 5+ messages in thread From: Jani Nikula @ 2019-05-28 12:47 UTC (permalink / raw) To: Rodrigo Vivi, intel-gfx On Thu, 23 May 2019, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote: > Suspend resume is broken if we try to enable/disable dc9 on > cases with disabled displays. > > v2: Make checkpatch happy: > - braces {} are not necessary for single statement blocks > > v3: Also move hsw/bdw PC8 sequences since they are related to > display PM anyways. (Ville) Most if not all the new functions belong in intel_runtime_pm.c, and you can make a bunch of functions static there as well. This is nicely in line with not exposing platform specific functions from .c files. BR, Jani. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: José Roberto de Souza <jose.souza@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> (v1) > --- > drivers/gpu/drm/i915/i915_drv.c | 117 +++++++++++++++++++++----------- > 1 file changed, 76 insertions(+), 41 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 83d2eb9e74cb..bd73ce57741a 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -2118,6 +2118,17 @@ get_suspend_mode(struct drm_i915_private *dev_priv, bool hibernate) > return I915_DRM_SUSPEND_MEM; > } > > +static void intel_display_suspend_late(struct drm_i915_private *dev_priv) > +{ > + if (!HAS_DISPLAY(dev_priv)) > + return; > + > + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) > + bxt_enable_dc9(dev_priv); > + else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) > + hsw_enable_pc8(dev_priv); > +} > + > static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) > { > struct drm_i915_private *dev_priv = to_i915(dev); > @@ -2133,12 +2144,10 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) > intel_power_domains_suspend(dev_priv, > get_suspend_mode(dev_priv, hibernation)); > > + intel_display_suspend_late(dev_priv); > + > ret = 0; > - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) > - bxt_enable_dc9(dev_priv); > - else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) > - hsw_enable_pc8(dev_priv); > - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > ret = vlv_suspend_complete(dev_priv); > > if (ret) { > @@ -2266,6 +2275,19 @@ static int i915_drm_resume(struct drm_device *dev) > return 0; > } > > +static void intel_display_resume_early(struct drm_i915_private *dev_priv) > +{ > + if (!HAS_DISPLAY(dev_priv)) > + return; > + > + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) { > + gen9_sanitize_dc_state(dev_priv); > + bxt_disable_dc9(dev_priv); > + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > + hsw_disable_pc8(dev_priv); > + } > +} > + > static int i915_drm_resume_early(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = to_i915(dev); > @@ -2328,12 +2350,7 @@ static int i915_drm_resume_early(struct drm_device *dev) > > i915_check_and_clear_faults(dev_priv); > > - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) { > - gen9_sanitize_dc_state(dev_priv); > - bxt_disable_dc9(dev_priv); > - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > - hsw_disable_pc8(dev_priv); > - } > + intel_display_resume_early(dev_priv); > > intel_uncore_sanitize(dev_priv); > > @@ -2869,6 +2886,22 @@ static int vlv_resume_prepare(struct drm_i915_private *dev_priv, > return ret; > } > > +static void intel_runtime_display_suspend(struct drm_i915_private *dev_priv) > +{ > + if (!HAS_DISPLAY(dev_priv)) > + return; > + > + if (INTEL_GEN(dev_priv) >= 11) { > + icl_display_core_uninit(dev_priv); > + bxt_enable_dc9(dev_priv); > + } else if (IS_GEN9_LP(dev_priv)) { > + bxt_display_core_uninit(dev_priv); > + bxt_enable_dc9(dev_priv); > + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > + hsw_enable_pc8(dev_priv); > + } > +} > + > static int intel_runtime_suspend(struct device *kdev) > { > struct pci_dev *pdev = to_pci_dev(kdev); > @@ -2898,18 +2931,11 @@ static int intel_runtime_suspend(struct device *kdev) > > intel_uncore_suspend(&dev_priv->uncore); > > + intel_runtime_display_suspend(dev_priv); > + > ret = 0; > - if (INTEL_GEN(dev_priv) >= 11) { > - icl_display_core_uninit(dev_priv); > - bxt_enable_dc9(dev_priv); > - } else if (IS_GEN9_LP(dev_priv)) { > - bxt_display_core_uninit(dev_priv); > - bxt_enable_dc9(dev_priv); > - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > - hsw_enable_pc8(dev_priv); > - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > ret = vlv_suspend_complete(dev_priv); > - } > > if (ret) { > DRM_ERROR("Runtime suspend failed, disabling it (%d)\n", ret); > @@ -2967,25 +2993,10 @@ static int intel_runtime_suspend(struct device *kdev) > return 0; > } > > -static int intel_runtime_resume(struct device *kdev) > +static void intel_runtime_display_resume(struct drm_i915_private *dev_priv) > { > - struct pci_dev *pdev = to_pci_dev(kdev); > - struct drm_device *dev = pci_get_drvdata(pdev); > - struct drm_i915_private *dev_priv = to_i915(dev); > - int ret = 0; > - > - if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv))) > - return -ENODEV; > - > - DRM_DEBUG_KMS("Resuming device\n"); > - > - WARN_ON_ONCE(atomic_read(&dev_priv->runtime_pm.wakeref_count)); > - disable_rpm_wakeref_asserts(dev_priv); > - > - intel_opregion_notify_adapter(dev_priv, PCI_D0); > - dev_priv->runtime_pm.suspended = false; > - if (intel_uncore_unclaimed_mmio(&dev_priv->uncore)) > - DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n"); > + if (!HAS_DISPLAY(dev_priv)) > + return; > > if (INTEL_GEN(dev_priv) >= 11) { > bxt_disable_dc9(dev_priv); > @@ -3006,9 +3017,33 @@ static int intel_runtime_resume(struct device *kdev) > gen9_enable_dc5(dev_priv); > } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > hsw_disable_pc8(dev_priv); > - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > - ret = vlv_resume_prepare(dev_priv, true); > } > +} > + > +static int intel_runtime_resume(struct device *kdev) > +{ > + struct pci_dev *pdev = to_pci_dev(kdev); > + struct drm_device *dev = pci_get_drvdata(pdev); > + struct drm_i915_private *dev_priv = to_i915(dev); > + int ret = 0; > + > + if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv))) > + return -ENODEV; > + > + DRM_DEBUG_KMS("Resuming device\n"); > + > + WARN_ON_ONCE(atomic_read(&dev_priv->runtime_pm.wakeref_count)); > + disable_rpm_wakeref_asserts(dev_priv); > + > + intel_opregion_notify_adapter(dev_priv, PCI_D0); > + dev_priv->runtime_pm.suspended = false; > + if (intel_uncore_unclaimed_mmio(&dev_priv->uncore)) > + DRM_DEBUG_DRIVER("Unclaimed access during suspend, bios?\n"); > + > + intel_runtime_display_resume(dev_priv); > + > + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > + ret = vlv_resume_prepare(dev_priv, true); > > intel_uncore_runtime_resume(&dev_priv->uncore); -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY 2019-05-23 23:17 [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi ` (2 preceding siblings ...) 2019-05-28 12:47 ` [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Jani Nikula @ 2019-07-10 23:29 ` Souza, Jose 3 siblings, 0 replies; 5+ messages in thread From: Souza, Jose @ 2019-07-10 23:29 UTC (permalink / raw) To: Vivi, Rodrigo, intel-gfx On Thu, 2019-05-23 at 16:17 -0700, Rodrigo Vivi wrote: > Suspend resume is broken if we try to enable/disable dc9 on > cases with disabled displays. > > v2: Make checkpatch happy: > - braces {} are not necessary for single statement blocks > > v3: Also move hsw/bdw PC8 sequences since they are related to > display PM anyways. (Ville) Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: José Roberto de Souza <jose.souza@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> (v1) > --- > drivers/gpu/drm/i915/i915_drv.c | 117 +++++++++++++++++++++--------- > -- > 1 file changed, 76 insertions(+), 41 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c > b/drivers/gpu/drm/i915/i915_drv.c > index 83d2eb9e74cb..bd73ce57741a 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -2118,6 +2118,17 @@ get_suspend_mode(struct drm_i915_private > *dev_priv, bool hibernate) > return I915_DRM_SUSPEND_MEM; > } > > +static void intel_display_suspend_late(struct drm_i915_private > *dev_priv) > +{ > + if (!HAS_DISPLAY(dev_priv)) > + return; > + > + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) > + bxt_enable_dc9(dev_priv); > + else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) > + hsw_enable_pc8(dev_priv); > +} > + > static int i915_drm_suspend_late(struct drm_device *dev, bool > hibernation) > { > struct drm_i915_private *dev_priv = to_i915(dev); > @@ -2133,12 +2144,10 @@ static int i915_drm_suspend_late(struct > drm_device *dev, bool hibernation) > intel_power_domains_suspend(dev_priv, > get_suspend_mode(dev_priv, > hibernation)); > > + intel_display_suspend_late(dev_priv); > + > ret = 0; > - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) > - bxt_enable_dc9(dev_priv); > - else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) > - hsw_enable_pc8(dev_priv); > - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > ret = vlv_suspend_complete(dev_priv); > > if (ret) { > @@ -2266,6 +2275,19 @@ static int i915_drm_resume(struct drm_device > *dev) > return 0; > } > > +static void intel_display_resume_early(struct drm_i915_private > *dev_priv) > +{ > + if (!HAS_DISPLAY(dev_priv)) > + return; > + > + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) { > + gen9_sanitize_dc_state(dev_priv); > + bxt_disable_dc9(dev_priv); > + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > + hsw_disable_pc8(dev_priv); > + } > +} > + > static int i915_drm_resume_early(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = to_i915(dev); > @@ -2328,12 +2350,7 @@ static int i915_drm_resume_early(struct > drm_device *dev) > > i915_check_and_clear_faults(dev_priv); > > - if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) { > - gen9_sanitize_dc_state(dev_priv); > - bxt_disable_dc9(dev_priv); > - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > - hsw_disable_pc8(dev_priv); > - } > + intel_display_resume_early(dev_priv); > > intel_uncore_sanitize(dev_priv); > > @@ -2869,6 +2886,22 @@ static int vlv_resume_prepare(struct > drm_i915_private *dev_priv, > return ret; > } > > +static void intel_runtime_display_suspend(struct drm_i915_private > *dev_priv) > +{ > + if (!HAS_DISPLAY(dev_priv)) > + return; > + > + if (INTEL_GEN(dev_priv) >= 11) { > + icl_display_core_uninit(dev_priv); > + bxt_enable_dc9(dev_priv); > + } else if (IS_GEN9_LP(dev_priv)) { > + bxt_display_core_uninit(dev_priv); > + bxt_enable_dc9(dev_priv); > + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > + hsw_enable_pc8(dev_priv); > + } > +} > + > static int intel_runtime_suspend(struct device *kdev) > { > struct pci_dev *pdev = to_pci_dev(kdev); > @@ -2898,18 +2931,11 @@ static int intel_runtime_suspend(struct > device *kdev) > > intel_uncore_suspend(&dev_priv->uncore); > > + intel_runtime_display_suspend(dev_priv); > + > ret = 0; > - if (INTEL_GEN(dev_priv) >= 11) { > - icl_display_core_uninit(dev_priv); > - bxt_enable_dc9(dev_priv); > - } else if (IS_GEN9_LP(dev_priv)) { > - bxt_display_core_uninit(dev_priv); > - bxt_enable_dc9(dev_priv); > - } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > - hsw_enable_pc8(dev_priv); > - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > { > + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > ret = vlv_suspend_complete(dev_priv); > - } > > if (ret) { > DRM_ERROR("Runtime suspend failed, disabling it > (%d)\n", ret); > @@ -2967,25 +2993,10 @@ static int intel_runtime_suspend(struct > device *kdev) > return 0; > } > > -static int intel_runtime_resume(struct device *kdev) > +static void intel_runtime_display_resume(struct drm_i915_private > *dev_priv) > { > - struct pci_dev *pdev = to_pci_dev(kdev); > - struct drm_device *dev = pci_get_drvdata(pdev); > - struct drm_i915_private *dev_priv = to_i915(dev); > - int ret = 0; > - > - if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv))) > - return -ENODEV; > - > - DRM_DEBUG_KMS("Resuming device\n"); > - > - WARN_ON_ONCE(atomic_read(&dev_priv->runtime_pm.wakeref_count)); > - disable_rpm_wakeref_asserts(dev_priv); > - > - intel_opregion_notify_adapter(dev_priv, PCI_D0); > - dev_priv->runtime_pm.suspended = false; > - if (intel_uncore_unclaimed_mmio(&dev_priv->uncore)) > - DRM_DEBUG_DRIVER("Unclaimed access during suspend, > bios?\n"); > + if (!HAS_DISPLAY(dev_priv)) > + return; > > if (INTEL_GEN(dev_priv) >= 11) { > bxt_disable_dc9(dev_priv); > @@ -3006,9 +3017,33 @@ static int intel_runtime_resume(struct device > *kdev) > gen9_enable_dc5(dev_priv); > } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > hsw_disable_pc8(dev_priv); > - } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > { > - ret = vlv_resume_prepare(dev_priv, true); > } > +} > + > +static int intel_runtime_resume(struct device *kdev) > +{ > + struct pci_dev *pdev = to_pci_dev(kdev); > + struct drm_device *dev = pci_get_drvdata(pdev); > + struct drm_i915_private *dev_priv = to_i915(dev); > + int ret = 0; > + > + if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv))) > + return -ENODEV; > + > + DRM_DEBUG_KMS("Resuming device\n"); > + > + WARN_ON_ONCE(atomic_read(&dev_priv->runtime_pm.wakeref_count)); > + disable_rpm_wakeref_asserts(dev_priv); > + > + intel_opregion_notify_adapter(dev_priv, PCI_D0); > + dev_priv->runtime_pm.suspended = false; > + if (intel_uncore_unclaimed_mmio(&dev_priv->uncore)) > + DRM_DEBUG_DRIVER("Unclaimed access during suspend, > bios?\n"); > + > + intel_runtime_display_resume(dev_priv); > + > + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > + ret = vlv_resume_prepare(dev_priv, true); > > intel_uncore_runtime_resume(&dev_priv->uncore); > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-07-10 23:29 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-05-23 23:17 [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Rodrigo Vivi 2019-05-24 0:06 ` ✓ Fi.CI.BAT: success for drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY (rev3) Patchwork 2019-05-25 9:37 ` ✓ Fi.CI.IGT: " Patchwork 2019-05-28 12:47 ` [PATCH] drm/i915: We don't need display's suspend/resume operations when !HAS_DISPLAY Jani Nikula 2019-07-10 23:29 ` Souza, Jose
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