From: "Paul E. McKenney" <paulmck@linux.ibm.com>
To: David Laight <David.Laight@ACULAB.COM>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>,
Vineet Gupta <Vineet.Gupta1@synopsys.com>,
Peter Zijlstra <peterz@infradead.org>,
Will Deacon <Will.Deacon@arm.com>,
arcml <linux-snps-arc@lists.infradead.org>,
lkml <linux-kernel@vger.kernel.org>,
"linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>
Subject: Re: single copy atomicity for double load/stores on 32-bit systems
Date: Thu, 6 Jun 2019 14:17:36 -0700 [thread overview]
Message-ID: <20190606211736.GW28207@linux.ibm.com> (raw)
In-Reply-To: <8d1666df180d4d01aaebb5d41370b338@AcuMS.aculab.com>
On Thu, Jun 06, 2019 at 04:34:52PM +0000, David Laight wrote:
> From: Paul E. McKenney
> > Sent: 06 June 2019 10:44
> ...
> > But m68k is !SMP-only, correct? If so, the only issues would be
> > interactions with interrupt handlers and the like, and doesn't current
> > m68k hardware use exact interrupts? Or is it still possible to interrupt
> > an m68k in the middle of an instruction like it was in the bad old days?
>
> Hardware interrupts were always on instruction boundaries, the
> mid-instruction interrupts would only happen for page faults (etc).
OK, !SMP should be fine, then.
> There were SMP m68k systems (but I can't remember one).
> It was important to continue from a mid-instruction trap on the
> same cpu - unless you could guarantee that all the cpus had
> exactly the same version of the microcode.
Yuck! ;-)
> In any case you could probably use the 'cmp2' instruction
> for an atomic 64bit write.
> OTOH setting that up was such a PITA it was always easier
> to disable interrupts.
Unless I am forgetting something, given that m68k is a 32-bit system,
we should be OK without an atomic 64-bit write.
Thanx, Paul
WARNING: multiple messages have this Message-ID (diff)
From: paulmck@linux.ibm.com (Paul E. McKenney)
To: linux-snps-arc@lists.infradead.org
Subject: single copy atomicity for double load/stores on 32-bit systems
Date: Thu, 6 Jun 2019 14:17:36 -0700 [thread overview]
Message-ID: <20190606211736.GW28207@linux.ibm.com> (raw)
In-Reply-To: <8d1666df180d4d01aaebb5d41370b338@AcuMS.aculab.com>
On Thu, Jun 06, 2019@04:34:52PM +0000, David Laight wrote:
> From: Paul E. McKenney
> > Sent: 06 June 2019 10:44
> ...
> > But m68k is !SMP-only, correct? If so, the only issues would be
> > interactions with interrupt handlers and the like, and doesn't current
> > m68k hardware use exact interrupts? Or is it still possible to interrupt
> > an m68k in the middle of an instruction like it was in the bad old days?
>
> Hardware interrupts were always on instruction boundaries, the
> mid-instruction interrupts would only happen for page faults (etc).
OK, !SMP should be fine, then.
> There were SMP m68k systems (but I can't remember one).
> It was important to continue from a mid-instruction trap on the
> same cpu - unless you could guarantee that all the cpus had
> exactly the same version of the microcode.
Yuck! ;-)
> In any case you could probably use the 'cmp2' instruction
> for an atomic 64bit write.
> OTOH setting that up was such a PITA it was always easier
> to disable interrupts.
Unless I am forgetting something, given that m68k is a 32-bit system,
we should be OK without an atomic 64-bit write.
Thanx, Paul
next prev parent reply other threads:[~2019-06-06 21:17 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-30 18:22 single copy atomicity for double load/stores on 32-bit systems Vineet Gupta
2019-05-30 18:22 ` Vineet Gupta
2019-05-30 18:53 ` Paul E. McKenney
2019-05-30 18:53 ` Paul E. McKenney
2019-05-30 19:16 ` Vineet Gupta
2019-05-30 19:16 ` Vineet Gupta
2019-05-31 8:23 ` Peter Zijlstra
2019-05-31 8:23 ` Peter Zijlstra
2019-05-31 8:25 ` Peter Zijlstra
2019-05-31 8:25 ` Peter Zijlstra
2019-05-31 8:21 ` Peter Zijlstra
2019-05-31 8:21 ` Peter Zijlstra
2019-06-03 18:08 ` Vineet Gupta
2019-06-03 18:08 ` Vineet Gupta
2019-06-03 20:13 ` Paul E. McKenney
2019-06-03 20:13 ` Paul E. McKenney
2019-06-03 21:59 ` Vineet Gupta
2019-06-03 21:59 ` Vineet Gupta
2019-06-04 7:41 ` Geert Uytterhoeven
2019-06-04 7:41 ` Geert Uytterhoeven
2019-06-04 7:41 ` Geert Uytterhoeven
2019-06-06 9:43 ` Paul E. McKenney
2019-06-06 9:43 ` Paul E. McKenney
2019-06-06 9:53 ` Geert Uytterhoeven
2019-06-06 9:53 ` Geert Uytterhoeven
2019-06-06 16:34 ` David Laight
2019-06-06 16:34 ` David Laight
2019-06-06 21:17 ` Paul E. McKenney [this message]
2019-06-06 21:17 ` Paul E. McKenney
2019-06-03 18:43 ` Vineet Gupta
2019-06-03 18:43 ` Vineet Gupta
2019-07-01 20:05 ` Vineet Gupta
2019-07-01 20:05 ` Vineet Gupta
2019-07-02 10:46 ` Will Deacon
2019-07-02 10:46 ` Will Deacon
2019-05-31 9:41 ` David Laight
2019-05-31 9:41 ` David Laight
2019-05-31 9:41 ` David Laight
2019-05-31 11:44 ` Paul E. McKenney
2019-05-31 11:44 ` Paul E. McKenney
2019-06-03 18:44 ` Vineet Gupta
2019-06-03 18:44 ` Vineet Gupta
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