From: Jacob Pan <jacob.jun.pan@linux.intel.com> To: "Tian, Kevin" <kevin.tian@intel.com> Cc: "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>, LKML <linux-kernel@vger.kernel.org>, Joerg Roedel <joro@8bytes.org>, "David Woodhouse" <dwmw2@infradead.org>, Alex Williamson <alex.williamson@redhat.com>, Jean-Philippe Brucker <jean-philippe@linaro.com>, "Liu, Yi L" <yi.l.liu@intel.com>, "Raj, Ashok" <ashok.raj@intel.com>, Christoph Hellwig <hch@infradead.org>, Lu Baolu <baolu.lu@linux.intel.com>, Jonathan Cameron <jic23@kernel.org>, Eric Auger <eric.auger@redhat.com>, jacob.jun.pan@linux.intel.com Subject: Re: [PATCH v7 02/11] iommu/vt-d: Enlightened PASID allocation Date: Tue, 29 Oct 2019 10:14:36 -0700 [thread overview] Message-ID: <20191029101436.3ca8d438@jacob-builder> (raw) In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D19D5CDC00@SHSMSX104.ccr.corp.intel.com> On Fri, 25 Oct 2019 06:19:29 +0000 "Tian, Kevin" <kevin.tian@intel.com> wrote: > > From: Jacob Pan [mailto:jacob.jun.pan@linux.intel.com] > > Sent: Friday, October 25, 2019 3:55 AM > > > > From: Lu Baolu <baolu.lu@linux.intel.com> > > > > Enabling IOMMU in a guest requires communication with the host > > driver for certain aspects. Use of PASID ID to enable Shared Virtual > > Addressing (SVA) requires managing PASID's in the host. VT-d 3.0 > > spec provides a Virtual Command Register (VCMD) to facilitate this. > > Writes to this register in the guest are trapped by QEMU which > > proxies the call to the host driver. > > > > This virtual command interface consists of a capability register, > > a virtual command register, and a virtual response register. Refer > > to section 10.4.42, 10.4.43, 10.4.44 for more information. > > > > This patch adds the enlightened PASID allocation/free interfaces > > via the virtual command interface. > > > > Cc: Ashok Raj <ashok.raj@intel.com> > > Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> > > Cc: Kevin Tian <kevin.tian@intel.com> > > Signed-off-by: Liu Yi L <yi.l.liu@intel.com> > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> > > Reviewed-by: Eric Auger <eric.auger@redhat.com> > > --- > > drivers/iommu/intel-pasid.c | 56 > > +++++++++++++++++++++++++++++++++++++++++++++ > > drivers/iommu/intel-pasid.h | 13 ++++++++++- > > include/linux/intel-iommu.h | 2 ++ > > 3 files changed, 70 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/iommu/intel-pasid.c > > b/drivers/iommu/intel-pasid.c index 040a445be300..d81e857d2b25 > > 100644 --- a/drivers/iommu/intel-pasid.c > > +++ b/drivers/iommu/intel-pasid.c > > @@ -63,6 +63,62 @@ void *intel_pasid_lookup_id(int pasid) > > return p; > > } > > > > +int vcmd_alloc_pasid(struct intel_iommu *iommu, unsigned int > > *pasid) +{ > > + unsigned long flags; > > + u8 status_code; > > + int ret = 0; > > + u64 res; > > + > > + raw_spin_lock_irqsave(&iommu->register_lock, flags); > > + dmar_writeq(iommu->reg + DMAR_VCMD_REG, > > VCMD_CMD_ALLOC); > > + IOMMU_WAIT_OP(iommu, DMAR_VCRSP_REG, dmar_readq, > > + !(res & VCMD_VRSP_IP), res); > > + raw_spin_unlock_irqrestore(&iommu->register_lock, flags); > > + > > should we handle VCMD_VRSP_IP here? VCMD_VRSP_IP is checked above, if it times out, you will get panic. Not sure whatelse to do? > > > + status_code = VCMD_VRSP_SC(res); > > + switch (status_code) { > > + case VCMD_VRSP_SC_SUCCESS: > > + *pasid = VCMD_VRSP_RESULT(res); > > + break; > > + case VCMD_VRSP_SC_NO_PASID_AVAIL: > > + pr_info("IOMMU: %s: No PASID available\n", iommu- > > >name); > > + ret = -ENOMEM; > > + break; > > + default: > > + ret = -ENODEV; > > + pr_warn("IOMMU: %s: Unexpected error code %d\n", > > + iommu->name, status_code); > > + } > > + > > + return ret; > > +} > > + > > +void vcmd_free_pasid(struct intel_iommu *iommu, unsigned int pasid) > > +{ > > + unsigned long flags; > > + u8 status_code; > > + u64 res; > > + > > + raw_spin_lock_irqsave(&iommu->register_lock, flags); > > + dmar_writeq(iommu->reg + DMAR_VCMD_REG, (pasid << 8) | > > VCMD_CMD_FREE); > > define a macro for pasid offset. > will do. > > + IOMMU_WAIT_OP(iommu, DMAR_VCRSP_REG, dmar_readq, > > + !(res & VCMD_VRSP_IP), res); > > + raw_spin_unlock_irqrestore(&iommu->register_lock, flags); > > + > > + status_code = VCMD_VRSP_SC(res); > > + switch (status_code) { > > + case VCMD_VRSP_SC_SUCCESS: > > + break; > > + case VCMD_VRSP_SC_INVALID_PASID: > > + pr_info("IOMMU: %s: Invalid PASID\n", iommu->name); > > + break; > > + default: > > + pr_warn("IOMMU: %s: Unexpected error code %d\n", > > + iommu->name, status_code); > > + } > > +} > > + > > /* > > * Per device pasid table management: > > */ > > diff --git a/drivers/iommu/intel-pasid.h > > b/drivers/iommu/intel-pasid.h index fc8cd8f17de1..e413e884e685 > > 100644 --- a/drivers/iommu/intel-pasid.h > > +++ b/drivers/iommu/intel-pasid.h > > @@ -23,6 +23,16 @@ > > #define is_pasid_enabled(entry) (((entry)->lo >> 3) > > & 0x1) #define get_pasid_dir_size(entry) (1 << > > ((((entry)->lo >> 9) & 0x7) + 7)) > > > > +/* Virtual command interface for enlightened pasid management. */ > > +#define VCMD_CMD_ALLOC 0x1 > > +#define VCMD_CMD_FREE 0x2 > > +#define VCMD_VRSP_IP 0x1 > > +#define VCMD_VRSP_SC(e) (((e) >> 1) & 0x3) > > +#define VCMD_VRSP_SC_SUCCESS 0 > > +#define VCMD_VRSP_SC_NO_PASID_AVAIL 1 > > +#define VCMD_VRSP_SC_INVALID_PASID 1 > > +#define VCMD_VRSP_RESULT(e) (((e) >> 8) & 0xfffff) > > + > > /* > > * Domain ID reserved for pasid entries programmed for first-level > > * only and pass-through transfer modes. > > @@ -95,5 +105,6 @@ int intel_pasid_setup_pass_through(struct > > intel_iommu *iommu, > > struct device *dev, int pasid); > > void intel_pasid_tear_down_entry(struct intel_iommu *iommu, > > struct device *dev, int pasid); > > - > > +int vcmd_alloc_pasid(struct intel_iommu *iommu, unsigned int > > *pasid); +void vcmd_free_pasid(struct intel_iommu *iommu, unsigned > > int pasid); #endif /* __INTEL_PASID_H */ > > diff --git a/include/linux/intel-iommu.h > > b/include/linux/intel-iommu.h index 2e1bed9b7eef..1d4b8dcdc5d8 > > 100644 --- a/include/linux/intel-iommu.h > > +++ b/include/linux/intel-iommu.h > > @@ -161,6 +161,7 @@ > > #define ecap_smpwc(e) (((e) >> 48) & 0x1) > > #define ecap_flts(e) (((e) >> 47) & 0x1) > > #define ecap_slts(e) (((e) >> 46) & 0x1) > > +#define ecap_vcs(e) (((e) >> 44) & 0x1) > > #define ecap_smts(e) (((e) >> 43) & 0x1) > > #define ecap_dit(e) ((e >> 41) & 0x1) > > #define ecap_pasid(e) ((e >> 40) & 0x1) > > @@ -282,6 +283,7 @@ > > > > /* PRS_REG */ > > #define DMA_PRS_PPR ((u32)1) > > +#define DMA_VCS_PAS ((u64)1) > > > > #define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) > > \ > > do > > { > > \ -- 2.7.4 > [Jacob Pan]
WARNING: multiple messages have this Message-ID (diff)
From: Jacob Pan <jacob.jun.pan@linux.intel.com> To: "Tian, Kevin" <kevin.tian@intel.com> Cc: "Raj, Ashok" <ashok.raj@intel.com>, David Woodhouse <dwmw2@infradead.org>, "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>, LKML <linux-kernel@vger.kernel.org>, Alex Williamson <alex.williamson@redhat.com>, Jean-Philippe Brucker <jean-philippe@linaro.com>, Jonathan Cameron <jic23@kernel.org> Subject: Re: [PATCH v7 02/11] iommu/vt-d: Enlightened PASID allocation Date: Tue, 29 Oct 2019 10:14:36 -0700 [thread overview] Message-ID: <20191029101436.3ca8d438@jacob-builder> (raw) In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D19D5CDC00@SHSMSX104.ccr.corp.intel.com> On Fri, 25 Oct 2019 06:19:29 +0000 "Tian, Kevin" <kevin.tian@intel.com> wrote: > > From: Jacob Pan [mailto:jacob.jun.pan@linux.intel.com] > > Sent: Friday, October 25, 2019 3:55 AM > > > > From: Lu Baolu <baolu.lu@linux.intel.com> > > > > Enabling IOMMU in a guest requires communication with the host > > driver for certain aspects. Use of PASID ID to enable Shared Virtual > > Addressing (SVA) requires managing PASID's in the host. VT-d 3.0 > > spec provides a Virtual Command Register (VCMD) to facilitate this. > > Writes to this register in the guest are trapped by QEMU which > > proxies the call to the host driver. > > > > This virtual command interface consists of a capability register, > > a virtual command register, and a virtual response register. Refer > > to section 10.4.42, 10.4.43, 10.4.44 for more information. > > > > This patch adds the enlightened PASID allocation/free interfaces > > via the virtual command interface. > > > > Cc: Ashok Raj <ashok.raj@intel.com> > > Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> > > Cc: Kevin Tian <kevin.tian@intel.com> > > Signed-off-by: Liu Yi L <yi.l.liu@intel.com> > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> > > Reviewed-by: Eric Auger <eric.auger@redhat.com> > > --- > > drivers/iommu/intel-pasid.c | 56 > > +++++++++++++++++++++++++++++++++++++++++++++ > > drivers/iommu/intel-pasid.h | 13 ++++++++++- > > include/linux/intel-iommu.h | 2 ++ > > 3 files changed, 70 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/iommu/intel-pasid.c > > b/drivers/iommu/intel-pasid.c index 040a445be300..d81e857d2b25 > > 100644 --- a/drivers/iommu/intel-pasid.c > > +++ b/drivers/iommu/intel-pasid.c > > @@ -63,6 +63,62 @@ void *intel_pasid_lookup_id(int pasid) > > return p; > > } > > > > +int vcmd_alloc_pasid(struct intel_iommu *iommu, unsigned int > > *pasid) +{ > > + unsigned long flags; > > + u8 status_code; > > + int ret = 0; > > + u64 res; > > + > > + raw_spin_lock_irqsave(&iommu->register_lock, flags); > > + dmar_writeq(iommu->reg + DMAR_VCMD_REG, > > VCMD_CMD_ALLOC); > > + IOMMU_WAIT_OP(iommu, DMAR_VCRSP_REG, dmar_readq, > > + !(res & VCMD_VRSP_IP), res); > > + raw_spin_unlock_irqrestore(&iommu->register_lock, flags); > > + > > should we handle VCMD_VRSP_IP here? VCMD_VRSP_IP is checked above, if it times out, you will get panic. Not sure whatelse to do? > > > + status_code = VCMD_VRSP_SC(res); > > + switch (status_code) { > > + case VCMD_VRSP_SC_SUCCESS: > > + *pasid = VCMD_VRSP_RESULT(res); > > + break; > > + case VCMD_VRSP_SC_NO_PASID_AVAIL: > > + pr_info("IOMMU: %s: No PASID available\n", iommu- > > >name); > > + ret = -ENOMEM; > > + break; > > + default: > > + ret = -ENODEV; > > + pr_warn("IOMMU: %s: Unexpected error code %d\n", > > + iommu->name, status_code); > > + } > > + > > + return ret; > > +} > > + > > +void vcmd_free_pasid(struct intel_iommu *iommu, unsigned int pasid) > > +{ > > + unsigned long flags; > > + u8 status_code; > > + u64 res; > > + > > + raw_spin_lock_irqsave(&iommu->register_lock, flags); > > + dmar_writeq(iommu->reg + DMAR_VCMD_REG, (pasid << 8) | > > VCMD_CMD_FREE); > > define a macro for pasid offset. > will do. > > + IOMMU_WAIT_OP(iommu, DMAR_VCRSP_REG, dmar_readq, > > + !(res & VCMD_VRSP_IP), res); > > + raw_spin_unlock_irqrestore(&iommu->register_lock, flags); > > + > > + status_code = VCMD_VRSP_SC(res); > > + switch (status_code) { > > + case VCMD_VRSP_SC_SUCCESS: > > + break; > > + case VCMD_VRSP_SC_INVALID_PASID: > > + pr_info("IOMMU: %s: Invalid PASID\n", iommu->name); > > + break; > > + default: > > + pr_warn("IOMMU: %s: Unexpected error code %d\n", > > + iommu->name, status_code); > > + } > > +} > > + > > /* > > * Per device pasid table management: > > */ > > diff --git a/drivers/iommu/intel-pasid.h > > b/drivers/iommu/intel-pasid.h index fc8cd8f17de1..e413e884e685 > > 100644 --- a/drivers/iommu/intel-pasid.h > > +++ b/drivers/iommu/intel-pasid.h > > @@ -23,6 +23,16 @@ > > #define is_pasid_enabled(entry) (((entry)->lo >> 3) > > & 0x1) #define get_pasid_dir_size(entry) (1 << > > ((((entry)->lo >> 9) & 0x7) + 7)) > > > > +/* Virtual command interface for enlightened pasid management. */ > > +#define VCMD_CMD_ALLOC 0x1 > > +#define VCMD_CMD_FREE 0x2 > > +#define VCMD_VRSP_IP 0x1 > > +#define VCMD_VRSP_SC(e) (((e) >> 1) & 0x3) > > +#define VCMD_VRSP_SC_SUCCESS 0 > > +#define VCMD_VRSP_SC_NO_PASID_AVAIL 1 > > +#define VCMD_VRSP_SC_INVALID_PASID 1 > > +#define VCMD_VRSP_RESULT(e) (((e) >> 8) & 0xfffff) > > + > > /* > > * Domain ID reserved for pasid entries programmed for first-level > > * only and pass-through transfer modes. > > @@ -95,5 +105,6 @@ int intel_pasid_setup_pass_through(struct > > intel_iommu *iommu, > > struct device *dev, int pasid); > > void intel_pasid_tear_down_entry(struct intel_iommu *iommu, > > struct device *dev, int pasid); > > - > > +int vcmd_alloc_pasid(struct intel_iommu *iommu, unsigned int > > *pasid); +void vcmd_free_pasid(struct intel_iommu *iommu, unsigned > > int pasid); #endif /* __INTEL_PASID_H */ > > diff --git a/include/linux/intel-iommu.h > > b/include/linux/intel-iommu.h index 2e1bed9b7eef..1d4b8dcdc5d8 > > 100644 --- a/include/linux/intel-iommu.h > > +++ b/include/linux/intel-iommu.h > > @@ -161,6 +161,7 @@ > > #define ecap_smpwc(e) (((e) >> 48) & 0x1) > > #define ecap_flts(e) (((e) >> 47) & 0x1) > > #define ecap_slts(e) (((e) >> 46) & 0x1) > > +#define ecap_vcs(e) (((e) >> 44) & 0x1) > > #define ecap_smts(e) (((e) >> 43) & 0x1) > > #define ecap_dit(e) ((e >> 41) & 0x1) > > #define ecap_pasid(e) ((e >> 40) & 0x1) > > @@ -282,6 +283,7 @@ > > > > /* PRS_REG */ > > #define DMA_PRS_PPR ((u32)1) > > +#define DMA_VCS_PAS ((u64)1) > > > > #define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) > > \ > > do > > { > > \ -- 2.7.4 > [Jacob Pan] _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2019-10-29 17:10 UTC|newest] Thread overview: 158+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-24 19:54 [PATCH v7 00/11] Nested Shared Virtual Address (SVA) VT-d support Jacob Pan 2019-10-24 19:54 ` Jacob Pan 2019-10-24 19:54 ` [PATCH v7 01/11] iommu/vt-d: Cache virtual command capability register Jacob Pan 2019-10-24 19:54 ` Jacob Pan 2019-10-25 2:53 ` Lu Baolu 2019-10-25 2:53 ` Lu Baolu 2019-10-25 6:06 ` Tian, Kevin 2019-10-25 6:06 ` Tian, Kevin 2019-11-08 10:32 ` Auger Eric 2019-11-08 10:32 ` Auger Eric 2019-10-24 19:54 ` [PATCH v7 02/11] iommu/vt-d: Enlightened PASID allocation Jacob Pan 2019-10-24 19:54 ` Jacob Pan 2019-10-25 6:19 ` Tian, Kevin 2019-10-25 6:19 ` Tian, Kevin 2019-10-29 17:14 ` Jacob Pan [this message] 2019-10-29 17:14 ` Jacob Pan 2019-10-29 18:16 ` Tian, Kevin 2019-10-29 18:16 ` Tian, Kevin 2019-11-08 10:33 ` Auger Eric 2019-11-08 10:33 ` Auger Eric 2019-11-08 22:22 ` Jacob Pan 2019-11-08 22:22 ` Jacob Pan 2019-10-24 19:54 ` [PATCH v7 03/11] iommu/vt-d: Add custom allocator for IOASID Jacob Pan 2019-10-24 19:54 ` Jacob Pan 2019-10-25 2:30 ` Lu Baolu 2019-10-25 2:30 ` Lu Baolu 2019-10-25 4:43 ` Jacob Pan 2019-10-25 4:43 ` Jacob Pan 2019-10-25 6:40 ` Tian, Kevin 2019-10-25 6:40 ` Tian, Kevin 2019-10-25 14:39 ` Lu Baolu 2019-10-25 14:39 ` Lu Baolu 2019-10-25 15:52 ` Tian, Kevin 2019-10-25 15:52 ` Tian, Kevin 2019-10-28 22:49 ` Jacob Pan 2019-10-28 22:49 ` Jacob Pan 2019-10-29 2:22 ` Lu Baolu 2019-10-29 2:22 ` Lu Baolu 2019-10-25 6:31 ` Tian, Kevin 2019-10-25 6:31 ` Tian, Kevin 2019-10-28 22:52 ` Jacob Pan 2019-10-28 22:52 ` Jacob Pan 2019-11-08 10:40 ` Auger Eric 2019-11-08 10:40 ` Auger Eric 2019-11-08 22:26 ` Jacob Pan 2019-11-08 22:26 ` Jacob Pan 2019-10-24 19:54 ` [PATCH v7 04/11] iommu/vt-d: Replace Intel specific PASID allocator with IOASID Jacob Pan 2019-10-24 19:54 ` Jacob Pan 2019-10-25 5:47 ` Lu Baolu 2019-10-25 5:47 ` Lu Baolu 2019-11-01 18:29 ` Jacob Pan 2019-11-01 18:29 ` Jacob Pan 2019-10-25 6:41 ` Tian, Kevin 2019-10-25 6:41 ` Tian, Kevin 2019-10-28 22:46 ` Jacob Pan 2019-10-28 22:46 ` Jacob Pan 2019-11-08 11:30 ` Auger Eric 2019-11-08 11:30 ` Auger Eric 2019-11-08 22:55 ` Jacob Pan 2019-11-08 22:55 ` Jacob Pan 2019-11-12 9:54 ` Auger Eric 2019-11-12 9:54 ` Auger Eric 2019-10-24 19:54 ` [PATCH v7 05/11] iommu/vt-d: Move domain helper to header Jacob Pan 2019-10-24 19:54 ` Jacob Pan 2019-10-25 5:26 ` Lu Baolu 2019-10-25 5:26 ` Lu Baolu 2019-10-24 19:54 ` [PATCH v7 06/11] iommu/vt-d: Avoid duplicated code for PASID setup Jacob Pan 2019-10-24 19:54 ` Jacob Pan 2019-10-25 5:32 ` Lu Baolu 2019-10-25 5:32 ` Lu Baolu 2019-10-25 6:42 ` Tian, Kevin 2019-10-25 6:42 ` Tian, Kevin 2019-10-28 22:41 ` Jacob Pan 2019-10-28 22:41 ` Jacob Pan 2019-11-12 9:54 ` Auger Eric 2019-11-12 9:54 ` Auger Eric 2019-10-24 19:55 ` [PATCH v7 07/11] iommu/vt-d: Add nested translation helper function Jacob Pan 2019-10-24 19:55 ` Jacob Pan 2019-10-25 7:04 ` Tian, Kevin 2019-10-25 7:04 ` Tian, Kevin 2019-11-01 21:10 ` Jacob Pan 2019-11-01 21:10 ` Jacob Pan 2019-10-25 15:04 ` Lu Baolu 2019-10-25 15:04 ` Lu Baolu 2019-10-25 16:06 ` Jacob Pan 2019-10-25 16:06 ` Jacob Pan 2019-11-08 13:55 ` Auger Eric 2019-11-08 13:55 ` Auger Eric 2019-10-24 19:55 ` [PATCH v7 08/11] iommu/vt-d: Misc macro clean up for SVM Jacob Pan 2019-10-24 19:55 ` Jacob Pan 2019-10-26 1:00 ` Lu Baolu 2019-10-26 1:00 ` Lu Baolu 2019-10-28 22:38 ` Jacob Pan 2019-10-28 22:38 ` Jacob Pan 2019-10-24 19:55 ` [PATCH v7 09/11] iommu/vt-d: Add bind guest PASID support Jacob Pan 2019-10-24 19:55 ` Jacob Pan 2019-10-25 7:19 ` Tian, Kevin 2019-10-25 7:19 ` Tian, Kevin 2019-10-25 17:33 ` Jacob Pan 2019-10-25 17:33 ` Jacob Pan 2019-10-28 6:03 ` Tian, Kevin 2019-10-28 6:03 ` Tian, Kevin 2019-10-28 16:02 ` Jacob Pan 2019-10-28 16:02 ` Jacob Pan 2019-10-29 7:57 ` Tian, Kevin 2019-10-29 7:57 ` Tian, Kevin 2019-10-29 16:11 ` Jacob Pan 2019-10-29 16:11 ` Jacob Pan 2019-10-29 18:04 ` Tian, Kevin 2019-10-29 18:04 ` Tian, Kevin 2019-10-29 2:33 ` Lu Baolu 2019-10-29 2:33 ` Lu Baolu 2019-10-26 2:01 ` Lu Baolu 2019-10-26 2:01 ` Lu Baolu 2019-10-28 22:29 ` Jacob Pan 2019-10-28 22:29 ` Jacob Pan 2019-10-29 2:54 ` Lu Baolu 2019-10-29 2:54 ` Lu Baolu 2019-10-29 4:11 ` Jacob Pan 2019-10-29 4:11 ` Jacob Pan 2019-10-29 5:04 ` Lu Baolu 2019-10-29 5:04 ` Lu Baolu 2019-10-24 19:55 ` [PATCH v7 10/11] iommu/vt-d: Support flushing more translation cache types Jacob Pan 2019-10-24 19:55 ` Jacob Pan 2019-10-25 7:21 ` Tian, Kevin 2019-10-25 7:21 ` Tian, Kevin 2019-11-01 21:30 ` Jacob Pan 2019-11-01 21:30 ` Jacob Pan 2019-10-26 2:22 ` Lu Baolu 2019-10-26 2:22 ` Lu Baolu 2019-11-01 21:28 ` Jacob Pan 2019-11-01 21:28 ` Jacob Pan 2019-11-08 16:18 ` Auger Eric 2019-11-08 16:18 ` Auger Eric 2019-11-08 23:05 ` Jacob Pan 2019-11-08 23:05 ` Jacob Pan 2019-10-24 19:55 ` [PATCH v7 11/11] iommu/vt-d: Add svm/sva invalidate function Jacob Pan 2019-10-24 19:55 ` Jacob Pan 2019-10-25 7:27 ` Tian, Kevin 2019-10-25 7:27 ` Tian, Kevin 2019-10-26 2:40 ` Lu Baolu 2019-10-26 2:40 ` Lu Baolu 2019-10-26 7:03 ` Lu Baolu 2019-10-26 7:03 ` Lu Baolu 2019-10-28 6:06 ` Tian, Kevin 2019-10-28 6:06 ` Tian, Kevin 2019-10-28 16:10 ` Jacob Pan 2019-10-28 16:10 ` Jacob Pan 2019-10-29 18:52 ` Tian, Kevin 2019-10-29 18:52 ` Tian, Kevin 2019-10-29 19:25 ` Jacob Pan 2019-10-29 19:25 ` Jacob Pan 2019-10-28 16:13 ` Jacob Pan 2019-10-28 16:13 ` Jacob Pan 2019-11-12 10:28 ` Auger Eric 2019-11-12 10:28 ` Auger Eric 2020-02-15 1:18 ` Jacob Pan 2020-02-15 1:18 ` Jacob Pan
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