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From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, nidhi1.gupta@intel.com,
	Animesh Manna <animesh.manna@intel.com>,
	manasi.d.navare@intel.com, uma.shankar@intel.com,
	anshuman.gupta@intel.com,
	Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec
Date: Mon, 23 Dec 2019 22:33:49 +0530	[thread overview]
Message-ID: <20191223170350.15531-1-animesh.manna@intel.com> (raw)
In-Reply-To: <20191218235324.GI12192@intel.com>

[Why]:
Aligh with DP spec wanted to follow same naming convention.

[How]:
Changed the macro name of the dpcd address used for getting requested
test-pattern.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
 include/drm/drm_dp_helper.h                      | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 42aa889fd0f5..1a6109be2fce 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2491,7 +2491,7 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link)
 	/* get phy test pattern and pattern parameters from DP receiver */
 	core_link_read_dpcd(
 			link,
-			DP_TEST_PHY_PATTERN,
+			DP_PHY_TEST_PATTERN,
 			&dpcd_test_pattern.raw,
 			sizeof(dpcd_test_pattern));
 	core_link_read_dpcd(
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 8f8f3632e697..d6e560870fb1 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -699,7 +699,7 @@
 # define DP_TEST_CRC_SUPPORTED		    (1 << 5)
 # define DP_TEST_COUNT_MASK		    0xf
 
-#define DP_TEST_PHY_PATTERN                 0x248
+#define DP_PHY_TEST_PATTERN                 0x248
 #define DP_TEST_80BIT_CUSTOM_PATTERN_7_0    0x250
 #define	DP_TEST_80BIT_CUSTOM_PATTERN_15_8   0x251
 #define	DP_TEST_80BIT_CUSTOM_PATTERN_23_16  0x252
-- 
2.24.0

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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, nidhi1.gupta@intel.com,
	Alex Deucher <alexander.deucher@amd.com>,
	Harry Wentland <harry.wentland@amd.com>
Subject: [Intel-gfx] [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec
Date: Mon, 23 Dec 2019 22:33:49 +0530	[thread overview]
Message-ID: <20191223170350.15531-1-animesh.manna@intel.com> (raw)
In-Reply-To: <20191218235324.GI12192@intel.com>

[Why]:
Aligh with DP spec wanted to follow same naming convention.

[How]:
Changed the macro name of the dpcd address used for getting requested
test-pattern.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
 include/drm/drm_dp_helper.h                      | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 42aa889fd0f5..1a6109be2fce 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2491,7 +2491,7 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link)
 	/* get phy test pattern and pattern parameters from DP receiver */
 	core_link_read_dpcd(
 			link,
-			DP_TEST_PHY_PATTERN,
+			DP_PHY_TEST_PATTERN,
 			&dpcd_test_pattern.raw,
 			sizeof(dpcd_test_pattern));
 	core_link_read_dpcd(
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 8f8f3632e697..d6e560870fb1 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -699,7 +699,7 @@
 # define DP_TEST_CRC_SUPPORTED		    (1 << 5)
 # define DP_TEST_COUNT_MASK		    0xf
 
-#define DP_TEST_PHY_PATTERN                 0x248
+#define DP_PHY_TEST_PATTERN                 0x248
 #define DP_TEST_80BIT_CUSTOM_PATTERN_7_0    0x250
 #define	DP_TEST_80BIT_CUSTOM_PATTERN_15_8   0x251
 #define	DP_TEST_80BIT_CUSTOM_PATTERN_23_16  0x252
-- 
2.24.0

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-12-23 17:14 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-18 15:13 [PATCH v2 0/9] DP Phy compliance auto test Animesh Manna
2019-12-18 15:13 ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 1/9] drm/dp: get/set phy compliance pattern Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 2/9] drm/amd/display: Fix compilation issue Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 15:42   ` Harry Wentland
2019-12-18 15:42     ` [Intel-gfx] " Harry Wentland
2019-12-18 16:13     ` Manna, Animesh
2019-12-18 16:13       ` [Intel-gfx] " Manna, Animesh
2019-12-18 16:22       ` Harry Wentland
2019-12-18 16:22         ` [Intel-gfx] " Harry Wentland
2019-12-18 23:53       ` Manasi Navare
2019-12-18 23:53         ` [Intel-gfx] " Manasi Navare
2019-12-19 13:36         ` Manna, Animesh
2019-12-19 13:36           ` [Intel-gfx] " Manna, Animesh
2019-12-23 17:03         ` Animesh Manna [this message]
2019-12-23 17:03           ` [Intel-gfx] [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec Animesh Manna
2019-12-23 17:03           ` [PATCH v3 2/9] drm/dp: get/set phy compliance pattern Animesh Manna
2019-12-23 17:03             ` [Intel-gfx] " Animesh Manna
2019-12-23 19:53             ` Harry Wentland
2019-12-23 19:53               ` [Intel-gfx] " Harry Wentland
2019-12-30 16:05               ` Manna, Animesh
2019-12-30 16:05                 ` [Intel-gfx] " Manna, Animesh
2019-12-30 16:11                 ` Harry Wentland
2019-12-30 16:11                   ` [Intel-gfx] " Harry Wentland
2019-12-30 16:30                   ` Manna, Animesh
2019-12-30 16:30                     ` [Intel-gfx] " Manna, Animesh
2019-12-23 19:53           ` [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec Harry Wentland
2019-12-23 19:53             ` [Intel-gfx] " Harry Wentland
2019-12-18 15:13 ` [PATCH v2 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-19 10:51   ` Jani Nikula
2019-12-19 10:51     ` [Intel-gfx] " Jani Nikula
2019-12-19 13:27     ` Manna, Animesh
2019-12-19 13:27       ` [Intel-gfx] " Manna, Animesh
2019-12-19 12:33   ` Ville Syrjälä
2019-12-19 12:33     ` [Intel-gfx] " Ville Syrjälä
2019-12-19 13:31     ` Manna, Animesh
2019-12-19 13:31       ` [Intel-gfx] " Manna, Animesh
2019-12-23 16:45     ` [PATCH v3 " Animesh Manna
2019-12-23 16:45       ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 4/9] drm/i915/dp: Preparation for DP phy compliance auto test Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 5/9] drm/i915/dsb: Send uevent to testapp Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 6/9] drm/i915/dp: Add debugfs entry for DP phy compliance Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 7/9] drm/i915/dp: Register definition for DP compliance register Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 8/9] drm/i915/dp: Update the pattern as per request Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 15:13 ` [PATCH v2 9/9] drm/i915/dp: [FIXME] Program vswing, pre-emphasis, test-pattern Animesh Manna
2019-12-18 15:13   ` [Intel-gfx] " Animesh Manna
2019-12-18 18:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DP Phy compliance auto test Patchwork
2019-12-18 18:44 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2019-12-18 19:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-20  4:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2019-12-23 19:33 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for DP Phy compliance auto test (rev4) Patchwork
2019-12-30 16:15 [PATCH v3 0/9] DP Phy compliance auto test Animesh Manna
2019-12-30 16:15 ` [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec Animesh Manna
2020-01-03 23:54   ` Manasi Navare
2020-01-06 23:05     ` Alex Deucher

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