* [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
@ 2019-03-02 1:14 ` Lucas De Marchi
2019-03-04 19:48 ` Ville Syrjälä
2019-03-02 2:08 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register Patchwork
` (5 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Lucas De Marchi @ 2019-03-02 1:14 UTC (permalink / raw)
To: intel-gfx
This register was placed in the middle of the PP_STATUS definition. Move
it down together with PP_CONTROL and fix the aligment of the bit
definition (as per documentation it should be 2 spaces instead of 1).
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c9b868347481..bbbc0649a180 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4692,17 +4692,6 @@ enum {
#define _PP_STATUS 0x61200
#define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
#define PP_ON (1 << 31)
-
-#define _PP_CONTROL_1 0xc7204
-#define _PP_CONTROL_2 0xc7304
-#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
- _PP_CONTROL_2)
-#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
-#define POWER_CYCLE_DELAY_SHIFT 4
-#define VDD_OVERRIDE_FORCE (1 << 3)
-#define BACKLIGHT_ENABLE (1 << 2)
-#define PWR_DOWN_ON_RESET (1 << 1)
-#define PWR_STATE_TARGET (1 << 0)
/*
* Indicates that all dependencies of the panel are on:
*
@@ -4728,6 +4717,17 @@ enum {
#define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
#define PP_SEQUENCE_STATE_RESET (0xf << 0)
+#define _PP_CONTROL_1 0xc7204
+#define _PP_CONTROL_2 0xc7304
+#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
+ _PP_CONTROL_2)
+#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
+#define POWER_CYCLE_DELAY_SHIFT 4
+#define VDD_OVERRIDE_FORCE (1 << 3)
+#define BACKLIGHT_ENABLE (1 << 2)
+#define PWR_DOWN_ON_RESET (1 << 1)
+#define PWR_STATE_TARGET (1 << 0)
+
#define _PP_CONTROL 0x61204
#define PP_CONTROL(pps_idx) _MMIO_PPS(pps_idx, _PP_CONTROL)
#define PANEL_UNLOCK_REGS (0xabcd << 16)
--
2.20.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL
2019-03-02 1:14 ` [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL Lucas De Marchi
@ 2019-03-04 19:48 ` Ville Syrjälä
2019-03-04 21:13 ` Jani Nikula
0 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2019-03-04 19:48 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
On Fri, Mar 01, 2019 at 05:14:05PM -0800, Lucas De Marchi wrote:
> This register was placed in the middle of the PP_STATUS definition. Move
> it down together with PP_CONTROL and fix the aligment of the bit
> definition (as per documentation it should be 2 spaces instead of 1).
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c9b868347481..bbbc0649a180 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4692,17 +4692,6 @@ enum {
> #define _PP_STATUS 0x61200
> #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
> #define PP_ON (1 << 31)
> -
> -#define _PP_CONTROL_1 0xc7204
> -#define _PP_CONTROL_2 0xc7304
> -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> - _PP_CONTROL_2)
> -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
> -#define POWER_CYCLE_DELAY_SHIFT 4
> -#define VDD_OVERRIDE_FORCE (1 << 3)
> -#define BACKLIGHT_ENABLE (1 << 2)
> -#define PWR_DOWN_ON_RESET (1 << 1)
> -#define PWR_STATE_TARGET (1 << 0)
> /*
> * Indicates that all dependencies of the panel are on:
> *
> @@ -4728,6 +4717,17 @@ enum {
> #define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
> #define PP_SEQUENCE_STATE_RESET (0xf << 0)
>
> +#define _PP_CONTROL_1 0xc7204
> +#define _PP_CONTROL_2 0xc7304
> +#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> + _PP_CONTROL_2)
> +#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
> +#define POWER_CYCLE_DELAY_SHIFT 4
> +#define VDD_OVERRIDE_FORCE (1 << 3)
> +#define BACKLIGHT_ENABLE (1 << 2)
> +#define PWR_DOWN_ON_RESET (1 << 1)
> +#define PWR_STATE_TARGET (1 << 0)
This entire register looks 100% redundant. Just nuke the whole thing?
> +
> #define _PP_CONTROL 0x61204
> #define PP_CONTROL(pps_idx) _MMIO_PPS(pps_idx, _PP_CONTROL)
> #define PANEL_UNLOCK_REGS (0xabcd << 16)
> --
> 2.20.1
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL
2019-03-04 19:48 ` Ville Syrjälä
@ 2019-03-04 21:13 ` Jani Nikula
2019-03-05 13:23 ` Jani Nikula
0 siblings, 1 reply; 16+ messages in thread
From: Jani Nikula @ 2019-03-04 21:13 UTC (permalink / raw)
To: Ville Syrjälä, Lucas De Marchi; +Cc: intel-gfx
On Mon, 04 Mar 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Mar 01, 2019 at 05:14:05PM -0800, Lucas De Marchi wrote:
>> This register was placed in the middle of the PP_STATUS definition. Move
>> it down together with PP_CONTROL and fix the aligment of the bit
>> definition (as per documentation it should be 2 spaces instead of 1).
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_reg.h | 22 +++++++++++-----------
>> 1 file changed, 11 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index c9b868347481..bbbc0649a180 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -4692,17 +4692,6 @@ enum {
>> #define _PP_STATUS 0x61200
>> #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
>> #define PP_ON (1 << 31)
>> -
>> -#define _PP_CONTROL_1 0xc7204
>> -#define _PP_CONTROL_2 0xc7304
>> -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
>> - _PP_CONTROL_2)
>> -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
>> -#define POWER_CYCLE_DELAY_SHIFT 4
>> -#define VDD_OVERRIDE_FORCE (1 << 3)
>> -#define BACKLIGHT_ENABLE (1 << 2)
>> -#define PWR_DOWN_ON_RESET (1 << 1)
>> -#define PWR_STATE_TARGET (1 << 0)
>> /*
>> * Indicates that all dependencies of the panel are on:
>> *
>> @@ -4728,6 +4717,17 @@ enum {
>> #define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
>> #define PP_SEQUENCE_STATE_RESET (0xf << 0)
>>
>> +#define _PP_CONTROL_1 0xc7204
>> +#define _PP_CONTROL_2 0xc7304
>> +#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
>> + _PP_CONTROL_2)
>> +#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
>> +#define POWER_CYCLE_DELAY_SHIFT 4
>> +#define VDD_OVERRIDE_FORCE (1 << 3)
>> +#define BACKLIGHT_ENABLE (1 << 2)
>> +#define PWR_DOWN_ON_RESET (1 << 1)
>> +#define PWR_STATE_TARGET (1 << 0)
>
> This entire register looks 100% redundant. Just nuke the whole thing?
Needed in the future?
BR,
Jani.
>
>> +
>> #define _PP_CONTROL 0x61204
>> #define PP_CONTROL(pps_idx) _MMIO_PPS(pps_idx, _PP_CONTROL)
>> #define PANEL_UNLOCK_REGS (0xabcd << 16)
>> --
>> 2.20.1
--
Jani Nikula, Intel Open Source Graphics Center
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL
2019-03-04 21:13 ` Jani Nikula
@ 2019-03-05 13:23 ` Jani Nikula
2019-03-05 21:07 ` Lucas De Marchi
0 siblings, 1 reply; 16+ messages in thread
From: Jani Nikula @ 2019-03-05 13:23 UTC (permalink / raw)
To: Ville Syrjälä, Lucas De Marchi; +Cc: intel-gfx
On Mon, 04 Mar 2019, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Mon, 04 Mar 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>> On Fri, Mar 01, 2019 at 05:14:05PM -0800, Lucas De Marchi wrote:
>>> This register was placed in the middle of the PP_STATUS definition. Move
>>> it down together with PP_CONTROL and fix the aligment of the bit
>>> definition (as per documentation it should be 2 spaces instead of 1).
>>>
>>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/i915_reg.h | 22 +++++++++++-----------
>>> 1 file changed, 11 insertions(+), 11 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>>> index c9b868347481..bbbc0649a180 100644
>>> --- a/drivers/gpu/drm/i915/i915_reg.h
>>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>>> @@ -4692,17 +4692,6 @@ enum {
>>> #define _PP_STATUS 0x61200
>>> #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
>>> #define PP_ON (1 << 31)
>>> -
>>> -#define _PP_CONTROL_1 0xc7204
>>> -#define _PP_CONTROL_2 0xc7304
>>> -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
>>> - _PP_CONTROL_2)
>>> -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
>>> -#define POWER_CYCLE_DELAY_SHIFT 4
>>> -#define VDD_OVERRIDE_FORCE (1 << 3)
>>> -#define BACKLIGHT_ENABLE (1 << 2)
>>> -#define PWR_DOWN_ON_RESET (1 << 1)
>>> -#define PWR_STATE_TARGET (1 << 0)
>>> /*
>>> * Indicates that all dependencies of the panel are on:
>>> *
>>> @@ -4728,6 +4717,17 @@ enum {
>>> #define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
>>> #define PP_SEQUENCE_STATE_RESET (0xf << 0)
>>>
>>> +#define _PP_CONTROL_1 0xc7204
>>> +#define _PP_CONTROL_2 0xc7304
>>> +#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
>>> + _PP_CONTROL_2)
>>> +#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
>>> +#define POWER_CYCLE_DELAY_SHIFT 4
>>> +#define VDD_OVERRIDE_FORCE (1 << 3)
>>> +#define BACKLIGHT_ENABLE (1 << 2)
>>> +#define PWR_DOWN_ON_RESET (1 << 1)
>>> +#define PWR_STATE_TARGET (1 << 0)
>>
>> This entire register looks 100% redundant. Just nuke the whole thing?
>
> Needed in the future?
D'oh, missed the PPS base thing. Nuke it.
BR,
Jani.
>
> BR,
> Jani.
>
>>
>>> +
>>> #define _PP_CONTROL 0x61204
>>> #define PP_CONTROL(pps_idx) _MMIO_PPS(pps_idx, _PP_CONTROL)
>>> #define PANEL_UNLOCK_REGS (0xabcd << 16)
>>> --
>>> 2.20.1
--
Jani Nikula, Intel Open Source Graphics Center
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL
2019-03-05 13:23 ` Jani Nikula
@ 2019-03-05 21:07 ` Lucas De Marchi
2019-03-06 13:19 ` Ville Syrjälä
0 siblings, 1 reply; 16+ messages in thread
From: Lucas De Marchi @ 2019-03-05 21:07 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Tue, Mar 05, 2019 at 03:23:48PM +0200, Jani Nikula wrote:
>On Mon, 04 Mar 2019, Jani Nikula <jani.nikula@linux.intel.com> wrote:
>> On Mon, 04 Mar 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>>> On Fri, Mar 01, 2019 at 05:14:05PM -0800, Lucas De Marchi wrote:
>>>> This register was placed in the middle of the PP_STATUS definition. Move
>>>> it down together with PP_CONTROL and fix the aligment of the bit
>>>> definition (as per documentation it should be 2 spaces instead of 1).
>>>>
>>>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/i915_reg.h | 22 +++++++++++-----------
>>>> 1 file changed, 11 insertions(+), 11 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>>>> index c9b868347481..bbbc0649a180 100644
>>>> --- a/drivers/gpu/drm/i915/i915_reg.h
>>>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>>>> @@ -4692,17 +4692,6 @@ enum {
>>>> #define _PP_STATUS 0x61200
>>>> #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
>>>> #define PP_ON (1 << 31)
>>>> -
>>>> -#define _PP_CONTROL_1 0xc7204
>>>> -#define _PP_CONTROL_2 0xc7304
>>>> -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
>>>> - _PP_CONTROL_2)
>>>> -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
>>>> -#define POWER_CYCLE_DELAY_SHIFT 4
>>>> -#define VDD_OVERRIDE_FORCE (1 << 3)
>>>> -#define BACKLIGHT_ENABLE (1 << 2)
>>>> -#define PWR_DOWN_ON_RESET (1 << 1)
>>>> -#define PWR_STATE_TARGET (1 << 0)
>>>> /*
>>>> * Indicates that all dependencies of the panel are on:
>>>> *
>>>> @@ -4728,6 +4717,17 @@ enum {
>>>> #define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
>>>> #define PP_SEQUENCE_STATE_RESET (0xf << 0)
>>>>
>>>> +#define _PP_CONTROL_1 0xc7204
>>>> +#define _PP_CONTROL_2 0xc7304
>>>> +#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
>>>> + _PP_CONTROL_2)
>>>> +#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
>>>> +#define POWER_CYCLE_DELAY_SHIFT 4
>>>> +#define VDD_OVERRIDE_FORCE (1 << 3)
>>>> +#define BACKLIGHT_ENABLE (1 << 2)
>>>> +#define PWR_DOWN_ON_RESET (1 << 1)
>>>> +#define PWR_STATE_TARGET (1 << 0)
>>>
>>> This entire register looks 100% redundant. Just nuke the whole thing?
>>
>> Needed in the future?
>
>D'oh, missed the PPS base thing. Nuke it.
But ICP_PP_CONTROL() is also unused. Should I nuke it as well?
Lucas De Marchi
>
>BR,
>Jani.
>
>
>>
>> BR,
>> Jani.
>>
>>>
>>>> +
>>>> #define _PP_CONTROL 0x61204
>>>> #define PP_CONTROL(pps_idx) _MMIO_PPS(pps_idx, _PP_CONTROL)
>>>> #define PANEL_UNLOCK_REGS (0xabcd << 16)
>>>> --
>>>> 2.20.1
>
>--
>Jani Nikula, Intel Open Source Graphics Center
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL
2019-03-05 21:07 ` Lucas De Marchi
@ 2019-03-06 13:19 ` Ville Syrjälä
2019-03-08 23:23 ` [PATCH v2] drm/i915: remove ICP_PP_CONTROL Lucas De Marchi
0 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2019-03-06 13:19 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
On Tue, Mar 05, 2019 at 01:07:34PM -0800, Lucas De Marchi wrote:
> On Tue, Mar 05, 2019 at 03:23:48PM +0200, Jani Nikula wrote:
> >On Mon, 04 Mar 2019, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> >> On Mon, 04 Mar 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> >>> On Fri, Mar 01, 2019 at 05:14:05PM -0800, Lucas De Marchi wrote:
> >>>> This register was placed in the middle of the PP_STATUS definition. Move
> >>>> it down together with PP_CONTROL and fix the aligment of the bit
> >>>> definition (as per documentation it should be 2 spaces instead of 1).
> >>>>
> >>>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> >>>> ---
> >>>> drivers/gpu/drm/i915/i915_reg.h | 22 +++++++++++-----------
> >>>> 1 file changed, 11 insertions(+), 11 deletions(-)
> >>>>
> >>>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> >>>> index c9b868347481..bbbc0649a180 100644
> >>>> --- a/drivers/gpu/drm/i915/i915_reg.h
> >>>> +++ b/drivers/gpu/drm/i915/i915_reg.h
> >>>> @@ -4692,17 +4692,6 @@ enum {
> >>>> #define _PP_STATUS 0x61200
> >>>> #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
> >>>> #define PP_ON (1 << 31)
> >>>> -
> >>>> -#define _PP_CONTROL_1 0xc7204
> >>>> -#define _PP_CONTROL_2 0xc7304
> >>>> -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> >>>> - _PP_CONTROL_2)
> >>>> -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
> >>>> -#define POWER_CYCLE_DELAY_SHIFT 4
> >>>> -#define VDD_OVERRIDE_FORCE (1 << 3)
> >>>> -#define BACKLIGHT_ENABLE (1 << 2)
> >>>> -#define PWR_DOWN_ON_RESET (1 << 1)
> >>>> -#define PWR_STATE_TARGET (1 << 0)
> >>>> /*
> >>>> * Indicates that all dependencies of the panel are on:
> >>>> *
> >>>> @@ -4728,6 +4717,17 @@ enum {
> >>>> #define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
> >>>> #define PP_SEQUENCE_STATE_RESET (0xf << 0)
> >>>>
> >>>> +#define _PP_CONTROL_1 0xc7204
> >>>> +#define _PP_CONTROL_2 0xc7304
> >>>> +#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> >>>> + _PP_CONTROL_2)
> >>>> +#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
> >>>> +#define POWER_CYCLE_DELAY_SHIFT 4
> >>>> +#define VDD_OVERRIDE_FORCE (1 << 3)
> >>>> +#define BACKLIGHT_ENABLE (1 << 2)
> >>>> +#define PWR_DOWN_ON_RESET (1 << 1)
> >>>> +#define PWR_STATE_TARGET (1 << 0)
> >>>
> >>> This entire register looks 100% redundant. Just nuke the whole thing?
> >>
> >> Needed in the future?
> >
> >D'oh, missed the PPS base thing. Nuke it.
>
> But ICP_PP_CONTROL() is also unused. Should I nuke it as well?
Yes.
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v2] drm/i915: remove ICP_PP_CONTROL
2019-03-06 13:19 ` Ville Syrjälä
@ 2019-03-08 23:23 ` Lucas De Marchi
2020-01-02 23:44 ` [Intel-gfx] " Lucas De Marchi
0 siblings, 1 reply; 16+ messages in thread
From: Lucas De Marchi @ 2019-03-08 23:23 UTC (permalink / raw)
To: intel-gfx
This register was placed in the middle of the PP_STATUS definition
instead of together with the PP_CONTROL where it should. Since it's not
used and there are no current plans to use it, just remove the
definition.
v2: remove the define rather than moving it.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c0cd7a836799..4a855befa838 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4692,17 +4692,6 @@ enum {
#define _PP_STATUS 0x61200
#define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
#define PP_ON (1 << 31)
-
-#define _PP_CONTROL_1 0xc7204
-#define _PP_CONTROL_2 0xc7304
-#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
- _PP_CONTROL_2)
-#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
-#define POWER_CYCLE_DELAY_SHIFT 4
-#define VDD_OVERRIDE_FORCE (1 << 3)
-#define BACKLIGHT_ENABLE (1 << 2)
-#define PWR_DOWN_ON_RESET (1 << 1)
-#define PWR_STATE_TARGET (1 << 0)
/*
* Indicates that all dependencies of the panel are on:
*
--
2.20.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [Intel-gfx] [PATCH v2] drm/i915: remove ICP_PP_CONTROL
2019-03-08 23:23 ` [PATCH v2] drm/i915: remove ICP_PP_CONTROL Lucas De Marchi
@ 2020-01-02 23:44 ` Lucas De Marchi
2020-01-07 14:20 ` Ville Syrjälä
0 siblings, 1 reply; 16+ messages in thread
From: Lucas De Marchi @ 2020-01-02 23:44 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Intel Graphics
Today I saw this register and had a vague memory of having already
removed it in the past.
It seems this patch has never been reviewed/applied.
Ping
Lucas De Marchi
On Fri, Mar 8, 2019 at 3:23 PM Lucas De Marchi <lucas.demarchi@intel.com> wrote:
>
> This register was placed in the middle of the PP_STATUS definition
> instead of together with the PP_CONTROL where it should. Since it's not
> used and there are no current plans to use it, just remove the
> definition.
>
> v2: remove the define rather than moving it.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 11 -----------
> 1 file changed, 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c0cd7a836799..4a855befa838 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4692,17 +4692,6 @@ enum {
> #define _PP_STATUS 0x61200
> #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
> #define PP_ON (1 << 31)
> -
> -#define _PP_CONTROL_1 0xc7204
> -#define _PP_CONTROL_2 0xc7304
> -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> - _PP_CONTROL_2)
> -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
> -#define POWER_CYCLE_DELAY_SHIFT 4
> -#define VDD_OVERRIDE_FORCE (1 << 3)
> -#define BACKLIGHT_ENABLE (1 << 2)
> -#define PWR_DOWN_ON_RESET (1 << 1)
> -#define PWR_STATE_TARGET (1 << 0)
> /*
> * Indicates that all dependencies of the panel are on:
> *
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Lucas De Marchi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [Intel-gfx] [PATCH v2] drm/i915: remove ICP_PP_CONTROL
2020-01-02 23:44 ` [Intel-gfx] " Lucas De Marchi
@ 2020-01-07 14:20 ` Ville Syrjälä
0 siblings, 0 replies; 16+ messages in thread
From: Ville Syrjälä @ 2020-01-07 14:20 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Intel Graphics, Lucas De Marchi
On Thu, Jan 02, 2020 at 03:44:38PM -0800, Lucas De Marchi wrote:
> Today I saw this register and had a vague memory of having already
> removed it in the past.
> It seems this patch has never been reviewed/applied.
>
> Ping
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Lucas De Marchi
>
> On Fri, Mar 8, 2019 at 3:23 PM Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> >
> > This register was placed in the middle of the PP_STATUS definition
> > instead of together with the PP_CONTROL where it should. Since it's not
> > used and there are no current plans to use it, just remove the
> > definition.
> >
> > v2: remove the define rather than moving it.
> >
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 11 -----------
> > 1 file changed, 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index c0cd7a836799..4a855befa838 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4692,17 +4692,6 @@ enum {
> > #define _PP_STATUS 0x61200
> > #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
> > #define PP_ON (1 << 31)
> > -
> > -#define _PP_CONTROL_1 0xc7204
> > -#define _PP_CONTROL_2 0xc7304
> > -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> > - _PP_CONTROL_2)
> > -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
> > -#define POWER_CYCLE_DELAY_SHIFT 4
> > -#define VDD_OVERRIDE_FORCE (1 << 3)
> > -#define BACKLIGHT_ENABLE (1 << 2)
> > -#define PWR_DOWN_ON_RESET (1 << 1)
> > -#define PWR_STATE_TARGET (1 << 0)
> > /*
> > * Indicates that all dependencies of the panel are on:
> > *
> > --
> > 2.20.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Lucas De Marchi
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
2019-03-02 1:14 ` [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL Lucas De Marchi
@ 2019-03-02 2:08 ` Patchwork
2019-03-02 2:40 ` ✓ Fi.CI.BAT: success " Patchwork
` (4 subsequent siblings)
6 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-03-02 2:08 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register
URL : https://patchwork.freedesktop.org/series/57454/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
dee9ff2ced87 drm/i915: Fix bit name in PP_STATUS register
2299a0a818e9 drm/i915: fix placement of ICP_PP_CONTROL
-:7: WARNING:TYPO_SPELLING: 'aligment' may be misspelled - perhaps 'alignment'?
#7:
it down together with PP_CONTROL and fix the aligment of the bit
total: 0 errors, 1 warnings, 0 checks, 34 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
2019-03-02 1:14 ` [PATCH 2/2] drm/i915: fix placement of ICP_PP_CONTROL Lucas De Marchi
2019-03-02 2:08 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register Patchwork
@ 2019-03-02 2:40 ` Patchwork
2019-03-02 12:29 ` ✓ Fi.CI.IGT: " Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-03-02 2:40 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register
URL : https://patchwork.freedesktop.org/series/57454/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5683 -> Patchwork_12352
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/57454/revisions/1/mbox/
Known issues
------------
Here are the changes found in Patchwork_12352 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-compute:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#108094]
* igt@i915_selftest@live_execlists:
- fi-apl-guc: PASS -> INCOMPLETE [fdo#103927] / [fdo#109720]
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: PASS -> FAIL [fdo#103182]
* igt@kms_busy@basic-flip-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +48
* igt@runner@aborted:
- fi-apl-guc: NOTRUN -> FAIL [fdo#108622] / [fdo#109720] / [fdo#109799]
#### Possible fixes ####
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: DMESG-WARN [fdo#108965] -> PASS
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@kms_busy@basic-flip-b:
- fi-gdg-551: FAIL [fdo#103182] -> PASS
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108094]: https://bugs.freedesktop.org/show_bug.cgi?id=108094
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
[fdo#109799]: https://bugs.freedesktop.org/show_bug.cgi?id=109799
Participating hosts (45 -> 38)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-n2820 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5683 -> Patchwork_12352
CI_DRM_5683: 40251405bb454b06259738bcebf4529c888f7fe0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4866: 189956af183c245eb237b3be4fa22953ec93bbe0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12352: 2299a0a818e982fff3b5252b109a915c3a2f9a3f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2299a0a818e9 drm/i915: fix placement of ICP_PP_CONTROL
dee9ff2ced87 drm/i915: Fix bit name in PP_STATUS register
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12352/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
` (2 preceding siblings ...)
2019-03-02 2:40 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-03-02 12:29 ` Patchwork
2019-03-04 19:43 ` [PATCH 1/2] " Ville Syrjälä
` (2 subsequent siblings)
6 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-03-02 12:29 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register
URL : https://patchwork.freedesktop.org/series/57454/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5683_full -> Patchwork_12352_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12352_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@stolen-invalid-flag:
- shard-iclb: NOTRUN -> SKIP [fdo#109277]
* igt@gem_ctx_isolation@rcs0-dirty-create:
- shard-iclb: NOTRUN -> SKIP [fdo#109281] +1
* igt@gem_exec_big:
- shard-hsw: PASS -> TIMEOUT [fdo#107937]
* igt@gem_exec_schedule@preempt-other-chain-bsd2:
- shard-iclb: NOTRUN -> SKIP [fdo#109276] +2
* igt@gem_mocs_settings@mocs-settings-vebox:
- shard-iclb: NOTRUN -> SKIP [fdo#109287] +1
* igt@gem_userptr_blits@process-exit-gtt:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +20
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- shard-skl: PASS -> INCOMPLETE [fdo#107807] +1
* igt@i915_pm_rpm@gem-execbuf:
- shard-skl: NOTRUN -> INCOMPLETE [fdo#107803] / [fdo#107807]
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-iclb: PASS -> INCOMPLETE [fdo#108840]
* igt@i915_pm_rpm@system-suspend-modeset:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] +2
* igt@kms_atomic_transition@2x-modeset-transitions:
- shard-iclb: NOTRUN -> SKIP [fdo#109280] +4
* igt@kms_atomic_transition@4x-modeset-transitions-nonblocking-fencing:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +5
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-iclb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-oldfb-render-f:
- shard-iclb: NOTRUN -> SKIP [fdo#109278]
* igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-e:
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_busy@extended-pageflip-hang-newfb-render-e:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +6
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-glk: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_chv_cursor_fail@pipe-c-64x64-left-edge:
- shard-skl: NOTRUN -> FAIL [fdo#104671]
* igt@kms_color@pipe-b-degamma:
- shard-apl: PASS -> FAIL [fdo#104782]
* igt@kms_color@pipe-c-ctm-max:
- shard-skl: NOTRUN -> FAIL [fdo#108147]
* igt@kms_cursor_crc@cursor-128x42-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +4
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-glk: NOTRUN -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-256x256-onscreen:
- shard-skl: NOTRUN -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-512x512-dpms:
- shard-iclb: NOTRUN -> SKIP [fdo#109279]
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: PASS -> FAIL [fdo#105767]
* igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-xtiled:
- shard-skl: NOTRUN -> FAIL [fdo#103184]
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-untiled:
- shard-skl: NOTRUN -> FAIL [fdo#108472]
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: PASS -> FAIL [fdo#102887]
* igt@kms_flip@2x-nonexisting-fb:
- shard-iclb: NOTRUN -> SKIP [fdo#109274] +3
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-iclb: PASS -> INCOMPLETE [fdo#109507]
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-skl: PASS -> FAIL [fdo#100368]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-apl: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
- shard-hsw: PASS -> SKIP [fdo#109271]
* igt@kms_frontbuffer_tracking@fbc-badstride:
- shard-skl: NOTRUN -> FAIL [fdo#105682] +3
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-wc:
- shard-skl: NOTRUN -> FAIL [fdo#103167] +1
* igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
- shard-skl: NOTRUN -> FAIL [fdo#103191] / [fdo#107362]
* igt@kms_plane@plane-position-covered-pipe-b-planes:
- shard-iclb: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145]
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +4
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: NOTRUN -> FAIL [fdo#107815]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@busy-accuracy-50-vcs1:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +82
* igt@prime_busy@wait-after-bsd:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +30
* igt@prime_nv_api@i915_nv_double_export:
- shard-apl: NOTRUN -> SKIP [fdo#109271] +1
* igt@prime_nv_test@i915_nv_sharing:
- shard-iclb: NOTRUN -> SKIP [fdo#109291]
#### Possible fixes ####
* igt@gem_eio@reset-stress:
- shard-snb: INCOMPLETE [fdo#105411] -> PASS
* igt@gem_mmap_wc@set-cache-level:
- shard-snb: SKIP [fdo#109271] -> PASS +3
* igt@i915_pm_rpm@fences:
- shard-iclb: DMESG-WARN [fdo#107724] -> PASS +5
* igt@i915_pm_rpm@legacy-planes:
- shard-iclb: DMESG-WARN [fdo#108654] -> PASS
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-hsw: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_color@pipe-a-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-128x42-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-hsw: FAIL [fdo#102887] -> PASS
* igt@kms_flip@flip-vs-panning-vs-hang:
- shard-apl: INCOMPLETE [fdo#103927] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-apl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
- shard-glk: FAIL [fdo#103167] -> PASS +2
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-iclb: FAIL [fdo#103167] -> PASS +2
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-iclb: FAIL [fdo#103166] -> PASS +1
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-glk: FAIL [fdo#103166] -> PASS +1
* igt@kms_rotation_crc@multiplane-rotation:
- shard-kbl: FAIL [fdo#109016] -> PASS
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-kbl: DMESG-FAIL [fdo#105763] -> PASS
#### Warnings ####
* igt@i915_pm_rpm@pc8-residency:
- shard-skl: INCOMPLETE [fdo#107807] -> SKIP [fdo#109271]
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104671]: https://bugs.freedesktop.org/show_bug.cgi?id=104671
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
[fdo#107937]: https://bugs.freedesktop.org/show_bug.cgi?id=107937
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108472]: https://bugs.freedesktop.org/show_bug.cgi?id=108472
[fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109281]: https://bugs.freedesktop.org/show_bug.cgi?id=109281
[fdo#109287]: https://bugs.freedesktop.org/show_bug.cgi?id=109287
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_5683 -> Patchwork_12352
CI_DRM_5683: 40251405bb454b06259738bcebf4529c888f7fe0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4866: 189956af183c245eb237b3be4fa22953ec93bbe0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12352: 2299a0a818e982fff3b5252b109a915c3a2f9a3f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12352/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
` (3 preceding siblings ...)
2019-03-02 12:29 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-03-04 19:43 ` Ville Syrjälä
2019-03-09 0:21 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register (rev2) Patchwork
2019-03-09 8:17 ` ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 16+ messages in thread
From: Ville Syrjälä @ 2019-03-04 19:43 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
On Fri, Mar 01, 2019 at 05:14:04PM -0800, Lucas De Marchi wrote:
> According to the spec PP_SEQUENCE_STATE_ON_S1_1 is the correct name, so
> just rename it.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c9b482bc6433..c9b868347481 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4723,7 +4723,7 @@ enum {
> #define PP_SEQUENCE_STATE_OFF_S0_2 (0x2 << 0)
> #define PP_SEQUENCE_STATE_OFF_S0_3 (0x3 << 0)
> #define PP_SEQUENCE_STATE_ON_IDLE (0x8 << 0)
> -#define PP_SEQUENCE_STATE_ON_S1_0 (0x9 << 0)
> +#define PP_SEQUENCE_STATE_ON_S1_1 (0x9 << 0)
> #define PP_SEQUENCE_STATE_ON_S1_2 (0xa << 0)
> #define PP_SEQUENCE_STATE_ON_S1_3 (0xb << 0)
> #define PP_SEQUENCE_STATE_RESET (0xf << 0)
> --
> 2.20.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register (rev2)
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
` (4 preceding siblings ...)
2019-03-04 19:43 ` [PATCH 1/2] " Ville Syrjälä
@ 2019-03-09 0:21 ` Patchwork
2019-03-09 8:17 ` ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-03-09 0:21 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register (rev2)
URL : https://patchwork.freedesktop.org/series/57454/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5729 -> Patchwork_12428
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/57454/revisions/2/mbox/
Known issues
------------
Here are the changes found in Patchwork_12428 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@query-info:
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] +56
* igt@gem_exec_basic@gtt-bsd2:
- fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] +57
* igt@i915_pm_rpm@basic-rte:
- fi-bsw-kefka: NOTRUN -> FAIL [fdo#108800]
* igt@kms_addfb_basic@addfb25-y-tiled-small:
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +56
* igt@kms_busy@basic-flip-a:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_busy@basic-flip-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@hdmi-crc-fast:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] +62
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: PASS -> FAIL [fdo#103167]
- fi-byt-clapper: NOTRUN -> FAIL [fdo#103167]
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-c:
- fi-blb-e6850: NOTRUN -> SKIP [fdo#109271] +48
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-byt-clapper: NOTRUN -> FAIL [fdo#107362]
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: FAIL [fdo#103182] -> PASS
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (40 -> 38)
------------------------------
Additional (4): fi-bsw-kefka fi-byt-n2820 fi-byt-clapper fi-bsw-n3050
Missing (6): fi-ilk-m540 fi-bdw-5557u fi-skl-6770hq fi-bsw-cyan fi-bwr-2160 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5729 -> Patchwork_12428
CI_DRM_5729: b50390674ed3eff49d1926a86acfee68b5565093 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4878: 478615b1edba88559386ba80ccbf0f035f3360a9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12428: d7269a507b168f2d093476ccd9a14d24740024a4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d7269a507b16 drm/i915: remove ICP_PP_CONTROL
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12428/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register (rev2)
2019-03-02 1:14 [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register Lucas De Marchi
` (5 preceding siblings ...)
2019-03-09 0:21 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register (rev2) Patchwork
@ 2019-03-09 8:17 ` Patchwork
6 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-03-09 8:17 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix bit name in PP_STATUS register (rev2)
URL : https://patchwork.freedesktop.org/series/57454/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5729_full -> Patchwork_12428_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12428_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_partial_pwrite_pread@write-display:
- {shard-iclb}: PASS -> TIMEOUT
* igt@i915_pm_rc6_residency@rc6-accuracy:
- {shard-iclb}: PASS -> SKIP +1
* igt@kms_busy@extended-modeset-hang-oldfb-render-c:
- {shard-iclb}: PASS -> DMESG-WARN
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
- {shard-iclb}: PASS -> FAIL +18
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- {shard-iclb}: NOTRUN -> FAIL
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-pwrite:
- {shard-iclb}: NOTRUN -> SKIP +2
* igt@kms_plane@pixel-format-pipe-a-planes:
- {shard-iclb}: FAIL [fdo#103166] -> SKIP
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- {shard-iclb}: FAIL [fdo#108948] -> SKIP
* igt@perf_pmu@render-node-busy-bcs0:
- {shard-iclb}: PASS -> INCOMPLETE
* igt@runner@aborted:
- {shard-iclb}: ( 2 FAIL ) -> ( 4 FAIL )
Known issues
------------
Here are the changes found in Patchwork_12428_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-snb: PASS -> DMESG-WARN [fdo#102365]
* igt@gen3_render_tiledy_blits:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] +20
* igt@i915_pm_rpm@gem-execbuf-stress-extra-wait:
- shard-snb: NOTRUN -> SKIP [fdo#109271] +72
* igt@kms_atomic_transition@3x-modeset-transitions:
- shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +7
* igt@kms_busy@basic-flip-f:
- shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4
* igt@kms_busy@extended-modeset-hang-newfb-render-c:
- shard-glk: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
- shard-glk: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
- shard-hsw: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_chv_cursor_fail@pipe-b-128x128-bottom-edge:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@kms_chv_cursor_fail@pipe-c-64x64-left-edge:
- shard-skl: PASS -> FAIL [fdo#104671]
* igt@kms_color@pipe-a-degamma:
- shard-hsw: NOTRUN -> SKIP [fdo#109271] +2
* igt@kms_cursor_crc@cursor-128x42-offscreen:
- shard-kbl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +29
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-skl: PASS -> INCOMPLETE [fdo#104108]
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: PASS -> FAIL [fdo#105767]
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: NOTRUN -> FAIL [fdo#103833]
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#105363]
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: PASS -> FAIL [fdo#105363]
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: PASS -> FAIL [fdo#100368]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-glk: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack:
- shard-glk: NOTRUN -> SKIP [fdo#109271] +25
* igt@kms_plane_multiple@atomic-pipe-c-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_plane_scaling@pipe-b-scaler-with-clipping-clamping:
- shard-glk: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_setmode@basic:
- shard-glk: PASS -> FAIL [fdo#99912]
* igt@kms_universal_plane@disable-primary-vs-flip-pipe-d:
- shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@perf_pmu@busy-accuracy-50-vcs1:
- shard-skl: NOTRUN -> SKIP [fdo#109271] +40
#### Possible fixes ####
* igt@gem_eio@context-create:
- shard-glk: FAIL -> PASS
* igt@gem_sync@basic-all:
- {shard-iclb}: DMESG-FAIL -> PASS
* igt@kms_color@pipe-a-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-128x128-offscreen:
- shard-skl: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-hsw: INCOMPLETE [fdo#103540] -> PASS
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled:
- shard-skl: FAIL [fdo#108145] / [fdo#108472] -> PASS
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-skl: FAIL [fdo#103833] / [fdo#105682] -> PASS
* igt@kms_flip_tiling@flip-y-tiled:
- shard-skl: FAIL [fdo#108303] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
- shard-skl: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-glk: FAIL [fdo#103167] -> PASS +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-apl: FAIL [fdo#103167] -> PASS +1
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- {shard-iclb}: FAIL [fdo#105682] / [fdo#108040] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-wc:
- shard-skl: FAIL [fdo#105682] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
- {shard-iclb}: FAIL -> PASS +21
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
- {shard-iclb}: FAIL [fdo#103167] -> PASS +3
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
- {shard-iclb}: FAIL [fdo#105682] -> PASS +1
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- {shard-iclb}: FAIL [fdo#103375] -> PASS
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: FAIL [fdo#107815] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-glk: FAIL [fdo#103166] -> PASS +2
- shard-apl: FAIL [fdo#103166] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- {shard-iclb}: FAIL [fdo#103166] -> PASS +2
* igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
- {shard-iclb}: SKIP [fdo#109278] -> PASS
* igt@kms_psr@primary_page_flip:
- {shard-iclb}: FAIL [fdo#107383] -> PASS +1
* igt@kms_psr@psr2_primary_blt:
- {shard-iclb}: SKIP [fdo#109441] -> PASS +1
* igt@kms_setmode@basic:
- shard-hsw: FAIL [fdo#99912] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104671]: https://bugs.freedesktop.org/show_bug.cgi?id=104671
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
[fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303
[fdo#108472]: https://bugs.freedesktop.org/show_bug.cgi?id=108472
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109287]: https://bugs.freedesktop.org/show_bug.cgi?id=109287
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109292]: https://bugs.freedesktop.org/show_bug.cgi?id=109292
[fdo#109301]: https://bugs.freedesktop.org/show_bug.cgi?id=109301
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109502]: https://bugs.freedesktop.org/show_bug.cgi?id=109502
[fdo#109766]: https://bugs.freedesktop.org/show_bug.cgi?id=109766
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_5729 -> Patchwork_12428
CI_DRM_5729: b50390674ed3eff49d1926a86acfee68b5565093 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4878: 478615b1edba88559386ba80ccbf0f035f3360a9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12428: d7269a507b168f2d093476ccd9a14d24740024a4 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12428/
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