From: Sean Paul <sean@poorly.run> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: daniel.vetter@ffwll.ch, seanpaul@chromium.org, juston.li@intel.com, rodrigo.vivi@intel.com Subject: [PATCH v6 10/16] drm/i915: Use ddi_update_pipe in intel_dp_mst Date: Wed, 29 Apr 2020 15:54:56 -0400 [thread overview] Message-ID: <20200429195502.39919-11-sean@poorly.run> (raw) In-Reply-To: <20200429195502.39919-1-sean@poorly.run> From: Sean Paul <seanpaul@chromium.org> In order to act upon content_protection property changes, we'll need to implement the .update_pipe() hook. We can re-use intel_ddi_update_pipe for this Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-10-sean@poorly.run #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20191212190230.188505-11-sean@poorly.run #v2 Link: https://patchwork.freedesktop.org/patch/msgid/20200117193103.156821-11-sean@poorly.run #v3 Link: https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-11-sean@poorly.run #v4 Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-11-sean@poorly.run #v5 Changes in v2: -None Changes in v3: -None Changes in v4: -None Changes in v5: -None Changes in v6: -None --- drivers/gpu/drm/i915/display/intel_ddi.c | 11 ++++++----- drivers/gpu/drm/i915/display/intel_dp.h | 6 ++++++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 1 + 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 11155a8a73c0..85dcb2dc2d3c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3865,13 +3865,14 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state, intel_panel_update_backlight(state, encoder, crtc_state, conn_state); } -static void intel_ddi_update_pipe(struct intel_atomic_state *state, - struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state) +void intel_ddi_update_pipe(struct intel_atomic_state *state, + struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { - if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) && + !intel_encoder_is_mst(encoder)) intel_ddi_update_pipe_dp(state, encoder, crtc_state, conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 6659ce15a693..0bd440382281 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -16,6 +16,7 @@ struct drm_connector_state; struct drm_encoder; struct drm_i915_private; struct drm_modeset_acquire_ctx; +struct intel_atomic_state; struct intel_connector; struct intel_crtc_state; struct intel_digital_port; @@ -127,4 +128,9 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count) u32 intel_dp_mode_to_fec_clock(u32 mode_clock); +void intel_ddi_update_pipe(struct intel_atomic_state *state, + struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state); + #endif /* __INTEL_DP_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 4d2384650383..d9dc4dc6ea92 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -805,6 +805,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum intel_encoder->compute_config_late = intel_dp_mst_compute_config_late; intel_encoder->disable = intel_mst_disable_dp; intel_encoder->post_disable = intel_mst_post_disable_dp; + intel_encoder->update_pipe = intel_ddi_update_pipe; intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp; intel_encoder->pre_enable = intel_mst_pre_enable_dp; intel_encoder->enable = intel_mst_enable_dp; -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Sean Paul <sean@poorly.run> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: daniel.vetter@ffwll.ch, seanpaul@chromium.org Subject: [Intel-gfx] [PATCH v6 10/16] drm/i915: Use ddi_update_pipe in intel_dp_mst Date: Wed, 29 Apr 2020 15:54:56 -0400 [thread overview] Message-ID: <20200429195502.39919-11-sean@poorly.run> (raw) In-Reply-To: <20200429195502.39919-1-sean@poorly.run> From: Sean Paul <seanpaul@chromium.org> In order to act upon content_protection property changes, we'll need to implement the .update_pipe() hook. We can re-use intel_ddi_update_pipe for this Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-10-sean@poorly.run #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20191212190230.188505-11-sean@poorly.run #v2 Link: https://patchwork.freedesktop.org/patch/msgid/20200117193103.156821-11-sean@poorly.run #v3 Link: https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-11-sean@poorly.run #v4 Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-11-sean@poorly.run #v5 Changes in v2: -None Changes in v3: -None Changes in v4: -None Changes in v5: -None Changes in v6: -None --- drivers/gpu/drm/i915/display/intel_ddi.c | 11 ++++++----- drivers/gpu/drm/i915/display/intel_dp.h | 6 ++++++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 1 + 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 11155a8a73c0..85dcb2dc2d3c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3865,13 +3865,14 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state, intel_panel_update_backlight(state, encoder, crtc_state, conn_state); } -static void intel_ddi_update_pipe(struct intel_atomic_state *state, - struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state) +void intel_ddi_update_pipe(struct intel_atomic_state *state, + struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { - if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) && + !intel_encoder_is_mst(encoder)) intel_ddi_update_pipe_dp(state, encoder, crtc_state, conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 6659ce15a693..0bd440382281 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -16,6 +16,7 @@ struct drm_connector_state; struct drm_encoder; struct drm_i915_private; struct drm_modeset_acquire_ctx; +struct intel_atomic_state; struct intel_connector; struct intel_crtc_state; struct intel_digital_port; @@ -127,4 +128,9 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count) u32 intel_dp_mode_to_fec_clock(u32 mode_clock); +void intel_ddi_update_pipe(struct intel_atomic_state *state, + struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state); + #endif /* __INTEL_DP_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 4d2384650383..d9dc4dc6ea92 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -805,6 +805,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum intel_encoder->compute_config_late = intel_dp_mst_compute_config_late; intel_encoder->disable = intel_mst_disable_dp; intel_encoder->post_disable = intel_mst_post_disable_dp; + intel_encoder->update_pipe = intel_ddi_update_pipe; intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp; intel_encoder->pre_enable = intel_mst_pre_enable_dp; intel_encoder->enable = intel_mst_enable_dp; -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-04-29 19:55 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-29 19:54 [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 01/16] drm/i915: Fix sha_text population code Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` Sean Paul 2020-05-01 2:55 ` Sasha Levin 2020-05-01 2:55 ` [Intel-gfx] " Sasha Levin 2020-05-06 14:00 ` Ramalingam C 2020-05-06 14:00 ` [Intel-gfx] " Ramalingam C 2020-05-06 14:00 ` Ramalingam C 2020-04-29 19:54 ` [PATCH v6 02/16] drm/i915: Clear the repeater bit on HDCP disable Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` Sean Paul 2020-05-01 2:55 ` Sasha Levin 2020-05-01 2:55 ` [Intel-gfx] " Sasha Levin 2020-05-01 2:55 ` Sasha Levin 2020-05-06 14:02 ` Ramalingam C 2020-05-06 14:02 ` [Intel-gfx] " Ramalingam C 2020-05-06 14:02 ` Ramalingam C 2020-04-29 19:54 ` [PATCH v6 03/16] drm/i915: WARN if HDCP signalling is enabled upon disable Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-06 14:18 ` Ramalingam C 2020-05-06 14:18 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 04/16] drm/i915: Intercept Aksv writes in the aux hooks Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-06 14:13 ` Ramalingam C 2020-05-06 14:13 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 05/16] drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP signalling Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 06/16] drm/i915: Factor out hdcp->value assignments Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 07/16] drm/i915: Protect workers against disappearing connectors Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 08/16] drm/i915: Don't fully disable HDCP on a port if multiple pipes are using it Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-15 12:39 ` Ramalingam C 2020-05-15 12:39 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 09/16] drm/i915: Support DP MST in enc_to_dig_port() function Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` Sean Paul [this message] 2020-04-29 19:54 ` [Intel-gfx] [PATCH v6 10/16] drm/i915: Use ddi_update_pipe in intel_dp_mst Sean Paul 2020-04-29 19:54 ` [PATCH v6 11/16] drm/i915: Factor out HDCP shim functions from dp for use by dp_mst Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 12/16] drm/i915: Plumb port through hdcp init Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 13/16] drm/i915: Add connector to hdcp_shim->check_link() Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 14/16] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 15/16] drm/i915: Print HDCP version info for all connectors Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 16/16] drm/i915: Add HDCP 1.4 support for MST connectors Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-05-15 14:42 ` Ramalingam C 2020-05-15 14:42 ` [Intel-gfx] " Ramalingam C 2020-06-18 18:20 ` Sean Paul 2020-06-18 18:20 ` [Intel-gfx] " Sean Paul 2020-04-29 20:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for HDCP 1.4 over MST connectors (rev6) Patchwork 2020-04-29 21:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-04-30 5:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2020-05-15 14:48 ` [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Ramalingam C 2020-05-15 14:48 ` [Intel-gfx] " Ramalingam C 2020-05-18 14:32 ` Sean Paul 2020-05-18 14:32 ` [Intel-gfx] " Sean Paul 2020-05-18 16:41 ` Ramalingam C 2020-05-18 16:41 ` [Intel-gfx] " Ramalingam C 2020-05-20 13:11 ` Sean Paul 2020-05-20 13:11 ` [Intel-gfx] " Sean Paul 2020-05-26 10:38 ` Ramalingam C 2020-05-26 10:38 ` [Intel-gfx] " Ramalingam C
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