From: Ramalingam C <ramalingam.c@intel.com> To: Sean Paul <sean@poorly.run> Cc: dri-devel@lists.freedesktop.org, daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, seanpaul@chromium.org, juston.li@intel.com, rodrigo.vivi@intel.com Subject: Re: [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Date: Fri, 15 May 2020 20:18:12 +0530 [thread overview] Message-ID: <20200515144812.GB11877@intel.com> (raw) In-Reply-To: <20200429195502.39919-1-sean@poorly.run> On 2020-04-29 at 15:54:46 -0400, Sean Paul wrote: > From: Sean Paul <seanpaul@chromium.org> > > Changes in v6: > -Rebased on -tip > -Disabled HDCP over MST on GEN12 > -Addressed Lyude's review comments in the QUERY_STREAM_ENCRYPTION_STATUS patch Sean, What is the test setup you have used? I am afraid our CI dont have the coverage for MST capability yet to provide the functional status of the code. -Ram. > > Sean Paul (16): > drm/i915: Fix sha_text population code > drm/i915: Clear the repeater bit on HDCP disable > drm/i915: WARN if HDCP signalling is enabled upon disable > drm/i915: Intercept Aksv writes in the aux hooks > drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP > signalling > drm/i915: Factor out hdcp->value assignments > drm/i915: Protect workers against disappearing connectors > drm/i915: Don't fully disable HDCP on a port if multiple pipes are > using it > drm/i915: Support DP MST in enc_to_dig_port() function > drm/i915: Use ddi_update_pipe in intel_dp_mst > drm/i915: Factor out HDCP shim functions from dp for use by dp_mst > drm/i915: Plumb port through hdcp init > drm/i915: Add connector to hdcp_shim->check_link() > drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband > message > drm/i915: Print HDCP version info for all connectors > drm/i915: Add HDCP 1.4 support for MST connectors > > drivers/gpu/drm/drm_dp_mst_topology.c | 142 ++++ > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/display/intel_ddi.c | 29 +- > drivers/gpu/drm/i915/display/intel_ddi.h | 2 + > .../drm/i915/display/intel_display_debugfs.c | 21 +- > .../drm/i915/display/intel_display_types.h | 30 +- > drivers/gpu/drm/i915/display/intel_dp.c | 654 +-------------- > drivers/gpu/drm/i915/display/intel_dp.h | 9 + > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 743 ++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 + > drivers/gpu/drm/i915/display/intel_hdcp.c | 217 +++-- > drivers/gpu/drm/i915/display/intel_hdcp.h | 2 +- > drivers/gpu/drm/i915/display/intel_hdmi.c | 25 +- > .../drm/selftests/test-drm_dp_mst_helper.c | 17 + > include/drm/drm_dp_helper.h | 3 + > include/drm/drm_dp_mst_helper.h | 44 ++ > include/drm/drm_hdcp.h | 3 + > 17 files changed, 1235 insertions(+), 726 deletions(-) > create mode 100644 drivers/gpu/drm/i915/display/intel_dp_hdcp.c > > -- > Sean Paul, Software Engineer, Google / Chromium OS > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Ramalingam C <ramalingam.c@intel.com> To: Sean Paul <sean@poorly.run> Cc: dri-devel@lists.freedesktop.org, daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, seanpaul@chromium.org Subject: Re: [Intel-gfx] [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Date: Fri, 15 May 2020 20:18:12 +0530 [thread overview] Message-ID: <20200515144812.GB11877@intel.com> (raw) In-Reply-To: <20200429195502.39919-1-sean@poorly.run> On 2020-04-29 at 15:54:46 -0400, Sean Paul wrote: > From: Sean Paul <seanpaul@chromium.org> > > Changes in v6: > -Rebased on -tip > -Disabled HDCP over MST on GEN12 > -Addressed Lyude's review comments in the QUERY_STREAM_ENCRYPTION_STATUS patch Sean, What is the test setup you have used? I am afraid our CI dont have the coverage for MST capability yet to provide the functional status of the code. -Ram. > > Sean Paul (16): > drm/i915: Fix sha_text population code > drm/i915: Clear the repeater bit on HDCP disable > drm/i915: WARN if HDCP signalling is enabled upon disable > drm/i915: Intercept Aksv writes in the aux hooks > drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP > signalling > drm/i915: Factor out hdcp->value assignments > drm/i915: Protect workers against disappearing connectors > drm/i915: Don't fully disable HDCP on a port if multiple pipes are > using it > drm/i915: Support DP MST in enc_to_dig_port() function > drm/i915: Use ddi_update_pipe in intel_dp_mst > drm/i915: Factor out HDCP shim functions from dp for use by dp_mst > drm/i915: Plumb port through hdcp init > drm/i915: Add connector to hdcp_shim->check_link() > drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband > message > drm/i915: Print HDCP version info for all connectors > drm/i915: Add HDCP 1.4 support for MST connectors > > drivers/gpu/drm/drm_dp_mst_topology.c | 142 ++++ > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/display/intel_ddi.c | 29 +- > drivers/gpu/drm/i915/display/intel_ddi.h | 2 + > .../drm/i915/display/intel_display_debugfs.c | 21 +- > .../drm/i915/display/intel_display_types.h | 30 +- > drivers/gpu/drm/i915/display/intel_dp.c | 654 +-------------- > drivers/gpu/drm/i915/display/intel_dp.h | 9 + > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 743 ++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 + > drivers/gpu/drm/i915/display/intel_hdcp.c | 217 +++-- > drivers/gpu/drm/i915/display/intel_hdcp.h | 2 +- > drivers/gpu/drm/i915/display/intel_hdmi.c | 25 +- > .../drm/selftests/test-drm_dp_mst_helper.c | 17 + > include/drm/drm_dp_helper.h | 3 + > include/drm/drm_dp_mst_helper.h | 44 ++ > include/drm/drm_hdcp.h | 3 + > 17 files changed, 1235 insertions(+), 726 deletions(-) > create mode 100644 drivers/gpu/drm/i915/display/intel_dp_hdcp.c > > -- > Sean Paul, Software Engineer, Google / Chromium OS > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-05-15 14:48 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-29 19:54 [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 01/16] drm/i915: Fix sha_text population code Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` Sean Paul 2020-05-01 2:55 ` Sasha Levin 2020-05-01 2:55 ` [Intel-gfx] " Sasha Levin 2020-05-06 14:00 ` Ramalingam C 2020-05-06 14:00 ` [Intel-gfx] " Ramalingam C 2020-05-06 14:00 ` Ramalingam C 2020-04-29 19:54 ` [PATCH v6 02/16] drm/i915: Clear the repeater bit on HDCP disable Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` Sean Paul 2020-05-01 2:55 ` Sasha Levin 2020-05-01 2:55 ` [Intel-gfx] " Sasha Levin 2020-05-01 2:55 ` Sasha Levin 2020-05-06 14:02 ` Ramalingam C 2020-05-06 14:02 ` [Intel-gfx] " Ramalingam C 2020-05-06 14:02 ` Ramalingam C 2020-04-29 19:54 ` [PATCH v6 03/16] drm/i915: WARN if HDCP signalling is enabled upon disable Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-06 14:18 ` Ramalingam C 2020-05-06 14:18 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 04/16] drm/i915: Intercept Aksv writes in the aux hooks Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-06 14:13 ` Ramalingam C 2020-05-06 14:13 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 05/16] drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP signalling Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 06/16] drm/i915: Factor out hdcp->value assignments Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 07/16] drm/i915: Protect workers against disappearing connectors Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 08/16] drm/i915: Don't fully disable HDCP on a port if multiple pipes are using it Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-15 12:39 ` Ramalingam C 2020-05-15 12:39 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 09/16] drm/i915: Support DP MST in enc_to_dig_port() function Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 10/16] drm/i915: Use ddi_update_pipe in intel_dp_mst Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 11/16] drm/i915: Factor out HDCP shim functions from dp for use by dp_mst Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 12/16] drm/i915: Plumb port through hdcp init Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 13/16] drm/i915: Add connector to hdcp_shim->check_link() Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 14/16] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 15/16] drm/i915: Print HDCP version info for all connectors Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 16/16] drm/i915: Add HDCP 1.4 support for MST connectors Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-05-15 14:42 ` Ramalingam C 2020-05-15 14:42 ` [Intel-gfx] " Ramalingam C 2020-06-18 18:20 ` Sean Paul 2020-06-18 18:20 ` [Intel-gfx] " Sean Paul 2020-04-29 20:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for HDCP 1.4 over MST connectors (rev6) Patchwork 2020-04-29 21:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-04-30 5:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2020-05-15 14:48 ` Ramalingam C [this message] 2020-05-15 14:48 ` [Intel-gfx] [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Ramalingam C 2020-05-18 14:32 ` Sean Paul 2020-05-18 14:32 ` [Intel-gfx] " Sean Paul 2020-05-18 16:41 ` Ramalingam C 2020-05-18 16:41 ` [Intel-gfx] " Ramalingam C 2020-05-20 13:11 ` Sean Paul 2020-05-20 13:11 ` [Intel-gfx] " Sean Paul 2020-05-26 10:38 ` Ramalingam C 2020-05-26 10:38 ` [Intel-gfx] " Ramalingam C
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