From: Sean Paul <sean@poorly.run> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: daniel.vetter@ffwll.ch, seanpaul@chromium.org, juston.li@intel.com, rodrigo.vivi@intel.com Subject: [PATCH v6 16/16] drm/i915: Add HDCP 1.4 support for MST connectors Date: Wed, 29 Apr 2020 15:55:02 -0400 [thread overview] Message-ID: <20200429195502.39919-17-sean@poorly.run> (raw) In-Reply-To: <20200429195502.39919-1-sean@poorly.run> From: Sean Paul <seanpaul@chromium.org> Now that all the groundwork has been laid, we can turn on HDCP 1.4 over MST. Everything except for toggling the HDCP signalling and HDCP 2.2 support is the same as the DP case, so we'll re-use those callbacks Cc: Juston Li <juston.li@intel.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-12-sean@poorly.run #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20191212190230.188505-13-sean@poorly.run #v2 Link: https://patchwork.freedesktop.org/patch/msgid/20200117193103.156821-13-sean@poorly.run #v3 Link: https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-15-sean@poorly.run #v4 Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-17-sean@poorly.run #v5 Changes in v2: -Toggle HDCP from encoder disable/enable -Don't disable HDCP on MST connector destroy, leave that for encoder disable, just ensure the check_work routine isn't running any longer Changes in v3: -Place the shim in the new intel_dp_hdcp.c file (Ville) Changes in v4: -Actually use the mst shim for mst connections (Juston) -Use QUERY_STREAM_ENC_STATUS MST message to verify channel is encrypted Changes in v5: -Add sleep on disable signalling to match hdmi delay Changes in v6: -Disable HDCP over MST on GEN12+ since I'm unsure how it should work and I don't have hardware to test it --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 107 ++++++++++++++++++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 18 ++++ 2 files changed, 124 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index 4e3dafbea1f9..331fdb312e05 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -7,10 +7,12 @@ */ #include <drm/drm_dp_helper.h> +#include <drm/drm_dp_mst_helper.h> #include <drm/drm_hdcp.h> #include <drm/drm_print.h> #include "intel_display_types.h" +#include "intel_ddi.h" #include "intel_dp.h" #include "intel_hdcp.h" @@ -618,6 +620,106 @@ static const struct intel_hdcp_shim intel_dp_hdcp_shim = { .protocol = HDCP_PROTOCOL_DP, }; +static int +intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *intel_dig_port, + enum transcoder cpu_transcoder, + bool enable) +{ + struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); + int ret; + + if (!enable) + usleep_range(6, 60); /* Bspec says >= 6us */ + + ret = intel_ddi_toggle_hdcp_signalling(&intel_dig_port->base, + cpu_transcoder, enable); + if (ret) + drm_dbg_kms(&i915->drm, "%s HDCP signalling failed (%d)\n", + enable ? "Enable" : "Disable", ret); + return ret; +} + +static +int intel_dp_mst_hdcp2_write_msg(struct intel_digital_port *intel_dig_port, + void *buf, size_t size) +{ + return -EOPNOTSUPP; +} + +static +int intel_dp_mst_hdcp2_read_msg(struct intel_digital_port *intel_dig_port, + u8 msg_id, void *buf, size_t size) +{ + return -EOPNOTSUPP; +} + +static int +intel_dp_mst_hdcp2_config_stream_type(struct intel_digital_port *intel_dig_port, + bool is_repeater, u8 content_type) +{ + return -EOPNOTSUPP; +} + +static +int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *intel_dig_port) +{ + return -EOPNOTSUPP; +} + +static +int intel_dp_mst_hdcp2_capable(struct intel_digital_port *intel_dig_port, + bool *capable) +{ + *capable = false; + return 0; +} + +static +bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *intel_dig_port, + struct intel_connector *connector) +{ + struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); + struct intel_dp *intel_dp = &intel_dig_port->dp; + struct drm_dp_query_stream_enc_status_ack_reply reply; + int ret; + + if (!intel_dp_hdcp_check_link(intel_dig_port, connector)) + return false; + + ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr, + connector->port, &reply); + if (ret) { + drm_dbg_kms(&i915->drm, + "[CONNECTOR:%d:%s] failed QSES ret=%d\n", + connector->base.base.id, connector->base.name, ret); + return false; + } + + return reply.auth_completed && reply.encryption_enabled; +} + +static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { + .write_an_aksv = intel_dp_hdcp_write_an_aksv, + .read_bksv = intel_dp_hdcp_read_bksv, + .read_bstatus = intel_dp_hdcp_read_bstatus, + .repeater_present = intel_dp_hdcp_repeater_present, + .read_ri_prime = intel_dp_hdcp_read_ri_prime, + .read_ksv_ready = intel_dp_hdcp_read_ksv_ready, + .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo, + .read_v_prime_part = intel_dp_hdcp_read_v_prime_part, + .toggle_signalling = intel_dp_mst_hdcp_toggle_signalling, + .check_link = intel_dp_mst_hdcp_check_link, + .hdcp_capable = intel_dp_hdcp_capable, + + .write_2_2_msg = intel_dp_mst_hdcp2_write_msg, + .read_2_2_msg = intel_dp_mst_hdcp2_read_msg, + .config_stream_type = intel_dp_mst_hdcp2_config_stream_type, + .check_2_2_link = intel_dp_mst_hdcp2_check_link, + .hdcp_2_2_capable = intel_dp_mst_hdcp2_capable, + + .protocol = HDCP_PROTOCOL_DP, +}; + int intel_dp_init_hdcp(struct intel_digital_port *intel_dig_port, struct intel_connector *intel_connector) { @@ -630,7 +732,10 @@ int intel_dp_init_hdcp(struct intel_digital_port *intel_dig_port, if (!is_hdcp_supported(dev_priv, port)) return 0; - if (!intel_dp_is_edp(intel_dp)) + if (intel_connector->mst_port) + return intel_hdcp_init(intel_connector, port, + &intel_dp_mst_hdcp_shim); + else if (!intel_dp_is_edp(intel_dp)) return intel_hdcp_init(intel_connector, port, &intel_dp_hdcp_shim); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index d9dc4dc6ea92..ab24e5057c60 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -36,6 +36,7 @@ #include "intel_dp.h" #include "intel_dp_mst.h" #include "intel_dpio_phy.h" +#include "intel_hdcp.h" static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, @@ -332,6 +333,8 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, drm_dbg_kms(&i915->drm, "active links %d\n", intel_dp->active_mst_links); + intel_hdcp_disable(intel_mst->connector); + drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port); ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); @@ -526,6 +529,13 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, drm_dp_update_payload_part2(&intel_dp->mst_mgr); if (pipe_config->has_audio) intel_audio_codec_enable(encoder, pipe_config, conn_state); + + /* Enable hdcp if it's desired */ + if (conn_state->content_protection == + DRM_MODE_CONTENT_PROTECTION_DESIRED) + intel_hdcp_enable(to_intel_connector(conn_state->connector), + pipe_config->cpu_transcoder, + (u8)conn_state->hdcp_content_type); } static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, @@ -748,6 +758,14 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo intel_attach_force_audio_property(connector); intel_attach_broadcast_rgb_property(connector); + + /* TODO: Figure out how to make HDCP work on GEN12+ */ + if (INTEL_GEN(dev_priv) < 12) { + ret = intel_dp_init_hdcp(intel_dig_port, intel_connector); + if (ret) + DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); + } + /* * Reuse the prop from the SST connector because we're * not allowed to create new props after device registration. -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Sean Paul <sean@poorly.run> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: daniel.vetter@ffwll.ch, seanpaul@chromium.org Subject: [Intel-gfx] [PATCH v6 16/16] drm/i915: Add HDCP 1.4 support for MST connectors Date: Wed, 29 Apr 2020 15:55:02 -0400 [thread overview] Message-ID: <20200429195502.39919-17-sean@poorly.run> (raw) In-Reply-To: <20200429195502.39919-1-sean@poorly.run> From: Sean Paul <seanpaul@chromium.org> Now that all the groundwork has been laid, we can turn on HDCP 1.4 over MST. Everything except for toggling the HDCP signalling and HDCP 2.2 support is the same as the DP case, so we'll re-use those callbacks Cc: Juston Li <juston.li@intel.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-12-sean@poorly.run #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20191212190230.188505-13-sean@poorly.run #v2 Link: https://patchwork.freedesktop.org/patch/msgid/20200117193103.156821-13-sean@poorly.run #v3 Link: https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-15-sean@poorly.run #v4 Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-17-sean@poorly.run #v5 Changes in v2: -Toggle HDCP from encoder disable/enable -Don't disable HDCP on MST connector destroy, leave that for encoder disable, just ensure the check_work routine isn't running any longer Changes in v3: -Place the shim in the new intel_dp_hdcp.c file (Ville) Changes in v4: -Actually use the mst shim for mst connections (Juston) -Use QUERY_STREAM_ENC_STATUS MST message to verify channel is encrypted Changes in v5: -Add sleep on disable signalling to match hdmi delay Changes in v6: -Disable HDCP over MST on GEN12+ since I'm unsure how it should work and I don't have hardware to test it --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 107 ++++++++++++++++++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 18 ++++ 2 files changed, 124 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index 4e3dafbea1f9..331fdb312e05 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -7,10 +7,12 @@ */ #include <drm/drm_dp_helper.h> +#include <drm/drm_dp_mst_helper.h> #include <drm/drm_hdcp.h> #include <drm/drm_print.h> #include "intel_display_types.h" +#include "intel_ddi.h" #include "intel_dp.h" #include "intel_hdcp.h" @@ -618,6 +620,106 @@ static const struct intel_hdcp_shim intel_dp_hdcp_shim = { .protocol = HDCP_PROTOCOL_DP, }; +static int +intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *intel_dig_port, + enum transcoder cpu_transcoder, + bool enable) +{ + struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); + int ret; + + if (!enable) + usleep_range(6, 60); /* Bspec says >= 6us */ + + ret = intel_ddi_toggle_hdcp_signalling(&intel_dig_port->base, + cpu_transcoder, enable); + if (ret) + drm_dbg_kms(&i915->drm, "%s HDCP signalling failed (%d)\n", + enable ? "Enable" : "Disable", ret); + return ret; +} + +static +int intel_dp_mst_hdcp2_write_msg(struct intel_digital_port *intel_dig_port, + void *buf, size_t size) +{ + return -EOPNOTSUPP; +} + +static +int intel_dp_mst_hdcp2_read_msg(struct intel_digital_port *intel_dig_port, + u8 msg_id, void *buf, size_t size) +{ + return -EOPNOTSUPP; +} + +static int +intel_dp_mst_hdcp2_config_stream_type(struct intel_digital_port *intel_dig_port, + bool is_repeater, u8 content_type) +{ + return -EOPNOTSUPP; +} + +static +int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *intel_dig_port) +{ + return -EOPNOTSUPP; +} + +static +int intel_dp_mst_hdcp2_capable(struct intel_digital_port *intel_dig_port, + bool *capable) +{ + *capable = false; + return 0; +} + +static +bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *intel_dig_port, + struct intel_connector *connector) +{ + struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); + struct intel_dp *intel_dp = &intel_dig_port->dp; + struct drm_dp_query_stream_enc_status_ack_reply reply; + int ret; + + if (!intel_dp_hdcp_check_link(intel_dig_port, connector)) + return false; + + ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr, + connector->port, &reply); + if (ret) { + drm_dbg_kms(&i915->drm, + "[CONNECTOR:%d:%s] failed QSES ret=%d\n", + connector->base.base.id, connector->base.name, ret); + return false; + } + + return reply.auth_completed && reply.encryption_enabled; +} + +static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { + .write_an_aksv = intel_dp_hdcp_write_an_aksv, + .read_bksv = intel_dp_hdcp_read_bksv, + .read_bstatus = intel_dp_hdcp_read_bstatus, + .repeater_present = intel_dp_hdcp_repeater_present, + .read_ri_prime = intel_dp_hdcp_read_ri_prime, + .read_ksv_ready = intel_dp_hdcp_read_ksv_ready, + .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo, + .read_v_prime_part = intel_dp_hdcp_read_v_prime_part, + .toggle_signalling = intel_dp_mst_hdcp_toggle_signalling, + .check_link = intel_dp_mst_hdcp_check_link, + .hdcp_capable = intel_dp_hdcp_capable, + + .write_2_2_msg = intel_dp_mst_hdcp2_write_msg, + .read_2_2_msg = intel_dp_mst_hdcp2_read_msg, + .config_stream_type = intel_dp_mst_hdcp2_config_stream_type, + .check_2_2_link = intel_dp_mst_hdcp2_check_link, + .hdcp_2_2_capable = intel_dp_mst_hdcp2_capable, + + .protocol = HDCP_PROTOCOL_DP, +}; + int intel_dp_init_hdcp(struct intel_digital_port *intel_dig_port, struct intel_connector *intel_connector) { @@ -630,7 +732,10 @@ int intel_dp_init_hdcp(struct intel_digital_port *intel_dig_port, if (!is_hdcp_supported(dev_priv, port)) return 0; - if (!intel_dp_is_edp(intel_dp)) + if (intel_connector->mst_port) + return intel_hdcp_init(intel_connector, port, + &intel_dp_mst_hdcp_shim); + else if (!intel_dp_is_edp(intel_dp)) return intel_hdcp_init(intel_connector, port, &intel_dp_hdcp_shim); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index d9dc4dc6ea92..ab24e5057c60 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -36,6 +36,7 @@ #include "intel_dp.h" #include "intel_dp_mst.h" #include "intel_dpio_phy.h" +#include "intel_hdcp.h" static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, @@ -332,6 +333,8 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, drm_dbg_kms(&i915->drm, "active links %d\n", intel_dp->active_mst_links); + intel_hdcp_disable(intel_mst->connector); + drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port); ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); @@ -526,6 +529,13 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, drm_dp_update_payload_part2(&intel_dp->mst_mgr); if (pipe_config->has_audio) intel_audio_codec_enable(encoder, pipe_config, conn_state); + + /* Enable hdcp if it's desired */ + if (conn_state->content_protection == + DRM_MODE_CONTENT_PROTECTION_DESIRED) + intel_hdcp_enable(to_intel_connector(conn_state->connector), + pipe_config->cpu_transcoder, + (u8)conn_state->hdcp_content_type); } static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, @@ -748,6 +758,14 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo intel_attach_force_audio_property(connector); intel_attach_broadcast_rgb_property(connector); + + /* TODO: Figure out how to make HDCP work on GEN12+ */ + if (INTEL_GEN(dev_priv) < 12) { + ret = intel_dp_init_hdcp(intel_dig_port, intel_connector); + if (ret) + DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); + } + /* * Reuse the prop from the SST connector because we're * not allowed to create new props after device registration. -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-04-29 19:55 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-29 19:54 [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 01/16] drm/i915: Fix sha_text population code Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` Sean Paul 2020-05-01 2:55 ` Sasha Levin 2020-05-01 2:55 ` [Intel-gfx] " Sasha Levin 2020-05-06 14:00 ` Ramalingam C 2020-05-06 14:00 ` [Intel-gfx] " Ramalingam C 2020-05-06 14:00 ` Ramalingam C 2020-04-29 19:54 ` [PATCH v6 02/16] drm/i915: Clear the repeater bit on HDCP disable Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` Sean Paul 2020-05-01 2:55 ` Sasha Levin 2020-05-01 2:55 ` [Intel-gfx] " Sasha Levin 2020-05-01 2:55 ` Sasha Levin 2020-05-06 14:02 ` Ramalingam C 2020-05-06 14:02 ` [Intel-gfx] " Ramalingam C 2020-05-06 14:02 ` Ramalingam C 2020-04-29 19:54 ` [PATCH v6 03/16] drm/i915: WARN if HDCP signalling is enabled upon disable Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-06 14:18 ` Ramalingam C 2020-05-06 14:18 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 04/16] drm/i915: Intercept Aksv writes in the aux hooks Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-06 14:13 ` Ramalingam C 2020-05-06 14:13 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 05/16] drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP signalling Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 06/16] drm/i915: Factor out hdcp->value assignments Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 07/16] drm/i915: Protect workers against disappearing connectors Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 08/16] drm/i915: Don't fully disable HDCP on a port if multiple pipes are using it Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-05-15 12:39 ` Ramalingam C 2020-05-15 12:39 ` [Intel-gfx] " Ramalingam C 2020-04-29 19:54 ` [PATCH v6 09/16] drm/i915: Support DP MST in enc_to_dig_port() function Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 10/16] drm/i915: Use ddi_update_pipe in intel_dp_mst Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 11/16] drm/i915: Factor out HDCP shim functions from dp for use by dp_mst Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 12/16] drm/i915: Plumb port through hdcp init Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:54 ` [PATCH v6 13/16] drm/i915: Add connector to hdcp_shim->check_link() Sean Paul 2020-04-29 19:54 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 14/16] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` [PATCH v6 15/16] drm/i915: Print HDCP version info for all connectors Sean Paul 2020-04-29 19:55 ` [Intel-gfx] " Sean Paul 2020-04-29 19:55 ` Sean Paul [this message] 2020-04-29 19:55 ` [Intel-gfx] [PATCH v6 16/16] drm/i915: Add HDCP 1.4 support for MST connectors Sean Paul 2020-05-15 14:42 ` Ramalingam C 2020-05-15 14:42 ` [Intel-gfx] " Ramalingam C 2020-06-18 18:20 ` Sean Paul 2020-06-18 18:20 ` [Intel-gfx] " Sean Paul 2020-04-29 20:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for HDCP 1.4 over MST connectors (rev6) Patchwork 2020-04-29 21:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-04-30 5:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2020-05-15 14:48 ` [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors Ramalingam C 2020-05-15 14:48 ` [Intel-gfx] " Ramalingam C 2020-05-18 14:32 ` Sean Paul 2020-05-18 14:32 ` [Intel-gfx] " Sean Paul 2020-05-18 16:41 ` Ramalingam C 2020-05-18 16:41 ` [Intel-gfx] " Ramalingam C 2020-05-20 13:11 ` Sean Paul 2020-05-20 13:11 ` [Intel-gfx] " Sean Paul 2020-05-26 10:38 ` Ramalingam C 2020-05-26 10:38 ` [Intel-gfx] " Ramalingam C
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200429195502.39919-17-sean@poorly.run \ --to=sean@poorly.run \ --cc=daniel.vetter@ffwll.ch \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ --cc=juston.li@intel.com \ --cc=rodrigo.vivi@intel.com \ --cc=seanpaul@chromium.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.