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From: <Tudor.Ambarus@microchip.com>
To: <alexandre.belloni@bootlin.com>,
	<Ludovic.Desroches@microchip.com>, <Nicolas.Ferre@microchip.com>
Cc: <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <Codrin.Ciubotariu@microchip.com>,
	<Tudor.Ambarus@microchip.com>
Subject: [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
Date: Thu, 14 May 2020 05:03:17 +0000	[thread overview]
Message-ID: <20200514050301.147442-16-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com>

From: Tudor Ambarus <tudor.ambarus@microchip.com>

Users can choose which flexcom function to use. Describe the I2C
Flexcom0 function. Add alias for the i2c2 node in order to not rely
on probe order for the i2c device numbering. The sama5d2 SoC has
two dedicated i2c buses and five flexcoms that can function as i2c.
The i2c0 and i2c1 aliases are kept for the dedicated i2c buses,
the i2c flexcom functions can be numbered in order starting from i2c2.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 arch/arm/boot/dts/at91-sama5d2_xplained.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 01ffbddd4ab8..77e5d4f5a102 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -18,6 +18,7 @@
 
 	aliases {
 		serial0 = &uart1;	/* DBGU */
+		i2c2 = &i2c2;		/* XPRO EXT2 */
 	};
 
 	chosen {
@@ -336,6 +337,20 @@
 					pinctrl-0 = <&pinctrl_flx0_default>;
 					status = "okay";
 				};
+
+				i2c2: i2c@600 {
+					dmas = <0>, <0>;
+					pinctrl-names = "default", "gpio";
+					pinctrl-0 = <&pinctrl_flx0_default>;
+					pinctrl-1 = <&pinctrl_i2c2_gpio>;
+					sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>;
+					scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>;
+					i2c-sda-hold-time-ns = <350>;
+					i2c-analog-filter;
+					i2c-digital-filter;
+					i2c-digital-filter-width-ns = <35>;
+					status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
+				};
 			};
 
 			shdwc@f8048010 {
@@ -523,6 +538,12 @@
 					bias-disable;
 				};
 
+				pinctrl_i2c2_gpio: i2c2_gpio {
+					pinmux = <PIN_PB28__GPIO>,
+						 <PIN_PB29__GPIO>;
+					bias-disable;
+				};
+
 				pinctrl_i2s0_default: i2s0_default {
 					pinmux = <PIN_PC1__I2SC0_CK>,
 						 <PIN_PC2__I2SC0_MCK>,
-- 
2.23.0

WARNING: multiple messages have this Message-ID (diff)
From: <Tudor.Ambarus@microchip.com>
To: <alexandre.belloni@bootlin.com>,
	<Ludovic.Desroches@microchip.com>, <Nicolas.Ferre@microchip.com>
Cc: devicetree@vger.kernel.org, Tudor.Ambarus@microchip.com,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	Codrin.Ciubotariu@microchip.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
Date: Thu, 14 May 2020 05:03:17 +0000	[thread overview]
Message-ID: <20200514050301.147442-16-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com>

From: Tudor Ambarus <tudor.ambarus@microchip.com>

Users can choose which flexcom function to use. Describe the I2C
Flexcom0 function. Add alias for the i2c2 node in order to not rely
on probe order for the i2c device numbering. The sama5d2 SoC has
two dedicated i2c buses and five flexcoms that can function as i2c.
The i2c0 and i2c1 aliases are kept for the dedicated i2c buses,
the i2c flexcom functions can be numbered in order starting from i2c2.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 arch/arm/boot/dts/at91-sama5d2_xplained.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 01ffbddd4ab8..77e5d4f5a102 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -18,6 +18,7 @@
 
 	aliases {
 		serial0 = &uart1;	/* DBGU */
+		i2c2 = &i2c2;		/* XPRO EXT2 */
 	};
 
 	chosen {
@@ -336,6 +337,20 @@
 					pinctrl-0 = <&pinctrl_flx0_default>;
 					status = "okay";
 				};
+
+				i2c2: i2c@600 {
+					dmas = <0>, <0>;
+					pinctrl-names = "default", "gpio";
+					pinctrl-0 = <&pinctrl_flx0_default>;
+					pinctrl-1 = <&pinctrl_i2c2_gpio>;
+					sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>;
+					scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>;
+					i2c-sda-hold-time-ns = <350>;
+					i2c-analog-filter;
+					i2c-digital-filter;
+					i2c-digital-filter-width-ns = <35>;
+					status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
+				};
 			};
 
 			shdwc@f8048010 {
@@ -523,6 +538,12 @@
 					bias-disable;
 				};
 
+				pinctrl_i2c2_gpio: i2c2_gpio {
+					pinmux = <PIN_PB28__GPIO>,
+						 <PIN_PB29__GPIO>;
+					bias-disable;
+				};
+
 				pinctrl_i2s0_default: i2s0_default {
 					pinmux = <PIN_PC1__I2SC0_CK>,
 						 <PIN_PC2__I2SC0_MCK>,
-- 
2.23.0

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  parent reply	other threads:[~2020-05-14  5:03 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-14  5:03 [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Tudor.Ambarus
2020-05-14  5:03 ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 01/16] ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 02/16] ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 03/16] ARM: dts: at91: sama5d2: Move flx3 " Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 04/16] ARM: dts: at91: sama5d2: Move flx2 " Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 05/16] ARM: dts: at91: sama5d2: Move flx1 " Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 06/16] ARM: dts: at91: sama5d2: Move flx0 " Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 07/16] ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 09/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 08/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 10/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 11/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 13/16] ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 12/16] ARM: dts: at91: sama5d2: Add missing flexcom definitions Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 14/16] ARM: dts: at91: sama5d2_xplained: Add alias for DBGU Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 16/16] ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases Tudor.Ambarus
2020-05-14  5:03   ` Tudor.Ambarus
2020-05-14  5:03 ` Tudor.Ambarus [this message]
2020-05-14  5:03   ` [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function Tudor.Ambarus
2020-05-15 14:51 ` [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Alexandre Belloni
2020-05-15 14:51   ` Alexandre Belloni

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