From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Tudor.Ambarus@microchip.com
Cc: Ludovic.Desroches@microchip.com, Nicolas.Ferre@microchip.com,
robh+dt@kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Codrin.Ciubotariu@microchip.com
Subject: Re: [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions
Date: Fri, 15 May 2020 16:51:49 +0200 [thread overview]
Message-ID: <20200515145149.GU34497@piout.net> (raw)
In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com>
On 14/05/2020 05:03:06+0000, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Rework the sama5d2 SoC flexcom definitions. The Flexcom IPs are
> in the SoC. Move all the flexcom nodes together with their function
> definitions in the SoC dtsi. Boards will just fill the pins and enable
> the desired functions. With this we remove the duplication of the
> flexcom definitions across the sama5d2 boards.
>
> Round the flexcom support and add the missing flexcom definitions.
> All the flexcom functions are now defined.
>
> Apart of the aliases and the new flx0 i2c function on sama5d2_xplained,
> the only functional change that this patch set adds, is that it uart5,
> uart6 and uart7 inherit the atmel,fifo-size = <32>; optional property.
> These nodes have both the FIFO size described and the DMA enabled.
> uart5 was tested on sama5d27-wlsom1-ek. On uart6 and uart7 a
> Bluetooth module can be connected. Tested BT uart7 on sama5d2-icp.
>
> Tudor Ambarus (16):
> ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions
> ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART
> ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4
> functions
> ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function
> ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function
> ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0
> functions
> ARM: dts: at91: sama5d2: Add missing flexcom definitions
> ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi
> ARM: dts: at91: sama5d2_xplained: Add alias for DBGU
> ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
> ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases
>
Applied, thanks.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Tudor.Ambarus@microchip.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Ludovic.Desroches@microchip.com, robh+dt@kernel.org,
Codrin.Ciubotariu@microchip.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions
Date: Fri, 15 May 2020 16:51:49 +0200 [thread overview]
Message-ID: <20200515145149.GU34497@piout.net> (raw)
In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com>
On 14/05/2020 05:03:06+0000, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Rework the sama5d2 SoC flexcom definitions. The Flexcom IPs are
> in the SoC. Move all the flexcom nodes together with their function
> definitions in the SoC dtsi. Boards will just fill the pins and enable
> the desired functions. With this we remove the duplication of the
> flexcom definitions across the sama5d2 boards.
>
> Round the flexcom support and add the missing flexcom definitions.
> All the flexcom functions are now defined.
>
> Apart of the aliases and the new flx0 i2c function on sama5d2_xplained,
> the only functional change that this patch set adds, is that it uart5,
> uart6 and uart7 inherit the atmel,fifo-size = <32>; optional property.
> These nodes have both the FIFO size described and the DMA enabled.
> uart5 was tested on sama5d27-wlsom1-ek. On uart6 and uart7 a
> Bluetooth module can be connected. Tested BT uart7 on sama5d2-icp.
>
> Tudor Ambarus (16):
> ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions
> ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
> ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART
> ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4
> functions
> ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function
> ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function
> ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0
> functions
> ARM: dts: at91: sama5d2: Add missing flexcom definitions
> ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi
> ARM: dts: at91: sama5d2_xplained: Add alias for DBGU
> ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
> ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases
>
Applied, thanks.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2020-05-15 14:51 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 5:03 [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 01/16] ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 02/16] ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 03/16] ARM: dts: at91: sama5d2: Move flx3 " Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 04/16] ARM: dts: at91: sama5d2: Move flx2 " Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 05/16] ARM: dts: at91: sama5d2: Move flx1 " Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 06/16] ARM: dts: at91: sama5d2: Move flx0 " Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 07/16] ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 09/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 08/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 10/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 11/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 13/16] ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 12/16] ARM: dts: at91: sama5d2: Add missing flexcom definitions Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 14/16] ARM: dts: at91: sama5d2_xplained: Add alias for DBGU Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 16/16] ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-14 5:03 ` [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function Tudor.Ambarus
2020-05-14 5:03 ` Tudor.Ambarus
2020-05-15 14:51 ` Alexandre Belloni [this message]
2020-05-15 14:51 ` [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Alexandre Belloni
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