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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 10/15] drm/i915/rkl: Don't try to read out DSI transcoders
Date: Wed,  3 Jun 2020 14:15:24 -0700	[thread overview]
Message-ID: <20200603211529.3005059-11-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20200603211529.3005059-1-matthew.d.roper@intel.com>

From: Aditya Swarup <aditya.swarup@intel.com>

RKL doesn't have DSI outputs, so we shouldn't try to read out the DSI
transcoder registers.

v2(MattR):
 - Just set the 'extra panel mask' to edp | dsi0 | dsi1 and then mask
   against the platform's cpu_transcoder_mask to filter out the ones
   that don't exist on a given platform.  (Ville)

Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 019fef8023ca..bcc6dc4e321b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10904,19 +10904,13 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	enum intel_display_power_domain power_domain;
-	unsigned long panel_transcoder_mask = 0;
+	unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP) |
+		BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
 	unsigned long enabled_panel_transcoders = 0;
 	enum transcoder panel_transcoder;
 	intel_wakeref_t wf;
 	u32 tmp;
 
-	if (INTEL_GEN(dev_priv) >= 11)
-		panel_transcoder_mask |=
-			BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
-
-	if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP))
-		panel_transcoder_mask |= BIT(TRANSCODER_EDP);
-
 	/*
 	 * The pipe->transcoder mapping is fixed with the exception of the eDP
 	 * and DSI transcoders handled below.
@@ -10927,6 +10921,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	 * XXX: Do intel_display_power_get_if_enabled before reading this (for
 	 * consistency and less surprising code; it's in always on power).
 	 */
+	panel_transcoder_mask &= INTEL_INFO(dev_priv)->cpu_transcoder_mask;
 	for_each_set_bit(panel_transcoder,
 			 &panel_transcoder_mask,
 			 ARRAY_SIZE(INTEL_INFO(dev_priv)->trans_offsets)) {
-- 
2.24.1

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  parent reply	other threads:[~2020-06-03 21:15 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-03 21:15 [Intel-gfx] [PATCH v3 00/15] Remaining RKL patches Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 01/15] drm/i915/rkl: Set transcoder mask properly Matt Roper
2020-06-04 15:34   ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 02/15] drm/i915/rkl: Program BW_BUDDY0 registers instead of BW_BUDDY1/2 Matt Roper
2020-06-03 22:34   ` Aditya Swarup
2020-06-03 23:12     ` Matt Roper
2020-06-04  1:18       ` Aditya Swarup
2020-06-04 17:01   ` Ville Syrjälä
2020-06-04 22:12     ` Matt Roper
2020-06-05 11:43       ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 03/15] drm/i915/rkl: RKL has no MBUS_ABOX_CTL{1, 2} Matt Roper
2020-06-04 18:31   ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 04/15] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 05/15] drm/i915/rkl: Setup ports/phys Matt Roper
2020-06-04 17:09   ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 06/15] drm/i915/rkl: provide port/phy mapping for vbt Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 07/15] drm/i915/rkl: Update TGP's pin mapping when paired with RKL Matt Roper
2020-06-04 18:29   ` Ville Syrjälä
2020-06-04 23:18     ` Matt Roper
2020-06-05 11:52       ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 08/15] drm/i915/rkl: Add DDC pin mapping Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 09/15] drm/i915/rkl: Don't try to access transcoder D Matt Roper
2020-06-04 16:55   ` Ville Syrjälä
2020-06-03 21:15 ` Matt Roper [this message]
2020-06-04 16:59   ` [Intel-gfx] [PATCH v3 10/15] drm/i915/rkl: Don't try to read out DSI transcoders Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 11/15] drm/i915/rkl: Handle comp master/slave relationships for PHYs Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 12/15] drm/i915/rkl: Add DPLL4 support Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 13/15] drm/i915/rkl: Handle HTI Matt Roper
2020-06-04 16:59   ` Ville Syrjälä
2020-06-04 22:55     ` Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 14/15] drm/i915/rkl: Disable PSR2 Matt Roper
2020-06-04 17:41   ` Rodrigo Vivi
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 15/15] drm/i915/rkl: Add initial workarounds Matt Roper
2020-06-03 22:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Remaining RKL patches Patchwork
2020-06-03 22:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-06-03 22:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-04  8:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-06-04 16:39   ` Matt Roper
2020-06-05 22:11     ` Chris Wilson
2020-06-06  3:21       ` Matt Roper
2020-06-06  9:01         ` Chris Wilson

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