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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 01/15] drm/i915/rkl: Set transcoder mask properly
Date: Wed,  3 Jun 2020 14:15:15 -0700	[thread overview]
Message-ID: <20200603211529.3005059-2-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20200603211529.3005059-1-matthew.d.roper@intel.com>

Although we properly captured RKL's three pipes in the device info
structure, we forgot to make the corresponding update to the transcoder
mask.  Set this field so that our transcoder loops will operate
properly.

Fixes: 123f62de419f ("drm/i915/rkl: Add RKL platform info and PCI ids")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 07b09af3a9c3..0ed586ee2047 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -881,6 +881,8 @@ static const struct intel_device_info rkl_info = {
 	GEN12_FEATURES,
 	PLATFORM(INTEL_ROCKETLAKE),
 	.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
+	.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+		BIT(TRANSCODER_C),
 	.require_force_probe = 1,
 	.engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
-- 
2.24.1

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  reply	other threads:[~2020-06-03 21:15 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-03 21:15 [Intel-gfx] [PATCH v3 00/15] Remaining RKL patches Matt Roper
2020-06-03 21:15 ` Matt Roper [this message]
2020-06-04 15:34   ` [Intel-gfx] [PATCH v3 01/15] drm/i915/rkl: Set transcoder mask properly Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 02/15] drm/i915/rkl: Program BW_BUDDY0 registers instead of BW_BUDDY1/2 Matt Roper
2020-06-03 22:34   ` Aditya Swarup
2020-06-03 23:12     ` Matt Roper
2020-06-04  1:18       ` Aditya Swarup
2020-06-04 17:01   ` Ville Syrjälä
2020-06-04 22:12     ` Matt Roper
2020-06-05 11:43       ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 03/15] drm/i915/rkl: RKL has no MBUS_ABOX_CTL{1, 2} Matt Roper
2020-06-04 18:31   ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 04/15] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 05/15] drm/i915/rkl: Setup ports/phys Matt Roper
2020-06-04 17:09   ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 06/15] drm/i915/rkl: provide port/phy mapping for vbt Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 07/15] drm/i915/rkl: Update TGP's pin mapping when paired with RKL Matt Roper
2020-06-04 18:29   ` Ville Syrjälä
2020-06-04 23:18     ` Matt Roper
2020-06-05 11:52       ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 08/15] drm/i915/rkl: Add DDC pin mapping Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 09/15] drm/i915/rkl: Don't try to access transcoder D Matt Roper
2020-06-04 16:55   ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 10/15] drm/i915/rkl: Don't try to read out DSI transcoders Matt Roper
2020-06-04 16:59   ` Ville Syrjälä
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 11/15] drm/i915/rkl: Handle comp master/slave relationships for PHYs Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 12/15] drm/i915/rkl: Add DPLL4 support Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 13/15] drm/i915/rkl: Handle HTI Matt Roper
2020-06-04 16:59   ` Ville Syrjälä
2020-06-04 22:55     ` Matt Roper
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 14/15] drm/i915/rkl: Disable PSR2 Matt Roper
2020-06-04 17:41   ` Rodrigo Vivi
2020-06-03 21:15 ` [Intel-gfx] [PATCH v3 15/15] drm/i915/rkl: Add initial workarounds Matt Roper
2020-06-03 22:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Remaining RKL patches Patchwork
2020-06-03 22:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-06-03 22:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-04  8:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-06-04 16:39   ` Matt Roper
2020-06-05 22:11     ` Chris Wilson
2020-06-06  3:21       ` Matt Roper
2020-06-06  9:01         ` Chris Wilson

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